STA308
BLOCK DIAGRAM
SA
SCL
SDA
MVO
OUT1A/B
LRCKI
BICKI
SDI12
SDI34
SDI56
SDI78
SERIAL
DATA
IN
I
2
C
OVERSAMPLING
SYSTEM
CONTROL
OUT2A/B
OUT3A/B
OUT4A/B
OUT5A/B
OUT6A/B
OUT7A/B
OUT8A/B
VOLUME
LIMITING
LRCKO
DDX
CHANNEL
MAPPING
VARIABLE
OVER-
SAMPLING
TREBLE,
BASS, EQ
(BIQUADS)
SYSTEM TIMING
PLLB
PLL
POWER
DOWN
VARIABLE
DOWN-
SAMPLING
SERIAL
DATA
OUT
BICKO
SDO12
SDO34
SDO56
SDO78
XTI
CKOUT
PWDN
EAPD
Figure 1. Signal Flow Diagram
Channels 1-8
1st Stage
Interpolation
Output
Scale
& Mix
Interp_Rate
Bass Management
(Channel 6 only)
8 Inputs
From I2S
BME
Channel
Mapping
1x,2x,4x
Interp
Biquads
B/T
Volume
Limiter
2x
Interp
Noise & Distortion Reduction
DDX
Output
PWM
DDX
(Channels 7&8 only)
Headphone
2/33