VN750-E / VN750S-E / VN750PT-E / VN750B5-E
Figure 8. Application Schematic
+5V
+5V
V
CC
R
prot
STATUS
INPUT
D
ld
R
prot
µC
OUTPUT
GND
R
GND
V
GND
D
GND
the ground network will produce a shift (j600mV) in the
input threshold and the status output values if the
microprocessor ground is not common with the device
ground. This shift will not vary if more than one HSD
shares the same diode/resistor network.
Series resistor in INPUT and STATUS lines are also
required to prevent that, during battery voltage transient,
the current exceeds the Absolute Maximum Rating.
GND PROTECTION NETWORK AGAINST
REVERSE BATTERY
Solution 1: Resistor in the ground line (R
can be used with any type of load.
only). This
GND
The following is an indication on how to dimension the
R
resistor.
GND
Safest configuration for unused INPUT and STATUS pin
is to leave them unconnected.
1) R
2) R
≤ 600mV / (I
).
S(on)max
)
GND
GND
GND
≥ (−V ) / (-I
CC
LOAD DUMP PROTECTION
where -I
is the DC reverse ground pin current and can
GND
be found in the absolute maximum rating section of the
D
is necessary (Voltage Transient Suppressor) if the
ld
device’s datasheet.
load dump peak voltage exceeds V
max DC rating.
CC
The same applies if the device will be subject to
Power Dissipation in R
(when V <0: during reverse
CC
GND
transients on the V
line that are greater than the ones
CC
battery situations) is:
shown in the ISO T/R 7637/1 table.
2
P = (-V ) /R
D
CC
GND
µC I/Os PROTECTION:
This resistor can be shared amongst several different
HSD. Please note that the value of this resistor should be
If a ground protection network is used and negative
calculated with formula (1) where I
becomes the
transients are present on the V line, the control pins will
S(on)max
CC
sum of the maximum on-state currents of the different
be pulled negative. ST suggests to insert a resistor (R
in line to prevent the µC I/Os pins to latch-up.
)
prot
devices.
Please note that if the microprocessor ground is not
The value of these resistors is a compromise between the
leakage current of µC and the current required by the
HSD I/Os (Input levels compatibility) with the latch-up
limit of µC I/Os.
common with the device ground then the R
will
GND
produce a shift (I
* R
) in the input thresholds
GND
S(on)max
and the status output values. This shift will vary
depending on many devices are ON in the case of several
-V
/I
≤ R
≤ (V -V -V
OHµC IH GND
) / I
CCpeak latchup
prot
IHmax
high side drivers sharing the same R
.
GND
Calculation example:
If the calculated power dissipation leads to a large
resistor or several devices have to share the same
resistor then the ST suggests to utilize Solution 2 (see
below).
For V
= - 100V and I
≥ 20mA; V
≥ 4.5V
CCpeak
latchup
OHµC
5kΩ ≤ R
≤ 65kΩ.
prot
Recommended R
value is 10kΩ.
prot
Solution 2: A diode (D
) in the ground line.
GND
A resistor (R
GND
=1kΩ) should be inserted in parallel to
GND
D
if the device will be driving an inductive load.
This small signal diode can be safely shared amongst
several different HSD. Also in this case, the presence of
9/31
STMICROELECTRONICS [ ST ]
