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132134 参数 Datasheet PDF下载

132134图片预览
型号: 132134
PDF下载: 下载PDF文件 查看货源
内容描述: EEG前端性能演示套件 [EEG Front-End Performance Demonstration Kit]
分类和应用: 连接器PC
文件页数/大小: 68 页 / 3385 K
品牌: TI [ TEXAS INSTRUMENTS ]
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Using the Software: ADS1299 Control Registers and GUI  
5.3.3  
5.3.4  
5.3.5  
Normal Electrode Input  
The Normal electrode input on the MUX routes the inputs (VINP and VINN) differentially to the internal  
PGA, as Figure 17 illustrates. An exception is if the SRB1 bit is set high. If channel is in Normal electrode  
mode and SRB1 bit is set high the signal on SRB1 pin is routed to negative inputs of all channels instead  
of VINN inputs.  
MVDD Input and the Scope Tab  
The MVDD input option allows the measurement of the supply voltage VS = (AVDD + AVSS)/2 for channels 1,  
2, 5, 6, 7, and 8; however, the supply voltage for channel 3 and 4 will be DVDD/4. As an example, in  
bipolar supply mode, AVDD = 3.0V and AVSS = –2.5V. Therefore, with the PGA gain = 1, the output voltage  
measured by the ADC will be approximately 0.25V.  
Bias Measurement  
This measurement takes the voltage at the BIASIN pin and measures it on the PGA with respect to  
(AVDD + AVSS)/2 or BIASREF. This option can be used to give a calibration/test signal to ADS1299  
device without connecting the calibration/test signal to the electrodes. The positive signal can be applied  
to BIASIN pin and the negative input can be applied to the BIASREF pin. More details on this can be  
found in Section 7.3.  
5.3.6  
Bias Positive Electrode Drive and Bias Negative Electrode  
This option can be used to have a selectable bias electrode. This option routes the signal on BIASIN pin  
to any of positive or negative pins of the channel inputs.  
5.4 GPIO and Other Registers  
The GPIO and Other Registers tab, located under the Analysis tab, includes controls for GPIO1 through  
GPIO4, SRB1 control, pulse mode control and lead off comparators power down. The GPIO registers  
control four general-purpose I/O pins. Figure 23 illustrates the GPIO Control Register GUI panel.  
Figure 23. GPIO Control Register GUI Panel  
5.5 Lead-Off and BIAS Registers  
The Lead-Off Detection and Current Control Registers and the Bias Derivation Control Registers are  
located under the ADC RegisterLOFF and BIAS tab.  
23  
SLAU443May 2012  
EEG Front-End Performance Demonstration Kit  
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Copyright © 2012, Texas Instruments Incorporated