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CC2520RHDRG4 参数 Datasheet PDF下载

CC2520RHDRG4图片预览
型号: CC2520RHDRG4
PDF下载: 下载PDF文件 查看货源
内容描述: 2.4 GHZ IEEE 802.15.4 / Zigbee射频收发器 [2.4 GHZ IEEE 802.15.4/ZIGBEE RF TRANSCEIVER]
分类和应用: 射频ZIGBEE
文件页数/大小: 133 页 / 2270 K
品牌: TI [ TEXAS INSTRUMENTS ]
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CC2520 DATASHEET
2.4 GHZ IEEE 802.15.4/ZIGBEE® RF TRANSCEIVER
SWRS068 – DECEMBER 2007
12.2 Power Up Sequence Using RESETn (recommended)
When the RESETn pin is used it must be held low until the internal regulator has stabilized. This typically
takes 0.1 ms. When the RESETn pin is set high, the crystal oscillator (in the CC2520 reference design) uses
typically 0.2 ms to start. See section 6 for crystal specific parameters.
The GPIO pins are configured according to Table 8: GPIO reset state when power is applied to the chip and
RESETn is held low.
VDD
VREG_EN
I
I
Tdres
RESETn
CSn
SCLK
SI
GPIO
I
O
I
I
[5..0] IO
Txr
Internal XOSC
SO
O
O
XOSC stable and running
Figure 8: Power up sequence using RESETn
12.3 Power Up With SRES
If one prefers to use the SRES command strobe to reset the device after powering up, the CSn signal must
be set low and SRES must be issued after the internal regulator has stabilized. Until the SRES command
strobe has been issued, the chip will be in an unknown state. Note that this means it could theoretically for
instance be transmitting.
The time from power is applied to the XOSC has started depends on the clock frequency used on the SPI
(max 8MHz) and the startup time for the crystal.
Note that the crystal oscillator does not necessarily start automatically when the SRES command strobe is
issued. That means one also has to issue an SXOSCON command strobe to be sure that the oscillator
starts. Unlike the RESETn pin, the SRES command strobe will not influence the state of the crystal
oscillator, so if the oscillator accidentally comes up in the “off” state, issuing a SRES will not make it start.
VDD
VREG_EN
RESETn
I
I
I
Tdres
CSn
SCLK
SI
GPIO
O
I
I
[5..0] IO
Txr
SRES B0
SRES B1
SXOSCON
SNOP
Internal XOSC
SO
O
O
STATUS
STATUS
STATUS
STATUS
XOSC stable and running
Figure 9: Power up sequence using SRES
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