CC2520 DATASHEET
2.4 GHZ IEEE 802.15.4/ZIGBEE® RF TRANSCEIVER
SWRS068 – DECEMBER 2007
OPCODE
Inputs
Outputs
Description
Possible exceptions
s[7:0]
SXOSCOFF
Command strobe
Turn off the crystal oscillator.
USAGE_ERROR
If the RF section is not idle a USAGE_ERROR is
generated.
RX_FRM_ABORTED
If a frame is currently being received a
RX_FRM_ABORTED exception is raised.
s[7:0]
SFLUSHRX
Flush the RX FIFO and reset the demodulator.
RX_FRM_ABORTED
Command strobe
If a frame is currently being received a
RX_FRM_ABORTED exception is raised.
s[7:0]
s[7:0]
SFLUSHTX
Flush the TX FIFO
Command strobe
SACK
Send acknowledgement frame, with the frame pendig
subfield cleared, following reception of the current frame.
USAGE_ERROR
USAGE_ERROR
USAGE_ERROR
Command strobe
Raises USAGE_ERROR exception if a frame is currently
not being received. In this case no ACK frame is sent.
s[7:0]
s[7:0]
SACKPEND
Send acknowledgement frame, with the frame pendig
subfield set, following reception of the current frame.
Command strobe
Raises USAGE_ERROR exception if a frame is currently
not being received. In this case no ACK frame is sent.
SNACK
Do not send an acknowledgement frame to the currently
received frame, even if the rfr_autoack is set.
Command strobe
Raises USAGE_ERROR exception if a frame is currently
not being received. In this case no ACK frame is sent.
s[7:0]
s[7:0]
SRXMASKBITSET
Command strobe
SRXMASKBITCLR
Command strobe
Set bit 13 in the RXMASK.
Clear bit 13 in the RXMASK.
RXENABLE_ZERO
RXENABLE_ZERO
Raises RXENABLE_ZERO exception if this causes the
RXENABE registers to be zero.
d[15:0] s[7:0]
d[15:0] s[7:0]
RXMASKOR
Perform bitwise OR between RX enable mask and D.
RXMASKAND
Perform bitwise AND between RX enable mask and D.
Raises RXENABLE_ZERO exception if this causes the
RXENABLE registers to be zero.
Data IO
a[7:3]
b[2:0]
s[7:0]
s[7:0]
BSET
Set a single bit. Writes 1 to bit B in address A. This is
done without affecting the value of, or triggering side-
effects of other bits at the same address. Only the
address range [0, 31] is accessible with this instruction.
MEMADDR_ERROR
MEMADDR_ERROR
MEMADDR_ERROR
a[7:3]
b[2:0]
BCLR
Clear a single bit. Writes 0 to bit B in address A. This is
done without affecting the value of, or triggering side-
effects of other bits at the same address. Only the
address range [0, 31] is accessible with this instruction.
a[11:0] s[7:0]
d[7:0]
MEMRD
Read memory. The n’th byte of data D is read from
address (A+n). Note that when an address with LSB=0 is
read the content of the corresponding address with
LSB=1 is buffered. If that address is read immediately
after within the same MEMRD instruction, the buffered
copy is read. In this way a read of a complete 16 bit word
is performed as an atomic operation.
...
a[11:0] s[7:0]
MEMWR
REGRD
Write memory. The n’th byte of data D input with the
instruction is written to address (A+n).
MEMADDR_ERROR
MEMADDR_ERROR
d[7:0]
...
d[7:0]
...
In addition, the n’th byte of data D output from the
instruction is the unaltered data read from the memory
location (A+n).
a[5:0]
s[7:0]
d[7:0]
...
Same functionality as MEMRD, except the operation can
only be started from addresses below 0x40.
45
WWW.TI.COM
TI [ TEXAS INSTRUMENTS ]
