CDC318A
1-LINE TO 18-LINE CLOCK DRIVER
WITH I
2
C CONTROL INTERFACE
SCAS614 – SEPTEMBER 1998
switching characteristics over recommended operating conditions
PARAMETER
tPLH
Low-to-high level propagation delay time
FROM
A
SCLOCK↓
SDATA↑
A
tPHL
High-to-low level propagation delay time
SCLOCK↓
SDATA↑
OE
OE
A
A
A
TO
Y
SDATA
valid
Y
Y
SDATA
valid
Y
Y
Y
Y
Y
Y
Y
SDATA
Y
SDATA
CL = 10 pF
CL = 400 pF
CL = 10 pF
CL = 400 pF
0.5
20
250
0.5
6
950
2.3
VCC = 3.3 V
±0.165
V,
See Figure 3
VCC = 3.3 V
±0.165
V,
See Figure 3
1
1
1
1
VCC = 3.3 V
±0.165
V,
See Figure 3
VCC = 3.3 V
±0.165
V,
See Figure 3
1.2
TEST CONDITIONS
MIN
1.2
MAX
4.5
2
150
4.5
2
150
7
7
7
7
250
500
1
2.2
UNIT
ns
µs
ns
ns
µs
ns
ns
ns
ps
ps
ns
ns
ns
ns
ns
tPLH
Low-to-high level propagation delay time
tPHL
tPZH
tPZL
tPHZ
tPLZ
tsk(o)
tsk(p)
tsk(pr)
tr
tr
tf
tf
High-to-low level propagation delay time
Enable time to the high level
Enable time to the low level
Disable time from the high level
Disable time from the low level
Skew time
Skew time
Skew time
Rise time
Rise time (see Note 5 and
(
Figure 3)
Fall time
Fall time (
(see Note 5 and
Figure 3)
NOTE 5: This parameter has a lower limit than BUS specification. This allows use of series resistors for current spike protection.
POST OFFICE BOX 655303
•
DALLAS, TEXAS 75265
7