SNAS605 AP – MARCH 2013 – REVISED JUNE 2013
7.4
7.4.1
Power Supply
CURRENT CONSUMPTION / POWER DISSIPATION CALCULATIONS
From
the current consumption can be calculated for any configuration. Data below is typical and
not assured.
Table 7-1. Typical Current Consumption for Selected Functional Blocks
(T
A
= 25 °C, V
CC
= 3.3 V)
Typical
I
CC
(mA)
Power
dissipat
ed in
device
(mW)
Power
dissipat
ed
externall
y
(mW)
-
-
-
-
-
-
-
-
-
-
Block
Condition
Core and Functional Blocks
Core
VCO
OSCin Doubler
CLKin
Dual Loop, Internal VCO0
VCO1 is selected
Doubler is enabled
Holdover is enabled
Holdover
Hitless switch is enabled
Track mode
SYNC_EN = 1
Enabled
Dynamic Digital Delay
enabled
SYSREF
Pulser is enabled
SYSREF Pulses mode
SYSREF Continuous mode
Clock Group
Enabled
IDL
ODL
Clock Divider
Any one of the CLKoutX_Y_PD = 0
Any one of the CLKoutX_Y_IDL = 1
Andy one of the CLKoutX_Y_ODL = 1
Divider Only
Divider + DCC + HS
Analog Delay + Divider
LVDS
HSDS
100
Ω
differential termination
HSDS 6 mA, 100
Ω
differential termination
HSDS 8 mA, 100
Ω
differential termination
HSDS 10 mA, 100
Ω
differential termination
OSCout Buffers
LVDS
LVCMOS
100
Ω
differential termination
LVCMOS Pair
LVCMOS Single
150 MHz
150 MHz
18.5
42.6
27
61.05
140.58
89.1
-
-
-
DCLKoutX_MUX = 0
DCLKoutX_MUX = 1
DCLKoutX_MUX = 3
20.1
2.2
3.2
13.6
17.7
13.6
6
8.8
11.6
19.4
66.33
7.26
10.56
44.88
58.41
44.88
19.8
29.04
38.28
64.02
-
-
-
-
EN_PLL2_REF_2X = 1
HOLDOVER_EN = 1
HOLDOVER_HITLESS_S
WITCH = 1
TRACK_EN = 1
SYSREF_PD = 0
SYSREF_DDLY_PD = 0
SYSREF_PLSR_PD = 0
SYSREF_MUX = 2
SYSREF_MUX = 3
Any one of the CLKinX is enabled
PLL1 and PLL2 locked
131.5
6
3
4.9
1.3
0.9
2.5
7.6
27.2
5
4.1
3
3
433.95
19.8
9.9
16.17
4.29
2.97
8.25
25.08
89.76
16.5
13.53
9.9
9.9
Required for SYNC and SYSREF functionality
Clock Output Buffers
Copyright © 2013, Texas Instruments Incorporated
APPLICATION INFORMATION
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