MSP430F663x
SLAS566C – JUNE 2010 – REVISED AUGUST 2012
Table 3. Terminal Functions (continued)
TERMINAL
NAME
AVSS3
P7.2/XT2IN
NO.
PZ
83
84
ZQW
A8
B8
I/O
Analog ground supply
General-purpose digital I/O
Input terminal for crystal oscillator XT2
General-purpose digital I/O
Output terminal of crystal oscillator XT2
Capacitor for backup subsystem. Do not load this pin externally. For capacitor
values, see C
BAK
in
Backup or secondary supply voltage. If backup voltage is not supplied, connect to
DVCC externally.
I/O
General-purpose digital I/O
RTCCLK output
Digital power supply
Digital ground supply
I
Test mode pin; selects digital I/O on JTAG pins
Spy-bi-wire input clock
General-purpose digital I/O
Test data output port
General-purpose digital I/O
Test data input or test clock input
PJ.2/TMS
94
E7
I/O
General-purpose digital I/O
Test mode select
PJ.3/TCK
95
D6
I/O
General-purpose digital I/O
Test clock
Reset input (active low)
RST/NMI/SBWTDIO
96
A3
I/O
Non-maskable interrupt input
Spy-bi-wire data input/output
General-purpose digital I/O
Comparator_B input CB0
Analog input A0 – ADC (not available on F6632, F6631, F6630 devices)
P6.1/CB1/A1
98
B3
I/O
General-purpose digital I/O
Comparator_B input CB1
Analog input A1 – ADC (not available on F6632, F6631, F6630 devices)
General-purpose digital I/O
P6.2/CB2/A2
99
A2
I/O
Comparator_B input CB2
Analog input A2 – ADC (not available on F6632, F6631, F6630 devices)
General-purpose digital I/O
Comparator_B input CB3
Analog input A3 – ADC (not available on F6632, F6631, F6630 devices)
I/O
(1)
DESCRIPTION
P7.3/XT2OUT
VBAK
VBAT
P5.7/RTCCLK
DVCC3
DVSS3
TEST/SBWTCK
85
86
87
88
89
90
91
B7
A7
D8
D7
A6
A5
B6
I/O
PJ.0/TDO
92
B5
I/O
PJ.1/TDI/TCLK
93
A4
I/O
P6.0/CB0/A0
97
B4
I/O
P6.3/CB3/A3
100
D5
I/O
Copyright © 2010–2012, Texas Instruments Incorporated
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