SLAS800 – MARCH 2013
Table 1. Available Options
(1) (2)
Device
MSP430G2955IDA38
MSP430G2955IRHA40
MSP430G2855IDA38
MSP430G2855IRHA40
MSP430G2755IDA38
MSP430G2755IRHA40
1
1
32
4096
1
1
48
4096
1
1
56
4096
BSL
EEM
Flash
(KB)
RAM
(B)
Timer_A
Timer_B
2x TA3
1x TB3
2x TA3
1x TB3
2x TA3
1x TB3
COMP_A+
Channels
8
ADC10
Channels
12
USCI_A0
USCI_B0
1
Clock
HF, LF,
DCO,
VLO
HF, LF,
DCO,
VLO
HF, LF,
DCO,
VLO
I/O
32
32
32
32
32
32
Package
Type
38-TSSOP
40-QFN
38-TSSOP
40-QFN
38-TSSOP
40-QFN
8
12
1
8
12
1
(1)
(2)
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at
Package drawings, thermal data, and symbolization are available at
Device Pinout, 38-Pin TSSOP (DA Package)
TEST/SBWTCK
DVCC
P2.5/TA1.0/ROSC
DVSS
XOUT/P2.7
XIN/P2.6
RST/NMI/SBWTDIO
P2.0/TA1CLK/ACLK/A0
P2.1/TA0INCLK/SMCLK/A1
P2.2/TA0.0/A2
P3.0/UCB0STE/UCA0CLK/A5
P3.1/UCB0SIMO/UCB0SDA
P3.2/UCB0SOMI/UCB0SCL
P3.3/UCB0CLK/UCA0STE
AVSS
AVCC
P4.0/TB0.0/CA0
P4.1/TB0.1/CA1
P4.2/TB0.2/CA2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
P1.7/TA0.2/TDO/TDI
P1.6/TA0.1/TDI
P1.5/TA0.0/TMS
P1.4/SMCLK/TCK
P1.3/TA0.2
P1.2/TA0.1
P1.1/TA0.0
P1.0/TA0CLK/ADC10CLK
P2.4/TA0.2/A4/VREF+/VEREF+
P2.3/TA0.1/A3/VREF−/VEREF−
P3.7/TA1.2/A7
P3.6/TA1.1/A6
P3.5/UCA0RXD/UCA0SOMI
P3.4/UCA0TXD/UCA0SIMO
P4.7/TB0CLK/CA7
P4.6/TB0OUTH/A15/CA6
P4.5/TB0.2/A14/CA5
P4.4/TB0.1/A13/CA4
P4.3/TB0.0/A12/CA3
2
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