MSP430L092
MSP430C09x
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SLAS673 –SEPTEMBER 2010
RAM Memory
The RAM memory is split into three ranges for different purposes: application memory, lockable application
memory, and calibration memory.
Lockable application memory and calibration memory can be protected against accidental erasure by setting a
dedicated lock bit in the special functions register (System Maintenance Register).
Peripherals
Peripherals are connected to the CPU through data, address, and control buses and can be handled using all
instructions. For complete module descriptions, see the MSP430x09x Family User's Guide (SLAU321).
Digital I/O
There are two I/O ports implemented: P1 (7 I/O lines) and P2 (4 I/O lines).
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All individual I/O bits are independently programmable.
Any combination of input, output, and interrupt conditions is possible.
Programmable pullup or pulldown on all ports.
Edge-selectable interrupt input capability for all ports on P1 and P2.
Read/write access to port-control registers is supported by all instructions.
Ports can be accessed byte-wise (P1 and P2) or word-wise in pairs (P1/P2 combo).
Oscillator and System Clock
The clock system in the MSP430x09x family of devices is supported by the Compact Clock System (CCS)
module that includes support for an internal 20-kHz current-controlled low-frequency oscillator (LF-OSC), an
internal adjustable 1-MHz current-controlled high-frequency oscillator (HF-OSC), and an external clock input from
CLKIN; however, a missing CLKIN signal does not trigger an oscillator failsafe mechanism in this family.
The CCS module is designed to meet the requirements of both low system cost and low power consumption.
The CCS provides a fast turn-on of the oscillators, less than 1 ms. The CCS module provides the following clock
signals:
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Auxiliary clock (ACLK), sourced from the 20-kHz internal LF-OSC, the 1-MHz internal HF-OSC, or CLKIN.
Main clock (MCLK), the system clock used by the CPU. MCLK can be sourced by same sources made
available to ACLK.
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Sub-Main clock (SMCLK), the subsystem clock used by the peripheral modules. SMCLK can be sourced by
same sources made available to ACLK.
VLOCLK is an ultra-low-power low-frequency clock that is available as long the device is powered.
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