MSP430xG461x
MIXED SIGNAL MICROCONTROLLER
SLAS508I − APRIL 2006 − REVISED MARCH 2011
functional block diagram
XIN/
XT2IN
XOUT
/
XT2OUT
2
2
DVCC1/2 DVSS
1/2
AVCC
AVSS
P1.x/P2.x
2x8
P3.x/P4.x
P5.x/P6.x
4x8
P7.x/P8.x
P9.x/P10.x
4x8/2x16
Oscillators
FLL+
MCLK
ACLK
SMCLK
Flash (FG)
ROM (CG)
120kB
116kB
92kB
92kB
RAM
4kB
8kB
8kB
4kB
ADC12
12−
Bit
12
Channels
DAC12
12−
Bit
2 Channels
Voltage out
OA0, OA1,
OA2
3 Op Amps
Ports P1/P2
Comparator
_A
2x8 I/O
Interrupt
capability
Ports
P3/P4
P5/P6
4x8 I/O
Ports
P7/P8
P9/P10
4x8/2x16 I/O
8MHz
CPUX
incl. 16
Registers
MAB
DMA
Controller
3 Channels
MDB
Enhanced
Emulation
(FG only
)
JTAG
Interface
Brownout
Protection
SVS
/SVM
Hardware
Multiplier
MPY,
MPYS
,
MAC,
MACS
Timer_B7
Watchdog
WDT+
15/16−
Bit
Timer_A3
3 CC
Registers
7 CC
Registers
,
Shadow
Reg
Basic Timer
&
Real−
Time
Clock
LCD_A
160
Segments
1,2,3,4 Mux
USCI_A0:
UART
,
IrDA, SPI
USCI_B0:
SPI, I2C
USART
1
UART, SPI
RST/NMI
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