RM48L930
RM48L730
RM48L530
SPNS176–SEPTEMBER 2011
www.ti.com
5.9.3.1 MIBSPI1 Event Trigger Hookup
Table 5-16. MIBSPI1 Event Trigger Hookup
Event #
Disabled
EVENT0
EVENT1
EVENT2
EVENT3
EVENT4
EVENT5
EVENT6
EVENT7
EVENT8
EVENT9
EVENT10
EVENT11
EVENT12
EVENT13
EVENT14
TGxCTRL TRIGSRC[3:0]
Trigger
No trigger source
GIOA[0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
GIOA[1]
GIOA[2]
GIOA[3]
GIOA[4]
GIOA[5]
GIOA[6]
GIOA[7]
N2HET1[8]
N2HET1[10]
N2HET1[12]
N2HET1[14]
N2HET1[16]
N2HET1[18]
Intern Tick counter
NOTE
For N2HET1 trigger sources, the connection to the MibSPI1 module trigger input is made
from the input side of the output buffer (at the N2HET1 module boundary). This way, a
trigger condition can be generated even if the N2HET1 signal is not selected to be output on
the pad.
NOTE
For GIOx trigger sources, the connection to the MibSPI1 module trigger input is made from
the output side of the input buffer. This way, a trigger condition can be generated either by
selecting the GIOx pin as an output pin, or by driving the GIOx pin from an external trigger
source.
5.9.3.2 MIBSPI3 Event Trigger Hookup
Table 5-17. MIBSPI3 Event Trigger Hookup
Event #
Disabled
EVENT0
EVENT1
EVENT2
EVENT3
EVENT4
EVENT5
EVENT6
EVENT7
EVENT8
EVENT9
EVENT10
EVENT11
TGxCTRL TRIGSRC[3:0]
Trigger
No trigger source
GIOA[0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
GIOA[1]
GIOA[2]
GIOA[3]
GIOA[4]
GIOA[5]
GIOA[6]
GIOA[7]
HET[8]
N2HET1[10]
N2HET1[12]
N2HET1[14]
132
Peripheral Information and Electrical Specifications
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