SPNS176
–
SEPTEMBER 2011
4.9
4.9.1
Device Memory Map
Memory Map Diagram
The figure below shows the device memory map.
0xFFFFFFFF
SYSTEM Modules
Peripherals - Frame 1
CRC
RESERVED
Peripherals - Frame 2
RESERVED
Flash Module Bus2 Interface
(Flash ECC, OTP and EEPROM accesses)
0xFFF80000
0xFF000000
0xFE000000
0xFCFFFFFF
0xFC000000
0xF07FFFFF
RESERVED
CS0
0x87FFFFFF
0x80000000
0x6FFFFFFF
0x60000000
EMIF (128MB)
SDRAM
RESERVED
EMIF (16MB * 3)
Async RAM
RESERVED
0x607FFFFF
0x60000000
reserved0x6C000000
CS4 0x68000000
CS3 0x64000000
CS2
POM (8MB)
0x202FFFFF
0x20000000
0x0843FFFF
0x08400000
0x0803FFFF
0x08000000
0x002FFFFF
0x00000000
Flash (3MB) (Mirrored Image)
RESERVED
RAM - ECC
RESERVED
RAM (256KB)
RESERVED
Flash (3MB)
Figure 4-9. Memory Map
The Flash memory is mirrored to support ECC logic testing. The base address of the mirrored Flash
image is 0x2000 0000.
Copyright
©
2011, Texas Instruments Incorporated
System Information and Electrical Specifications
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0xF0000000
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