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TAS5508CPAGR 参数 Datasheet PDF下载

TAS5508CPAGR图片预览
型号: TAS5508CPAGR
PDF下载: 下载PDF文件 查看货源
内容描述: 8通道数字音频PWM处理器 [8-Channel Digital Audio PWM Processor]
分类和应用: 消费电路商用集成电路
文件页数/大小: 107 页 / 1112 K
品牌: TI [ TEXAS INSTRUMENTS ]
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SLES257 – SEPTEMBER 2010
www.ti.com
Table 3-1. Device Outputs During Reset (continued)
SIGNAL
SDA
SIGNAL STATE
Signal input (not driven)
Because RESET is an asynchronous signal, clicks and pops produced during the application (the leading
edge) of RESET cannot be avoided. However, the transition from the hard mute state (M) to the
operational state is performed using a quiet start-up sequence to minimize noise. This control uses the
PWM reset and unmute sequence to shut down and start up the PWM. A detailed description of these
sequences is contained in the PWM section. If a completely quiet reset or power-down sequence is
desired, MUTE should be applied before applying RESET.
The rising edge of the reset pulse begins device initialization before the transition to the operational mode.
During device initialization, all controls are reset to their initial states.
shows the default control
settings following a reset.
Table 3-2. Values Set During Reset
CONTROL
Clock register
High pass
Unmute from clock error
PSVC Hi-Z
Post DAP detection automute
Eight Ch PreDAP detection automute
De-emphasis
Channel configuration control
Headphone configuration control
Serial data interface format
Individual channel mute
Automute delay
Automute threshold 1
Automute threshold 2
Modulation limit
Six- (or eight – low) channel configuration
Slew rate limit
Interchannel delay
Shutdown PWM on error
Volume and mute update rate
Treble and bass slew rate
Bank switching
Auto bank switching map
Biquad coefficients (5508)
Input mixer coefficients
Output mixer coefficients
Subwoofer sum into Ch1 and Ch2 (5508)
Ch1 and Ch2 sum in subwoofer (5508)
Bass and treble bypass
Bass and treble inline
DRC bypass (5508)
DRC inline (5508)
DRC (5508)
44
TAS5508C Controls and Status
Product Folder Link(s):
Not valid
Disabled
Hard unmute
Disabled
Enabled
Enabled
De-emphasis disabled
Configured for the default setting
Configured for the default setting
I
2
S 24 bit
No channels are muted
5 ms
< 8 bits
Same as automute threshold 1
Maximum modulation limit of 97.7%
Eight channels
Disengaged for all channels
–32, 0, –16, 16, –24, 8, –8, –24
Enabled
Volume ramp 85 ms
Update every 1.31 ms
Manual bank selection is enabled
All channels use bank 1
Set to all pass
Input N -> Channel N, no attenuation
Channel N -> Output N, no attenuation
Gain of 0
Gain of 0
Gain of 1
Gain of 0
Gain of 1
Gain of 0
DRC disabled, default values
Copyright © 2010, Texas Instruments Incorporated
SETTING