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SLES257 – SEPTEMBER 2010
Table 7-6. Channel Configuration Control Register Format
D7
0
1
–
–
–
–
–
–
–
–
–
–
–
–
D6
–
–
0
1
–
–
–
–
–
–
–
–
–
–
D5
–
–
–
–
0
1
–
–
–
–
–
–
–
–
D4
–
–
–
–
–
–
0
1
–
–
–
–
–
–
D3
–
–
–
–
–
–
–
–
0
1
–
–
–
–
D2
–
–
–
–
–
–
–
–
–
–
0
1
–
–
D1
–
–
–
–
–
–
–
–
–
–
–
–
0
1
D0
FUNCTION
Disable back-end reset sequence for a channel – BEErrorRecEn
Enable back-end reset sequence for a channel
Valid does not have to be low for this channel to be reset BEValidRst
Valid must be low for this channel to be reset
Valid does not have to be low for this channel to be muted BEValidMute
Valid must be low for this channel to be muted
Normal BEPolarity
Switches PWM+ and PWM– and inverts audio signal
Do not remap output to comply with 5182 interface
Remap output to comply with 5182 interface
Do not go to low-low in mute – BELowMute
Go to low-low in mute
Do not remap Hi-Z state to low-low state – BE5111BsMute
Remap Hi-Z state to low-low state
7.7
Headphone Configuration Control Register (0x0D)
Bit D0 is
Don't Care.
Table 7-7. Headphone Configuration Control Register Format
D7
0
1
–
–
–
–
–
–
–
–
–
–
–
–
D6
–
–
0
1
–
–
–
–
–
–
–
–
–
–
D5
–
–
–
–
0
1
–
–
–
–
–
–
–
–
D4
–
–
–
–
–
–
0
1
–
–
–
–
–
–
D3
–
–
–
–
–
–
–
–
0
1
–
–
–
–
D2
–
–
–
–
–
–
–
–
–
–
0
1
–
–
D1
–
–
–
–
–
–
–
–
–
–
–
–
0
1
D0
FUNCTION
Disable back-end reset sequence for a channel – BEErrorRecEn
Enable back-end reset sequence for a channel
Valid does not have to be low for this channel to be reset
BEValidRst
Valid must be low for this channel to be reset
Valid does not have to be low for this channel to be muted
BEValidMute
Valid must be low for this channel to be muted
Normal BEPolarity
Switches PWM+ and PWM– and inverts audio signal
Do not remap output to comply with 5182 interface
Remap output to comply with 5182 interface
Do not go to low-low in mute – BELowMute
Go to low-low in mute
Do not remap Hi-Z state to low-low state – BE5111BsMute
Remap Hi-Z state to low-low state
7.8
Serial Data Interface Control Register (0x0E)
Nine serial modes can be programmed via the I
2
C interface.
Table 7-8. Serial Data Interface Control Register Format
RECEIVE SERIAL DATA
INTERFACE FORMAT
Right-justified
Right-justified
Right-justified
WORD LENGTHS
16
20
24
D7–D4
0000
0000
0000
D3
0
0
0
D2
0
0
0
D1
0
0
1
D0
0
1
0
75
Copyright © 2010, Texas Instruments Incorporated
Serial-Control Interface Register Definitions
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