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SLAS052G – MARCH 1992 – REVISED JANUARY 2006
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
(1)
UNIT
V
CC
, see
V
I
V
O
V
ref+
V
ref-
(2)
Supply voltage range
Input voltage range
Output voltage range
Positive reference voltage
Negative reference voltage
Peak input current (any input)
Peak total input current (all inputs)
TLC1542C, TLC1543C
TLC1542I, TLC1543I
TLC1542Q, TLC1543Q
TLC1542M
-0.5 V to 6.5 V
-0.3 V to V
CC
+ 0.3 V
-0.3 V to V
CC
+ 0.3 V
V
CC
+ 0.1 V
-0.1 V
±20
mA
±30
mA
0°C to 70°C
-40°C to 85°C
-40°C to 125°C
-55°C to 125°C
-65°C to 150°C
260°C
T
A
Operating free-air temperature range
T
stg
Storage temperature range,
Lead temperature 1,6 mm (1/16 inch) from the case for 10 seconds
(1)
(2)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to digital ground with REF- and GND wired together (unless otherwise noted).
RECOMMENDED OPERATING CONDITIONS
MIN
V
CC
V
ref+
,
see
(1)
(1)
(1)
NOM
5
V
CC
0
MAX
5.5
UNIT
V
V
V
Supply voltage
Positive reference voltage
Negative reference voltage
Differential reference voltage
Analog input voltage ,see
(1)
4.5
V
ref-
, see
V
ref+
-V
ref-
, see
2.5
0
V
CC
= 4.5 V to 5.5 V
V
CC
= 4.5 V to 5.5 V
100
0
0
1.425
0
190
190
2
V
CC
V
CC
+0.
2
V
CC
0.8
V
V
V
V
ns
ns
ns
µs
V
IH
V
IL
t
su(A)
, see
t
h(A)
, see
t
h(CS)
, see
t
su(CS)
, see
t
wH(I/O)
t
wL(I/O)
t
t(I/O)
, see
t
t(CS)
(1)
(2)
(3)
(4)
(4)
(2)
High-level control input voltage
Low-level control input voltage
Setup time, address bits at data input before I/O
CLOCK↑
Hold time, address bits after I/O CLOCK↑
Hold time, CS low after last I/O CLOCK↓
Setup time, CS low before clocking in first
address bit
Clock frequency at I/O CLOCK, see
Pulse duration, I/O CLOCK high,
Pulse duration, I/O CLOCK low,
and
Transition time, I/O CLOCK,
Transition time, ADDRESS and CS,
(3)
and
2.1
MHz
ns
ns
1
10
µs
µs
Analog input voltages greater than that applied to REF+ convert as all ones (1111111111), while input voltages less than that applied to
REF- convert as all zeros (0000000000). The device is functional with reference voltages down to 1 V (V
ref+
- V
ref-
); however, the
electrical specifications are no longer applicable.
To minimize errors caused by noise at CS, the internal circuitry waits for a setup time plus two falling edges of the internal system clock
after CS↓ before responding to control input signals. Therefore, no attempt should be made to clock in an address until the minimum CS
setup time has elapsed.
For 11- to 16-bit transfers, after the tenth I/O CLOCK falling edge (≤ 2 V) at least 1 I/O CLOCK rising edge (≥ 2 V) must occur within 9.5
µs.
This is the time required for the clock input signal to fall from V
IH
min to V
IL
max or to rise from V
IL
max to V
IH
min. In the vicinity of normal
room temperature, the devices function with input clock transition time as slow as 1
µs
for remote data-acquisition applications where
the sensor and the A/D converter are placed several feet away from the controlling microprocessor.
8
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