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TPS7A6333QDRKRQ1 参数 Datasheet PDF下载

TPS7A6333QDRKRQ1图片预览
型号: TPS7A6333QDRKRQ1
PDF下载: 下载PDF文件 查看货源
内容描述: 300 - mA的40 -V低压差具有超低Iq的稳压器 [300-mA 40-V LOW-DROPOUT REGULATOR WITH ULTRALOW Iq]
分类和应用: 稳压器
文件页数/大小: 33 页 / 1255 K
品牌: TI [ TEXAS INSTRUMENTS ]
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SLVSAB1D – JUNE 2011 – REVISED JULY 2012
DISSIPATION RATINGS
JEDEC STANDARD
JEDEC standard PCB,
high-K, JESD 51-5
JEDEC Standard PCB
high-K, JESD 51-5
PACKAGE
14 pin
TSSOP-PWP
10 pin VSON-DRK
T
A
< 25°C POWER
RATING (W)
2.45
2.41
DERATING FACTOR ABOVE
T
A
= 25°C (°C/W)
51
51.7
T
A
= 85°C POWER
RATING (W)
1.27
1.25
RECOMMENDED OPERATING CONDITIONS
DESCRIPTION
V
IN
, V
EN
nRST, RDELAY, nWD_EN, WD_FLT
WD_FLAG
(2)
, WD, FB
(3)
T
J
(1)
(2)
(3)
(1)
MIN
4
0
-40
MAX
40
5.25
150
UNIT
V
V
°C
Unregulated input voltage
,
Low voltage input or output
Operating junction temperature range
Applicable for TPS7A63xx-Q1 only
Applicable for TPS746401-Q1 only
Applicable for TPS7A6301-Q1 and TPS7A6401-Q1 only
ELECTRICAL CHARACTERISTICS
V
IN
= 14 V, T
J
= –40ºC to 150ºC (unless otherwise noted)
PARAMETER
Input Voltage (VIN Pin)
V
IN
I
QUIESCENT
I
SLEEP
V
IN-UVLO
V
IN(POWERUP)
V
IL
V
IH
Input voltage
Quiescent current
Sleep or shutdown current
Undervoltage lockout
voltage
Power-up voltage
Logic-input low level
Logic-input high level
Fixed V
OUT
value (3.3 V, 5 V or a programmed value),
I
OUT
= 10 mA to 200 mA, V
IN
= V
OUT
+ 1 V to 16V
V
IN
= 6 V to 28 V, I
OUT
= 10 mA, V
OUT
= 5 V
V
IN
= 6 V to 28 V, I
OUT
= 10 mA, V
OUT
= 3.3 V
I
OUT
= 10 mA to 200 mA, V
IN
= 14 V, V
OUT
= 5 V
I
OUT
= 10 mA to 200 mA, V
IN
= 14 V, V
OUT
= 3.3 V
I
OUT
= 200 mA
I
OUT
= 150 mA
VIN to VOUT resistance
V
OUT
in regulation
[V
OUT
in regulation, V
OUT
= 3.3 V, V
IN
= 6 V]
V
OUT
= 0 V (VOUT pin is shorted to ground)
(2)
TEST CONDITIONS
MIN
V
OUT
+
0.3 V
TYP
MAX
UNIT
V
OUT
= 2.5 V to 7 V, I
OUT
= 1 mA
V
IN
= 8.2 V to 18 V, V
EN
= 5 V,
I
OUT
= 0.01 mA to 0.75 mA
V
IN
= 8.2 V to 18 V, V
EN
< 0.8 V,
I
OUT
= 0 mA (no load), T
A
= 125°C
Ramp V
IN
down until output is turned OFF
Ramp V
IN
up until output is turned ON
40
35
3
3.16
3.45
V
µA
µA
V
V
Device Enable Input (EN Pin)
0
2.5
0.8
40
V
V
Regulated Output Voltage (VOUT Pin)
V
OUT
ΔV
LINE-REG
ΔV
LOAD-REG
V
DROPOUT
R
SW (1)
I
OUT
I
CL
Regulated output voltage
Line regulation
Load regulation
Dropout voltage
(V
IN
– V
OUT
)
Switch resistance
Output current
Output current limit
–2%
2%
15
20
25
35
500
300
2
0
0
350
200
300
1000
mV
mV
mV
mV
mV
mV
Ω
mA
mA
mA
(1)
(2)
This test is done with V
OUT
in regulation, measuring the V
IN
– V
OUT
parameter when V
OUT
drops by 100 mV from the programmed value
(of V
OUT
) at specified loads.
Design Information - not tested; specified by characterization.
3
Copyright © 2011–2012, Texas Instruments Incorporated
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