SLLS372E
–
MARCH 2000
–
REVISED NOVEMBER 2011
TERMINAL FUNCTIONS (continued)
TERMINAL
NAME
V
CC
XTAL1/CLK48
XTAL2
NO.
3, 25
30
29
I
O
I/O
DESCRIPTION
3.3-V supply voltage
Crystal 1/48-MHz clock input. When MODE is low, XTAL1/CLK48 is a 6-MHz crystal input with 50% duty cycle. An
internal APLL generates the 48-MHz and 12-MHz clocks used internally by the ASIC logic. When MODE is high,
XTAL1/CLK48 acts as the input of the 48-MHz clock and the internal APLL logic is bypassed.
Crystal 2. XTAL2 is a 6-MHz crystal output. This terminal must be left open when using an oscillator.
ABSOLUTE MAXIMUM RATINGS
(1)
over operating free-air temperature range (unless otherwise noted)
MIN
V
CC
V
I
V
O
I
IK
I
OK
T
stg
T
A
(1)
(2)
Supply voltage range
Input voltage range
Output voltage range
Input clamp current
Output clamp current
Storage temperature range
Operating free-air temperature range
V
I
<
0 V or V
I
<
V
CC
V
O
<
0 V or V
O
<
V
CC
–65
0
(2)
MAX
3.6
V
CC
+ 0.5
V
CC
+ 0.5
±20
±20
150
70
UNIT
V
V
V
mA
mA
°C
°C
–0.5
–0.5
–0.5
Stresses beyond those listed under
“absolute
maximum ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under
“recommended
operating
conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage levels are with respect to GND.
RECOMMENDED OPERATING CONDITIONS
PARAMETER
V
CC
V
I
V
O
V
IH(REC)
V
IL(REC)
V
IH(TTL)
V
IL(TTL)
T
A
R
(DRV)
f
(OPRH)
f
(OPRL)
V
ICR
t
t
T
J
(1)
(2)
(3)
Supply voltage
Input voltage, TTL/LVCMOS
(1)
Output voltage, TTL/LVCMOS
(2)
MIN
3
0
0
2
2
0
0
22 (-5%)
NOM
3.3
MAX
3.6
V
CC
V
CC
V
CC
0.8
V
CC
0.8
70
22 (+5%)
12
1.5
UNIT
V
V
V
V
V
V
V
°C
Ω
Mb/s
Mb/s
V
ns
°C
High-level input voltage, signal-ended receiver
Low-level input voltage, signal-ended receiver
High-level input voltage, TTL/LVCMOS
Operating free-air temperature
External series, differential driver resistor
Operating (dc differential driver) high speed mode
Operating (dc differential driver) low speed mode
Common mode, input range, differential receiver
Input transition times, TTL/LVCMOS
Junction temperature range
(3)
(1)
(1)
Low-level input voltage, TTL/LVCMOS
(1)
0.8
0
0
2.5
25
115
Applies for input and bidirectional buffers.
Applies for output and bidirectional buffers.
These junction temperatures reflect simulated conditions. Absolute maximum junction temperature is 150°C. The customer is
responsible for verifying junction temperature.
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©
2000–2011, Texas Instruments Incorporated
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