UCC28083, UCC28084, UCC28085, UCC28086
UCC38083, UCC38084, UCC38085, UCC38086
SLUS488E − SEPTEMBER 2002 − REVISED JULY 2009
detailed pin descriptions
CTRL:
The error voltage is typically generated by a secondary-side error amplifier and transmitted to the
primary-side referenced UCC3808x by means of an opto-coupler. CTRL has an internal divider ratio of 0.45 to
maintain a usable range with the minimum V
DD
of 4.1 V. The UCC38083/UCC38084 family features a built-in
full-cycle soft start while the UCC38085/6 does not.
For the UCC38083/4, soft-start is implemented as a clamp at the input to the PWM comparator. This causes
the output pulses to start near 0% duty cycle and increase until the clamp exceeds the CTRL voltage.
ISET:
Program the slope compensation current ramp by connecting a resistor, RSET, from ISET to ground. The
voltage of the ISET pin tracks the 1.5-V internal oscillator ramp, as shown in Figure 1.
VCS
10 kW
IRAMP
VDD
I RAMP, peak = 5 x ISET, peak
UCC38083
I RAMP
RF
1 kW
1 CTRL VDD 8
2 ISET OUTA 7
3 CS
220
m
F
4 RT
RT
165 k
W
GND 5
OUTB 6
ISET
1
mF
OUTA
OUTB
Figure 1. Full Duty Cycle Output
The compensating current source, I
SLOPE
, at the CS pin is proportional to the ISET current, according to the
relation:
I
SLOPE
+
5
I
SET
(1)
The ramping current due to I
SLOPE
develops a voltage across the effective filter impedance that is normally
connected from the current sense resistor to the CS input. In order to program a desired compensating slope
with a specific peak compensating ramp voltage at the CS pin, use the RSET value in the following equation:
RSET
+
V
Where V
OSC(peak)
5 RF
RAMP VOLTAGE HEIGHT
(2)
OSC(peak)
+
1.5 V
Notice that the PWM Latch drives an internal MOSFET that will discharge an external filtering capacitor on the
CS pin. Thus, I
SLOPE
will appear to terminate when the PWM comparator or the cycle-by-cycle current limit
comparator sets the PWM latch. The actual compensating slope is not affected by premature termination of the
switching cycle.
6
www.ti.com
TI [ TEXAS INSTRUMENTS ]
