SLUS646J
–
NOVEMBER 2005
–
REVISED JULY 2011
TERMINAL COMPONENTS (continued)
TERMINAL
NAME
NO.
I/O
DESCRIPTION
(1)
(2) (3)
C
SS
u
I
SS
t
SS(min)
(due power limit)
A
CS(FB)
V
PL
*
V
CS(os)
2
where t
SS(min)
is the greater of:
t
SS(min)
+
*
R
LOAD(ss)
C
OUT
2
n 1
*
V
OUT
* DV
OUT(step)
R
LOAD(ss)
P
OUT(max)limit
SS
1
I
or
C
OUT
V
OUT
t
SS(min)
+
2 P
LIM
•
•
•
•
•
•
•
2
(2)
R
LOAD(ss)
is the effective load impedance during soft-start
(4)
ΔV
OUT(step)
is the allowed change in V
OUT
due to a load step
(4)
P
OUT(max limit)
Programmed power limit level, in W
(4)
A
CS(FB)
is the current sense gain
(5)
V
CS(os)
is the CS offset voltage
(5)
I
SS
is the soft-start charging current
(5)
V
PL
is the power limit threshold
(5)
R
ST2
+
V
BE(off)
I
STATUS(leakage)
R
ST2
VDD
(uvlo*on)
* V
BE(sat)
* R
DS(on)
I
CC
b
sat
I
CC
b
sat
* R
DS(on)
V
BE(sat)
R
ST1
+
STATUS
8
O
R
ST2
) V
BE(sat)
where:
•
β
SAT
is the gain of transistor Q
ST
in saturation
•
V
BE(sat)
is the base-emitter voltage of transistor Q
ST
in saturation
•
VDD
(uvlo-on)
is the startup threshold
(5)
•
I
CC
is the collector current of Q
ST
•
I
STATUS(leakage)
is the maximum leakage/off current of the STATUS pin
(5)
•
V
BE(off)
is the maximum allowable voltage across the base emitter junction that will not turn Q
ST
on
•
R
DS(on)
is the R
DS(on)
of STATUS
(5)
(4)
(5)
8
Refer to the UCC28600 Design Calculator (TI Literature Number SLVC104) or laboratory measurements for currents, voltages and times
in the operational circuit.
Refer to the Electrical Characteristics Table for constant parameters.
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©
2005–2011, Texas Instruments Incorporated
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