SLUS495H − SEPTEMBER 2001 − REVISED AUGUST 2007
UCC29002
UCC29002/1
UCC39002
electrical characteristics V
DD
= 12 V, 0°C < T
A
< 70°C for the UCC39002, −40°C < T
A
< 105°C for the
UCC29002 and UCC29002/1, T
A
= T
J
(unless otherwise noted) (continued)
error amplifier
PARAMETER
VOH
gM
IOH
High-level output voltage
Transconductance
High-level output current
TEST CONDITIONS
IOUT_EAO = 0 mA
IEAO =
±
50
µA
VLS − VCSO = 0.4 V,REAO = 2.2 kΩ
MIN
3.50
0.70
TYP
3.65
14
0.85
1.00
MAX
3.80
UNITS
V
mS
mA
ADJ buffer
VIO
ISINK
ISINK
(1)
(2)
PARAMETER
Input offset voltage(2)
Sink current
TA = 25_C
0_C
≤
TA
≤
70_C
−40_C
≤
TA
≤
105_C
Enables the load share bus at start-up.
Ensured by design. Not production tested.
TEST CONDITIONS
VADJ = 1.5 V,
VADJ = 5.0 V,
VADJ = 5.0 V,
LS = floating
VEAO = 0 V,
VEAO= 0 V
VEAO= 2.0 V
MIN
0
3.60
3.45
3.35
TYP
−60
5
3.95
3.95
3.95
10
4.30
4.45
4.55
mA
MAX
UNITS
mV
µA
Sink current
TERMINAL FUNCTIONS
TERMINAL
NAME
ADJ
CS−
CS+
CSO
EAO
GND
LS
VDD
NO.
5
1
2
8
6
4
7
3
I/O
DESCRIPTION
Adjust amplifier output. This is the buffered output of the error amplifier block to adjust output
voltage of the power supply being controlled. This pin must always be connected to a voltage
equal to or greater than VEAO + 1 V.
Current sense amplifier inverting input.
Current sense amplifier non-inverting input.
Current sense amplifier output.
Output for load share error amplifier. (Transconductance error amplifier.)
Ground. Reference ground and power ground for all device functions. Return the device to the
low current sense− path of the converter.
Load share bus. Output of the load share bus driver amplifier.
Power supply providing bias to the device. Bypass with a good quality, low ESL 0.1-µF to 1-µF,
maximum, capacitor as close to the VDD pin and GND as possible.
O
I
I
O
O
−
I/O
I
4
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