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UCC39002DR 参数 Datasheet PDF下载

UCC39002DR图片预览
型号: UCC39002DR
PDF下载: 下载PDF文件 查看货源
内容描述: 先进的8引脚负载共享控制器 [ADVANCED 8-PIN LOAD-SHARE CONTROLLER]
分类和应用: 电源电路电源管理电路光电二极管信息通信管理控制器
文件页数/大小: 27 页 / 1023 K
品牌: TI [ TEXAS INSTRUMENTS ]
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SLUS495H − SEPTEMBER 2001 − REVISED AUGUST 2007
UCC29002
UCC29002/1
UCC39002
FUNCTIONAL DESCRIPTION
error amplifier (EAO)
As pictured in the block diagram, the UCC39002 employs a transconductance also called g
M
type error
amplifier. The g
M
amplifier was chosen because it requires only one pin, the output to be accessible for
compensation.
The purpose of the error amplifier is to compare the average, per module current level to the output current of
the respective module controlled by the UCC39002. It is accommodated by connecting the buffered V
LS
voltage
to its non−inverting input and the V
CSO
signal to its inverting input. If the average per module current,
represented by the load share bus is higher than the module’s own output current, an error signal will be
developed across the compensation components connected between the EAO pin and ground. The error signal
is than used by the adjust amplifier to make the necessary output voltage adjustments to ensure equal output
currents among the parallel operated power supplies.
In case the UCC39002 assumes the role of the master load share controller in the system or it is used in
conjunction with a stand alone power module, the measured current signal on V
CSO
is approximately equal to
the V
LS
voltage. To avoid erroneous output voltage adjustment, the input of the error amplifier incorporates a
typically 25 mV offset to ensure that the inverting input of the error amplifier is biased higher than the
non−inverting input. Consequently, when the two signals are equal, there will be no adjustment made and the
initial output voltage set point is maintained.
adjust amplifier output (ADJ)
A current proportional to the error voltage V
EAO
on pin 6 is sunk by the ADJ pin. This current flows through the
adjust resistor R
ADJ
and changes the output voltage of the module controlled by the UCC39002. The amplitude
of the current is set by the 500-Ω internal resistor between ground and the emitter of the amplifier’s open
collector output transistor according to Figure 1. The adjust current value is given as:
I
ADJ
+
V
EAO
500
W
(2)
At the master module V
EAO
is 0 V, thus the adjust current must be zero as well. This ensures that the output
voltage of the master module remains at its initial output voltage set point at all times.
Furthermore, at insufficient bias level, during a fault or when the UCC39002 is disabled, the non-inverting input
of the adjust amplifier is pulled to ground to prevent erroneous adjustment of the module’s output voltage by
the load share controller.
8
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