XIO2221
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SCPS216A–JULY 2009–REVISED FEBRAURY 2010
Table 10-4. Page 0 (Port Status) Register Field Description (continued)
FIELD
SIZE
TYPE
DESCRIPTION
Max_port_speed
3
Rd/Wr
Maximum port speed. The maximum speed at which a port is allowed to operate in beta
mode. The encoding is:
000 = S100
001 = S200
010 = S400
011 = S800
100 = S1600
101 = S3200
110 = Reserved
111 = Reserved
An attempt to write to the register with a value greater than the hardware capability of the port
results in the value for the maximum speed of which the port is capable being stored in the
register. The port uses this register only when a new connection is established in the beta
mode. The power reset value is the maximum speed capable of the port. Software can modify
this value to force a port to train at a lower than maximum, but no lower than minimum speed.
LPP
1
3
Rd
Rd
Local plug present. This flag is set permanently to 1.
Cable_speed
Cable speed. This variable is set to the value for the maximum speed that the port is capable
of. The encoding is the same as for Max_port_speed.
Connection_unreliable
Beta_mode
1
1
Rd/Wr
Rd
Connection unreliable. If this bit is set to 1, a beta-mode speed negotiation has failed or
synchronization has failed. A write of 1 to this field resets the value to 0.
Operating in beta mode. If this bit is 1, the port is operating in beta mode; it is equal to 0
otherwise (that is, when operating in IEEE Std 1394a-2000 mode, or when disconnected). If
Con is 1, RxOK is 1, and Beta_mode is 0, the port is active and operating in the IEEE Std
1394a-2000 mode.
Port_error
8
1
Rd/Wr
Rd
Port error. Incremented whenever the port receives an invalid codeword, unless the value is
already 255. Cleared when read (including being read by means of a remote access packet).
Intended for use by a single bus-wide diagnostic program.
Loop_disable
Loop disable. This bit is set to 1 if the port has been placed in the loop-disable state as part of
the loop-free build process (the PHYs at either end of the connection are active, but if the
connection itself were activated, a loop would exist). Cleared on bus reset and on
disconnection.
In_standby
1
1
Rd
In standby. This bit is set to 1 if the port is in standby power-management state.
Hard_disable
Rd/Wr
Hard disable. No effect unless the port is disabled. If this bit is set to 1, the port does not
maintain connectivity status on an ac connection when disabled. The values of the Con and
RxOK bits are forced to 0. This flag can be used to force renegotiation of the speed of a
connection. It can also be used to place the device into a lower-power state because when
hard disabled, a port no longer tones to maintain IEEE Std 1394b-2002 ac-connectivity status.
The vendor ID page identifies the vendor/manufacturer and compliance level. The page is selected by
writing 1 to the Page_Select field in base register 7. Table 10-5 shows the configuration of the vendor ID
page, and Table 10-6 shows the corresponding field descriptions.
Table 10-5. Page 1 (Vendor ID) Register Configuration
BIT POSITION
ADDRESS
0
1
2
3
4
5
6
7
1000
1001
1010
1011
1100
1101
1110
1111
Compliance
Reserved
Vendor_ID[0]
Vendor_ID[1]
Vendor_ID[2]
Product_ID[0]
Product_ID[1]
Product_ID[2]
Copyright © 2009–2010, Texas Instruments Incorporated
Physical Layer (PHY) Section
183
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