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T66H0004A-Q 参数 Datasheet PDF下载

T66H0004A-Q图片预览
型号: T66H0004A-Q
PDF下载: 下载PDF文件 查看货源
内容描述: 80输出LCD段/通用驱动器IC [80 output LCD Segment/Common Driver IC]
分类和应用: 驱动器
文件页数/大小: 32 页 / 602 K
品牌: TMT [ TAIWAN MEMORY TECHNOLOGY ]
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tm
Pin
V
DD
Vss
V
EE
V0,V12,
V43,V5
TE
CH
T66H0004A
PIN DESCRIPTION
I/O
Name
Power supply
LCD driver
output voltage
level
LCD driver
output
Function
Interface
Logical “High” input port(+5V±10%,+3V±10%)
Power
0V(GND)
Logical “Low” for high voltage part
Bias supply voltage input to drive the LCD. Bias
voltage divided by the resistance is usually used as a Power
supply voltage source (refer to NOTE 2).
Display data output pin which corresponds to the
respective latch contents. One of V0, V12, V34 and V5
LCD
is selected as a display driving voltage source
according to the combination of the latch data level
and M signal (refer to NOTE 1).
Clock pulse input for the bi-directional shift register.
- In segment driver application mode, the data is
shifted to 20x4-bit segment data shift.
The clock pulse, which was input when the enable bit
(ELB/ERB) is in not active condition, is invalid.
Controller
- In common driver application mode, the data is
shifted to 80-bit common data bi-directional shift
register by the CL1 clock.
Hence, this clock pin is not used (Open or connect this
pin to VDD).
Alternate signal input pin for LCD driving.
Normal frame inversion signal is input in to this pin.
Controller
I
SC1-SC80
O
CL2
I
Data shift
clock
M
I
AC signal for
LCD driver
output
CL1
I
DISPOFFB
I
CS
I
AMS
I
- In segment driver application mode, this signal is
used for latching the shift register contents at the
falling edge of this clock pulse.
Data latch
CL1 pulse “High” level initializes power-down Controller
clock
function block.
- In common driver application mode, CL1 is used as a
shifting clock of common output data.
Control input pin to fix the driver output (SC1-SC80)
Display OFF to V0 level, during “Low” value input. LCD becomes
Controller
control
non-selected by V0 level output from every output of
segment drivers and every output of common drivers.
When CS = ”Low”, T66H0004A is used as an 80-bit
COM/SEG segment driver.
VDD/VSS
mode control When CS = ”High”, T66H0004A is set to an 80-bit
common driver.
According to the input value of the AMS and the CS
pin, application mode of T66H0004A is differs as
shown below.
CS AMS
Application mode
0
4-bit parallel interface mode
SEG
Application
0
VDD/VSS
mode select
0
1
1-bit serial interface mode
1
0
Single type application mode
COM
D1_SID,
D2_DL,
I/O
1
1
Dual type application mode
Display data - In segment driver application mode, these pins are
Controller
input/serial used as 4-bit data input pin (when 4-bit parallel
TM Technology Inc. reserves the right
P. 6
to change products or specifications without notice.
Publication Date: MAR. 2004
Revision:A