tm
TE
CH
T66H0004A
NOTE 3. Data Shift Direction according to Control Signals
(1) When CS = ”Low”(Segment driver application)
AMS SHL
Application
Data Direction
Input Pin
mode
s s s s
c c c c
1 2 3 4
D D D D
1 2 3 4
s
c
7
3
s
c
7
4
s
c
7
5
s
c
7
6
s
c
7
7
s
c
7
8
s
c
7
9
s
c
8
0
L
D1
D2
data
D3
D4
D D D D D D D D
1 2 3 4 1 2 3 4
Shift Direction
last data
first
L
4-Bit Parallel
Data Transfer
Mode(SEG)
s s s s
c c c c
1 2 3 4
D D D D
4 3 2 1
s
c
7
3
s
c
7
4
s
c
7
5
s
c
7
6
s
c
7
7
s
c
7
8
s
c
7
9
s
c
8
0
D1_SID,
D2_DL,
D3_DM,
D4_DR
H
D D D D D D D D
4 3 2 1 4 3 2 1
Shift Direction D1
D2
D3
D4
first
last data
data
L
1-Bit Serial
Data Transfer
Mode (SEG)
H
s s s s
c c c c
1 2 3 4
s
c
7
3
s
c
7
4
s
c
7
5
s
c
7
6
s
c
7
7
s
c
7
8
s
c
7
9
s
c
8
0
Shift Direction
H
last data (D1_SID)
data
s s s s
c c c c
1 2 3 4
s
c
7
3
s
c
7
4
s
c
7
5
s
c
7
6
s
c
7
7
s
c
7
8
s
c
7
9
s
c
8
0
first
D1_SID
Shift Direction
first data
last data
TM Technology Inc. reserves the right
P. 9
to change products or specifications without notice.
Publication Date: MAR. 2004
Revision:A
TMT [ TAIWAN MEMORY TECHNOLOGY ]
