TMC332 DATA SHEET (V. 2.04 / November 9, 2009)
10
7 Application circuit notes
7.1 SPI chain details
When using the TMC428 to drive the TMC332, the SDO line of the SPI bus, leading to the
microcontroller is shared between the TMC332 and the TMC428. Usually the TMC428 requires
external logic if the SPI bus has to be shared with other ICs. To avoid another IC, the TMC332
includes logic which switches the SDO signal of the TMC428 through as long as the nSCS428 input is
low (active). In all other conditions, the line uses the SDO signal of the TMC332. This means that both
chips are connected parallel with distinct chip select lines. That makes it possible to send small
datagrams either to the TMC428 or to the TMC332 instead of having to send a large datagram
through a daisy chain of both chips.
Since it makes no sense to write the same data to both chips at once, only one chip select line should
be active. If both chip select lines are active and data is transferred, both chips will evaluate the data
but only the output of the TMC428 will be returned.
If the step/direction input is used, the nSCS_428 pin should be connected to 3.3V and the
SDO_OF_428 pin should be connected to GND. When using a TMC428, the STP and DIR pins should
be connected to GND.
7.2 Gate control output polarity (PH, PL pins)
The PH and PL pins define the polarity of the high- respectively low-side-gates of the bridges. When
using non inverting gate drivers and N-MOSFETS on the high side and the low side, both pins would
be tied to 3.3V.
If one of the pins sets the wrong polarity, both transistors in the bridge would be switched at once and
most probably trigger the over current protection. If both polarities are inverted, the short circuit state
would only last as long as the break-before-make delay and if this time is too short to trigger the over
current protection, this would lead to a high power consumption in the bridge transistors.
7.3 Encoder input pins
If no encoder is used in the application, the encoder input pins ENC_A, ENC_B and ENC_N pins
should be connected to either GND or 3.3V.
7.4 Current regulation pins
If no current measurement/regulation and no full step mode is needed in the application circuit (when
the motor is only operated at low speeds), the external current sensing parts can be omitted. In this
case, the comparator inputs (CMPnP and CMPnN, with n = 1, 2, 3, 4) should be connected to GND.
If full step mode is needed, all inputs should be connected together and should be high, as long as the
motor current is too high (The bridges are turned on while no input is high, where CMP1P/N are not
evaluated in three phase stepper mode and the phases are evaluated separately in two phase stepper
mode).
7.5 Over current protection
An external signal, either created by another integrated circuit or by some discrete components can be
used to detect over current conditions in the motor power path. The TMC332 provides two
complementary inputs, which disable the bridges immediately. This over current condition is not reset
automatically but needs a SPI datagram to be sent to the TMC332. The datagram contains the set O
(clear over current condition) bit: $88 00 00 01
Usually only one of the two inputs is used and the other is tied to GND or 3.3V, to disable its function:
Over current signal active level
OVC_DISABLE OVC_NDISABLE
low
high
GND
signal
signal
3.3V
The state of the high and low side outputs during an over current condition is defined by the OVC_PH
and OVC_PL pins, which work equivalent to the PH and PL pins.
The pin OVC is a representation of the over current flag in the register bank and can be used to trigger
an interrupt in a microcontroller.
Copyright © 2009 TRINAMIC Motion Control GmbH & Co. KG
TRINAMIC [ TRINAMIC MOTION CONTROL GMBH & CO. KG. ]
