TMC6130 DATASHEET (Rev. 0.90 / 2014-MAR-10) PRELIMINARY
11
3.2 100% PWM with Bootstrap
A current is drawn from the VCP_SW pin to the phase pins. This current will discharge the gate voltage
on top of any external pull down gate resistance.
CALCULATION EXAMPLE 1
CALCULATION EXAMPLE 2
Parameter
bootstrap
VCP_reg
Qbootstr
QFET
Value
Unit
nF
V
Parameter
bootstrap
VCP_reg
Qbootstr
QFET
Value
Unit
nF
V
330
12
100
12
3960
200
11.4
0.75
15
nC
nC
V
1200
120
10.9
nC
nC
V
VGS_initial
Rcp_leak
Leakage
On time
Qleak
VGS_initial
MΩ
µA
ms
nC
V
Leakage
On time
Qleak
15
10
µA
ms
nC
V
60
914
9.4
152
9.8
VGS_end
VGS_drop
VGS_end
VGS_drop
2.06
V
1.13
V
This gate leakage will limit the maximum state time during which 100% PWM can be applied.
3.3 Current Consumption in Sleep Mode
Sleep mode is activated when the supply input VCC is pulled below VCC_SLEEP level. In sleep mode, the
current consumption is reduced to ISSLEEP
.
Pin
Current consumption in Sleep Mode
Input/Output
BHx
Input pins, supplied from VCC
GND
BLx
ENABLE
VREF
ERROR
CURRENT
VCP_REG
VCP
Supplied from VCC
GND
GND
~VBAT
GND
Supply regulator disabled
Externally connected to supply.
Charge pump disabled.
VCP_SW
VCPx
Any charge that remains after VCP_REG is disabled will leak to GND
ground.
HSx
VM > 4.5V
BMx
In sleep mode, gate-discharge-resistors (RSGD) between HSx and GND
BMx are activated.
LSx
VM > 4.5V
GND
In sleep mode, gate-discharge-resistors (RSGD) between LSx and
DGND are activated.
ATTENTION!
In case input pins are externally pulled high while VCC is low, current will flow into VCC via internal
protection diodes. This condition is not allowed!
When VCC is pulled low, also ERROR will go low. This should not be interpreted as a diagnostic
interrupt.
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