Preliminary
VG3617161DT
16Mb CMOS Synchronous Dynamic RAM
VIS
(2/3)
Current state
CS
RAS
CA
WE
Address
Command
Action
Notes
Read with auto
precharge
H
L
L
L
L
L
L
L
L
H
X
H
H
H
H
L
X
H
H
L
X
H
L
X
DESL
Continue burst to end ® Prech arg ing
X
NOP
Continue burst to end ® Prech arg ing
X
BST
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
H
L
BA,CA,A10
BA,CA,A10
BA,RA
BA,A10
X
READ/READA
WRIT/WRITA
ACT
L
H
H
L
H
L
3
3
L
PRE/PALL
PEF/SELF
MRS
L
H
L
L
L
Op-Code
X
Write with auto
precharge
X
X
X
DESL
Continue burst to end ® Write
recovering with auto precharge
L
H
H
H
X
NOP
Continue burst to end ® Write
recovering with auto precharge
L
L
L
L
L
L
L
H
H
H
H
L
H
L
L
H
L
X
BST
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
BA,CA,A10
BA,CA,A10
BA,RA
BA,A10
X
READ/READA
WRIT/WRITA
ACT
L
H
H
L
H
L
3
3
L
PRE/PALL
REF/SELF
MRS
L
H
L
L
L
Op-code
X
Precharging
X
X
X
DESL
Nop ® Enter idle after tRP
Nop ® Enter idle after tRP
Nop ® Enter idle after tRP
L
L
H
H
H
H
H
L
X
X
NOP
BST
L
L
L
L
H
H
L
L
L
H
L
BA,CA,A10
BA,CA,A10
BA,RA
READ/READA
WRIT/WRITA
ACT
ILLEGAL
ILLEGAL
ILLEGAL
3
3
3
H
H
H
L
L
BA,A10
PRE/PALL
Nop ® Enter idle after tRP
L
L
L
L
L
L
H
L
X
REF/SELF
MRS
ILLEGAL
ILLEGAL
Op-Code
X
Row activating
H
X
X
X
DESL
Nop ® Enter row active after tRCD
Nop ® Enter row active after tRCD
L
L
H
H
H
H
H
L
X
X
NOP
BST
Nop ® Enter row active after tRCD
L
L
L
L
L
L
H
H
L
L
L
L
L
L
H
L
BA,CA,A10
BA,CA,A10
BA,RA
READ/READA
WRIT/WRITA
ACT
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
3
3
H
H
L
H
L
3,10
3
BA,A10
X
PRE/PALL
REF/SELF
MRS
H
L
L
Op-Code
Document:1G5-0160
Rev.1
Page 12
VML [ VANGUARD INTERNATIONAL SEMICONDUCTOR ]
