VIS
A.C Characteristics:
Test Conditions:
(Ta=0 to 70°C V
DD
=3.3V
±
0.3V ,V
SS
=0V)
VG3617801CT
16Mb CMOS Synchronous Dynamic RAM
AC input Levels(V
IH
/V
IL
)
Input rise and fall time
Parameter
CAS
Latency
3
2
3
2
2.0/0.8V
1ns
Input timing reference level/
Output timing reference level
Output load condition
1.4V
50pF
Unit
symbol
t
Ck3
t
Ck2
t
AC3
t
AC2
t
CH
t
CL
t
CKS
t
CKH
t
AS
t
AH
t
DS
t
DH
t
CMS
t
CMH
t
OH
t
LZ
t
HZ
t
RRD
t
RCD
t
RP
t
RAS
t
RC
t
BDL
t
DAL
t
DPL
t
T
t
RSC
t
PDE
t
SRX
t
REF
CLK cycle time
CLK to valid output delay
CLK high pulse width
CLK low pulse width
CKE setup time
CKE hold time
Address setup time
Address hold time
Data input setup time
Data input hold time
Command setup time
Command hold time
Output data hold time
CLK to output in low-Z
CLK to output in Hi-Z
Row active to active delay
RAS to CAS delay
Row precharge time
ROW active time
ROW cycle time
Last data in to burst stop
Data-in to ACT(REF)
Command (Auto Precharge)
Data-in to precharge
Transition time
Mode reg. set cycle
Power down exit setup time
Self refresh exit time
Refresh time
VG3617801CT
-8H
-8L
-10
Min
Max
Min
Max
Min
Max
10
10
10
10
13
15
6
6
8
6
7
8
3
3
4
3
3
4
3
3
3
1
1
1
2
2
3
1
1
1
2
2
3
1
1
1
2
2
3
1
1
1
3
3
3
0
0
0
3
8
3
8
3
8
20
20
20
20
20
26
20
20
26
50
120,000
50
120,000
60
120,000
70
70
86
1 CLK
1 CLK
1 CLK
1CLK+t
RP
1CLK+t
RP
1CLK+t
RP
1 CLK
1
2 CLK
8
8
1 CLK
1
2 CLK
8
8
1 CLK
1
2 CLK
8
8
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
10
10
10
32
32
32
Document:1G5-0133
Rev.1
Page 6
VML [ VANGUARD INTERNATIONAL SEMICONDUCTOR ]
