WT6014 参数 Datasheet PDF下载

WT6014

Digital Monitor Controller

Ver. 1.21 Jul-31-1998

I/O Ports

Port_A :

Pin PA0/DA8

Pin PA1/DA9

Pin PA2/DA10

Pin PA3/DA11

Pin PA4/DA12

Pin PA5/DA13

Pin PA6/VSO

Pin PA7/HSO

- general purpose I/O shared with DA8 output.

- general purpose I/O shared with DA9 output.

- general purpose I/O shared with DA10 output.

- general purpose I/O shared with DA11 output.

- general purpose I/O shared with DA12 output.

- general purpose I/O shared with DA13 output.

- general purpose I/O shared with VSYNC output.

- general purpose I/O shared with HSYNC output.

Port_A is controlled by REG#10H & REG#11H. In REG#10H, each corresponding bit enables

HSYNC output, VSYNC output or D/A converter output when it is "1". If the corresponding bit is "0",

the output level is decided by REG#11H. In REG#11H, if the I/O corresponding bit (PAn) is "0", the

output is low level (I

OL

=5mA). If PAn bit is "1", the output is high level (I

OH

= -100uA) and can be

used as an input.

Address

0010H

0011H

0011H

R/W

W

W

R

Initial

00H

FFH

--

Bit7

EHO

PA7W

PA7R

Bit6

Bit5

Bit4

Bit3

Bit2

Bit1

EVO EDA13 EDA12 EDA11 EDA10 EDA9

PA6W PA5W PA4W PA3W PA2W PA1W

PA6R PA5R PA4R PA3R PA2R PA1R

Bit value = “0”

PA7 as general purpose I/O.

PA6 as general purpose I/O.

PA5 as general purpose I/O.

PA4 as general purpose I/O.

PA3 as general purpose I/O.

PA2 as general purpose I/O.

PA1 as general purpose I/O.

PA0 as general purpose I/O.

Outputs low level (I

OL

= 5mA).

Pin is low level.

Bit0

EDA8

PA0W

PA0R

Bit Name

EHO

EVO

EDA13

EDA12

EDA11

EDA10

EDA9

EDA8

PA7W - PA0W

PA7R- PA0R

Bit value = “1”

Enable PA7 as HSYNC output.

Enable PA6 as VSYNC output.

Enable PA5 as DA13 output.

Enable PA4 as DA12 output.

Enable PA3 as DA11 output.

Enable PA2 as DA10 output.

Enable PA1 as DA9 output.

Enable PA0 as DA8 output.

Outputs high level (I

OH

= -100uA).

Pin is high level.

* If the program wants to force VSYNC output (VSO pin) in low state, write "0" to PA6 bit first, then

write "0" to EVO bit. This is used to prevent high frequency output on VSO pin when the VSYNC

frequency is increased to read EDID data in DDC1 mode.

EDAx

DAx

5mA

PAnW

5mA

100uA

Pin PAn

PAnR

Weltrend Semiconductor, Inc.

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