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Virtex-II Platform FPGAs:
Pinout Information
Product Specification
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DS031-4 (v3.5) November 5, 2007
This document provides Virtex-II™ Device/Package Combi-
nations, Maximum I/Os Available, and Virtex-II Pin Defini-
tions, followed by pinout tables for the following packages:
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For device pinout diagrams and layout guidelines, refer to
the
Virtex-II Platform FPGA User Guide
. ASCII package
pinout files are also available for download from the Xilinx
website (
).
Virtex-II Device/Package Combinations and Maximum I/Os Available
Wire-bond and flip-chip packages are available.
and
show the maximum number of user I/Os possible in
wire-bond and flip-chip packages, respectively.
shows the number of user I/Os available for all
device/package combinations.
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CS denotes wire-bond chip-scale ball grid array (BGA)
(0.80 mm pitch).
CSG denotes Pb-free wire-bond chip-scale ball grid
array (BGA) (0.80 mm pitch).
FG denotes wire-bond fine-pitch BGA (1.00 mm pitch).
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FGG denotes Pb-free wire-bond fine-pitch BGA (1.00
mm pitch).
BG denotes standard BGA (1.27 mm pitch).
BGG denotes Pb-free standard BGA (1.27 mm pitch).
FF denotes flip-chip fine-pitch BGA (1.00 mm pitch).
BF denotes flip-chip BGA (1.27 mm pitch).
The number of I/Os per package include all user I/Os except
the 15 control pins (CCLK, DONE, M0, M1, M2, PROG_B,
PWRDWN_B, TCK, TDI, TDO, TMS, HSWAP_EN, DXN,
DXP, AND RSVD).
Table 1:
Wire-Bond Packages Information
Package
(1)
Pitch (mm)
Size (mm)
I/Os
CS144/
CSG144
0.80
12 x 12
92
FG256/
FGG256
1.00
17 x 17
172
FG456/
FGG456
1.00
23 x 23
324
FG676/
FGG676
1.00
27 x 27
484
BG575/
BGG575
1.27
31 x 31
408
BG728/
BGG728
1.27
35 x 35
516
Notes:
1. Wire-bond packages include FGGnnn Pb-free versions. See
Table 2:
Flip-Chip Packages Information
Package
Pitch (mm)
Size (mm)
I/Os
FF896
1.00
31 x 31
624
FF1152
1.00
35 x 35
824
FF1517
1.00
40 x 40
1,108
BF957
1.27
40 x 40
684
© 2000–2007 Xilinx, Inc. All rights reserved. XILINX, the Xilinx logo, the Brand Window, and other designated brands included herein are trademarks of Xilinx, Inc. All other
trademarks are the property of their respective owners.
DS031-4 (v3.5) November 5, 2007
Product Specification
Module 4 of 4
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