R
XC9500XL High-Performance CPLD Family Data Sheet
buffer, output driver, output enable selection multiplexer,
and user programmable ground control. See
for
details.
I/O Block
The I/O Block (IOB) interfaces between the internal logic
and the device user I/O pins. Each IOB includes an input
To other
Macrocells
I/O Block
To FastCONNECT
Switch Matrix
Macrocell
OUT
(Inversion in
AND-array)
Product Term OE
PTOE
Bus-Hold
I/O
1
User-
Programmable
Ground
0
Slew Rate
Control
I/O/GTS1
Global OE 1
I/O/GTS2
Global OE 2
I/O/GTS3
Global OE 3
Available in XC95144XL
and XC95288XL
I/O/GTS4
Global OE 4
DS054_10_042101
Figure 10:
I/O Block and Output Enable Capability
The input buffer is compatible with 5V CMOS, 5V TTL, 3.3V
CMOS, and 2.5V CMOS signals. The input buffer uses the
internal 3.3V voltage supply (V
CCINT
) to ensure that the
input thresholds are constant and do not vary with the
V
CCIO
voltage. Each input buffer provides input hysteresis
(50 mV typical) to help reduce system noise for input signals
with slow rise or fall edges.
DS054 (v2.5) May 22, 2009
Product Specification
11
XILINX [ XILINX, INC ]
