eZ80L92 MCU
Product Specification
164
ZDI Block Write
The Block Write operation is initiated in the same manner as the single-byte Write opera-
tion, but instead of terminating the Write operation after the first data byte is transferred,
the ZDI master can continue to transmit additional bytes of data to the ZDI slave on the
eZ80L92. After the receipt of each byte of data the ZDI register address increments by 1.
If the ZDI register address reaches the end of the Write-Only ZDI register address space
(
30h
), the address stops incrementing. Figure 41 illustrates the timing for ZDI Block
Write operations.
ZDI Data Bytes
ZCL
7
8
9
1
2
3
7
8
9
1
2
9
ZDA
A0
Write
0/1
D7
msb
of DATA
Byte 1
D6
D5
D1
D0
lsb
of DATA
Byte 1
0/1
D7
D6
msb
of DATA
Byte 2
1
lsb of
ZDI Address
Single-Bit
Byte Separator
Single-Bit
Byte Separator
Figure 41. ZDI Block Data Write Timing
ZDI Read Operations
ZDI Single-Byte Read
Single-byte Read operations are initiated in the same manner as single-byte Write opera-
tions, with the exception that the R/W bit of the ZDI register address is set to 1. Upon
receipt of a slave address with the R/W bit set to 1, the eZ80L92’s ZDI block loads the
selected data into the shifter at the beginning of the first cycle following the single-bit data
separator. The most significant bit (msb) is shifted out first. Figure 42 illustrates the timing
for ZDI single-byte Read operations.
PS013012-1004
PRELIMINARY
ZiLOG Debug Interface
ZILOG [ ZILOG, INC. ]
