ADM202EA各脚功能电路原理芯片引脚定义引脚图及功能IC贸易商-中国IC网-芯三七

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产品型号ADM202EA的概述

ADM202EA 芯片概述 ADM202EA 是一款由 Analog Devices, Inc. 生产的低功耗 RS-232 收发器。其设计意在简化与微控制器或其他数字电路的通信，使之能够与 RS-232 标准相兼容。该芯片的输入电压范围广泛，适用于多种电源应用，尤其是在便携式设备中的应用。 ADM202EA 的详细参数 ADM202EA 提供的参数确保其在不同环境和应用情况下的高效性能。以下为其主要参数： - 电源电压范围：从 3V 到 5.5V，适应不同电源需求。 - 工作温度范围：-40°C 到 +85°C，确保其在严苛环境下仍能可靠工作。 - 最大数据速率：可支持高达 120kbps 的数据传输速率。 - 接收器输入电压范围：符合 RS-232 标准，支持 -15V 至 +15V 输入。 - 功耗：工作时的功耗降低至 1.5mA，待机模式下功耗仅为 1μA。在这些参数的支持下...

产品型号ADM202EAN的Datasheet PDF文件预览

a ^{EMI/EMC Compliant, ؎15 kV ESD Protected,}

RS-232 Line Drivers/Receivers

ADM202E/ADM1181A

FEATURES

FUNCTIO NAL BLO CK D IAGRAMS

Com plies w ith 89/ 336/ EEC EMC Directive

ESD Protection to IEC1000-4-2 (801.2)

؎8 kV: Contact Discharge

؎15 kV: Air-Gap Discharge

؎15 kV: Hum an Body Model

EFT Fast Transient Burst Im m unity (IEC1000-4-4)

Low EMI Em issions (EN55022)

230 kbits/ s Data Rate Guaranteed

TSSOP Package Option

+5V INPUT

+5V TO +10V

VOLTAGE

DOUBLER

C1+

C1–

0.1µF

10V

0.1µF

6.3V

0.1µF

V+

+10V TO –10V

VOLTAGE

INVERTER

C2+

C2–

V–

0.1µF

10V

0.1µF

10V

OUT

EIA/TIA-232

OUTPUTS

CMOS

INPUTS

Upgrade for MAX202E, 232E, LT1181A

OUT

APPLICATIONS

OUT

CMOS

OUTPUTS

EIA/TIA-232

General Purpose RS-232 Data Link

Portable Instrum ents

PDAs

INPUTS

ADM202E

GND

GENERAL D ESCRIP TIO N

NOTE

INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT

T he ADM202E and ADM1181A are robust, high speed, 2-

channel RS232/V.28 interface devices that operate from a single

+5 V power supply. Both products are suitable for operation in

harsh electrical environments and are compliant with the EU di-

rective on EMC (89/336/EEC). Both the level of electromag-

netic emissions and immunity are in compliance. EM immunity

includes ESD protection in excess of ±15 kV on all I/O lines,

Fast T ransient burst protection (1000-4-4) and Radiated Im-

munity (1000-4-3). EM emissions include radiated and

conducted emissions as required by Information T echnology

Equipment EN55022, CISPR22.

+5V INPUT

+5V TO +10V

VOLTAGE

DOUBLER

C1+

C1–

0.1µF

10V

0.1µF

10V

V+

0.1µF

10V

+10V TO –10V

VOLTAGE

INVERTER

C2+

C2–

V–

0.1µF

10V

0.1µF

10V

OUT

EIA/TIA-232

OUTPUTS

CMOS

INPUTS

OUT

T he ADM202E and ADM1181A conform to the EIA-232E and

CCIT T V.28 specifications and operate at data rates up to

230 kbps.

OUT

CMOS

OUTPUTS

EIA/TIA-232

INPUTS

Four external 0.1 µF charge pump capacitors are used for the

voltage doubler/inverter permitting operation from a single +5 V

supply.

ADM1181A

GND

T he ADM202E provides a robust pin-compatible upgrade for

existing ADM202, ADM232L or MAX202E/MAX232E sock-

ets. It is available in a 16-pin DIP, wide and narrow SO and also

a space saving T SSOP package. T he T SSOP package gives a

44% space saving over SOIC.

NOTE

*INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT

O RD ERING GUID E

Model

Tem perature Range

P ackage O ption

T he ADM1181A provides a robust pin compatible upgrade for

the LT C1181A, and it is available in 16-pin DIP and 16-lead

SO packages.

ADM202EAN

ADM202EARW

ADM202EARN

ADM202EARU

–40°C to +85°C

N-16

R-16W

R-16N

RU-16

ADM1181AAN

ADM1181AARW

–40°C to +85°C

N-16

R-16W

REV. 0

Inform ation furnished by Analog Devices is believed to be accurate and

reliable. However, no responsibility is assum ed by Analog Devices for its

use, nor for any infringem ents of patents or other rights of third parties

which m ay result from its use. No license is granted by im plication or

otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norw ood, MA 02062-9106, U.S.A.

Tel: 617/ 329-4700 Fax: 617/ 326-8703

ADM202E/ADM1181A–SPECIFICATIONS ⁽_T^{V = +5.0 V ؎ 10%, C1–C4 = 0.1 ␮F. All specifications}

_MINto T_MAXunless otherwise noted.)

P aram eter

Min

Typ

Max

Units

Test Conditions/Com m ents

DC CHARACT ERIST ICS

Operating Voltage Range

V_CCPower Supply Current

4.5

5.0

2.0

5.5

3.0

Volts

No Load

R_L= 3 kΩ to GND

LOGIC

Input Logic T hreshold Low, V_INL

Input Logic T hreshold High, V_INH

CMOS Output Voltage Low, V_OL

CMOS Output Voltage High, V_OH

Input Leakage Current

0.8

0.4

±10

T_IN

2.4

3.5

I_OUT= 3.2 mA

I_OUT= –1 mA

T_IN= GND to V_CC

0.01

µA

RS-232 RECEIVER

EIA-232 Input Voltage Range

EIA-232 Input T hreshold Low

EIA-232 Input T hreshold High

EIA-232 Input Hysteresis

EIA-232 Input Resistance

–30

0.4

+30

2.4

0.8

1.1

0.7

kΩ

RS-232 T RANSMIT T ER

Output Voltage Swing

±5.0

±9.0

±15

Volts

All T ransmitter Outputs

Loaded with 3 kΩ to Ground

V_CC= 0 V, V_OUT= ±2 V

T ransmitter Output Resistance

RS-232 Output Short Circuit Current

300

Ω

±60

T IMING CHARACT ERIST ICS

Maximum Data Rate

Receiver Propagation Delay

T PHL

230

kbps

R_L= 3 kΩ to 7 kΩ, C_L= 50 pF to 2500 pF

0.3

0.6

1.2

1.5

µs

V/µs

T PLH

T ransmitter Propagation Delay

T ransition Region Slew Rate

R_L= 3 kΩ, C_L= 2500 pF

Measured from +3 V to –3 V or

–3 V to +3 V

EM IMMUNIT T Y

ESD Protection (I/O pins)

±15

±8 kV

±2

V/m

Human Body Model

IEC1000-4-2 Air Discharge

IEC1000-4-2 Contact Discharge

IEC1000-4-4

EFT Protection (I/O pins)

EMI Immunity

IEC1000-4-3

Specifications subject to change without notice.

ABSO LUTE MAXIMUM RATINGS*

(T _A= +25°C unless otherwise noted)

Power Dissipation R-16 . . . . . . . . . . . . . . . . . . . . . . . . 450 mW

(Derate 6 mW/°C above +50°C)

θ_JA, T hermal Impedance . . . . . . . . . . . . . . . . . . . . . 158°C/W

Power Dissipation RU-16 . . . . . . . . . . . . . . . . . . . . . . 500 mW

(Derate 6 mW/°C above +50°C)

θ_JA, T hermal Impedance . . . . . . . . . . . . . . . . . . . . . 158°C/W

Operating T emperature Range

Industrial (A Version) . . . . . . . . . . . . . . . . . –40°C to +85°C

Storage T emperature Range . . . . . . . . . . . . . –65°C to +150°C

Lead T emperature (Soldering, 10 sec) . . . . . . . . . . . . . +300°C

ESD Rating (MIL-ST D-883B) (I/O Pins) . . . . . . . . . . ±15 kV

ESD Rating MIL-ST D-883B (Except I/O) . . . . . . . . . . ±3 kV

ESD Rating (IEC1000-4-2 Air) (I/O Pins) . . . . . . . . . ±15 kV

ESD Rating (IEC1000-4-2 Contact) (I/O Pins) . . . . . . . ±8 kV

EFT Rating (IEC1000-4-4) (I/O Pins) . . . . . . . . . . . . . ±2 kV

V_CC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +6 V

V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . (V_CC– 0.3 V) to +14 V

V– . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –14 V

Input Voltages

T_IN. . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to (V+, +0.3 V)

R_IN. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±30 V

Output Voltages

T _OUT. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±15 V

R_OUT. . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to (V_CC+ 0.3 V)

Short Circuit Duration

T _OUT. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous

Power Dissipation

Power Dissipation N-16 . . . . . . . . . . . . . . . . . . . . . . . . 450 mW

(Derate 6 mW/°C above +50°C)

θ_JA, T hermal Impedance . . . . . . . . . . . . . . . . . . . . . 117°C/W

*T his is a stress rating only and functional operation of the device at these or any

other conditions above those indicated in the operation sections of this specifica-

tion is not implied. Exposure to absolute maximum rating conditions for extended

periods of time may affect reliability.

–2–

REV. 0

ADM202E/ADM1181A

P IN FUNCTIO N D ESCRIP TIO N

Function

P IN CO NNECTIO NS

Mnem onic

C1+

V+

V_CC

V+

Power Supply Input: +5 V ± 10%.

GND

C1–

C2+

C2–

V–

OUT

Internally Generated Positive Supply

(+9 V nominal).

ADM202E

ADM1181A ¹³

TOP VIEW

(Not to Scale)

OUT

V–

Internally Generated Negative Supply

(–9 V nominal).

OUT

GND

Ground Pin. Must Be Connected to 0 V.

OUT

C1+, C1–

External Capacitor 1 is connected between

these pins. 0.1 µF capacitor is recommended

but larger capacitors up to 47 µF may be used.

NC = NO CONNECT

C2+, C2–

External Capacitor 2 is connected between

these pins. 0.1 µF capacitor is recommended

but larger capacitors up to 47 µF may be used.

T_IN

T ransmitter (Driver) Inputs. T hese inputs ac-

cept T T L/CMOS levels.

T _OUT

R_IN

T ransmitter (Driver) Outputs. T hese are RS-

232 signal levels (typically ±9 V).

Receiver Inputs. T hese inputs accept RS-232

signal levels. An Internal 5 kΩ pull-down resis-

tor to GND is connected on each input.

R_OUT

Receiver Outputs. T hese are CMOS output

logic levels.

+5V INPUT

+5V TO +10V

VOLTAGE

DOUBLER

C1+

C1–

C1+

C1–

0.1µF

10V

0.1µF

10V

0.1µF

10V

VOLTAGE

DOUBLER

0.1µF

6.3V

0.1µF

V+

0.1µF

10V

+10V TO –10V

VOLTAGE

+10V TO –10V

VOLTAGE

INVERTER

C2+

C2–

V–

0.1µF

10V

C2+

C2–

V–

0.1µF

10V

0.1µF

10V

0.1µF

10V

INVERTER

OUT

EIA/TIA-232

OUTPUTS

EIA/TIA-232

OUTPUTS

CMOS

INPUTS

CMOS

INPUTS

OUT

CMOS

OUTPUTS

EIA/TIA-232

CMOS

OUTPUTS

EIA/TIA-232

INPUTS*

INPUTS

ADM1181A

ADM202E

GND

NOTE

*INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT

ADM202E Typical Operating Circuit

ADM1181A Typical Operating Circuit

REV. 0

–3–

ADM202E/ADM1181A

GENERAL D ESCRIP TIO N

and V_CC, while it is connected between V+ and GND on the

ADM1181A. It is acceptable to use either configuration with

both the ADM202E and ADM1181A. If desired, larger capaci-

tors (up to 47 µF) can be used for capacitors C1–C4. T his facili-

tates direct substitution with older generation charge pump

RS-232 transceivers.

T he ADM202E/ADM1181E are ruggedized RS-232 line drivers/

receivers. Step-up voltage converters coupled with level shifting

transmitters and receivers allow RS-232 levels to be developed

while operating from a single +5 V supply.

Features include low power consumption, high transmission

rates and compatibility with the EU directive on Electromag-

netic compatibility. EM compatibility includes protection

against radiated and conducted interference including high

levels of Electrostatic Discharge.

V+ = 2V

GND

All inputs and outputs contain protection against Electrostatic

Discharges up to ±15 kV and Electrical Fast T ransients up to

±2 kV. This ensures compliance to IE1000-4-2 and IEC1000-4-4

requirements.

INTERNAL

OSCILLATOR

NOTE: C3 CONNECTS BETWEEN V+ AND GND ON THE ADM1181A

T he devices are ideally suited for operation in electrically harsh

environments or where RS-232 cables are frequently being

plugged/unplugged. T hey are also immune to high RF field

strengths without special shielding precautions.

Figure 1. Charge Pum p Voltage Doubler

V+

GND

FROM

VOLTAGE

DOUBLER

CMOS technology is used to keep the power dissipation to an

absolute minimum allowing maximum battery life in portable

applications.

GND

V– = –(V+)

T he ADM202E/ADM1181A is a modification, enhancement

and improvement to the AD230–AD241 family and its deriva-

tives. It is essentially plug-in compatible and does not have ma-

terially different applications.

INTERNAL

OSCILLATOR

Figure 2. Charge Pum p Voltage Inverter

Tr ansm itter (D r iver ) Section

T he drivers convert 5 V logic input levels into RS-232 output

levels. With V_CC= +5 V and driving an RS-232 load, the output

voltage swing is typically ±9 V.

CIRCUIT D ESCRIP TIO N

T he internal circuitry consists of four main sections. T hese are:

1. A charge pump voltage converter

2. 5 V logic to EIA-232 transmitters

3. EIA-232 to 5 V logic receivers.

Receiver Section

T he receivers are inverting level shifters which accept RS-232

input levels and translate them into 5 V logic output levels.

T he inputs have internal 5 kΩ pull-down resistors to ground

and are also protected against overvoltages of up to ±30 V. Un-

connected inputs are pulled to 0 V by the internal 5 kΩ pull-

down resistor. T his, therefore, results in a Logic 1 output level

for unconnected inputs or for inputs connected to GND.

4. T ransient protection circuit on all I/O lines

Char ge P um p D C-D C Voltage Conver ter

T he charge pump voltage converter consists of an 200 kHz os-

cillator and a switching matrix. T he converter generates a ±10 V

supply from the input +5 V level. T his is done in two stages us-

ing a switched capacitor technique as illustrated below. First,

the 5 V input supply is doubled to 10 V using capacitor C1 as

the charge storage element. T he 10 V level is then inverted to

generate –10 V using C2 as the storage element.

T he receivers have Schmitt trigger inputs with a hysteresis level

of 0.5 V. T his ensures error-free reception for both noisy inputs

and for inputs with slow transition times.

Capacitors C3 and C4 are used to reduce the output ripple.

T heir values are not critical and can be increased if desired. On

the ADM202E, capacitor C3 is shown connected between V+

REV. 0

–4–

ADM202E/ADM1181A

H IGH BAUD RATE

T he protection structure achieves ESD protection up to ±15 kV

and EFT protection up to ±2 kV on all RS-232 I/O lines. T he

methods used to test the protection scheme are discussed later.

T he ADM202E/ADM1181A feature high slew rates permitting

data transmission at rates well in excess of the EIA/RS-232-E

specifications. RS-232 voltage levels are maintained at data rates

up to 230 kb/s even under worst case loading conditions. T his

allows for high speed data links between two terminals or indeed

it is suitable for the new generation I_SDNmodem standards which

requires data rates of 230 kbps. The slew rate is internally con-

trolled to less than 30 V/µs in order to minimize EMI interference.

RECEIVER

INPUT

ESD /EFT TRANSIENT P RO TECTIO N SCH EME.

T he ADM202E/ADM1181A use protective clamping structures

on all inputs and outputs which clamp the voltage to a safe level

and dissipate the energy present in ESD (Electrostatic) and

EFT (Electrical Fast T ransients) discharges. A simplified sche-

matic of the protection structure is shown in Figure 3. Each in-

put and output contains two back-to-back high speed clamping

diodes. During normal operation with maximum RS-232 signal

levels, the diodes have no effect as one or the other is reverse bi-

ased depending on the polarity of the signal. If however the volt-

age exceeds about 50 V in either direction, reverse breakdown

occurs and the voltage is clamped at this level. T he diodes are

large p-n junctions that are designed to handle the instanta-

neous current surge which can exceed several amperes.

Figure 3a. Receiver Input Protection Schem e

OUT

TRANSMITTER

OUTPUT

Figure 3b. Transm itter Output Protection Schem e

T he transmitter outputs and receiver inputs have a similar pro-

tection structure. T he receiver inputs can also dissipate some of

the energy through the internal 5 kΩ resistor to GND as well as

through the protection diodes.

Typical Performance Curves

LIMIT

0.3

0.6

START 30.0 MHz

STOP 200.0 MHz

LOG FREQUENCY – MHz

Figure 4. EMC Radiated Em issions

Figure 5. EMC Conducted Em issions

REV. 0

–5–

ADM202E/ADM1181A

Typical Performance Curves

= +5V

= 25؇C

= +5V

= 25؇C

–5

–10

–15

–2

–4

–6

–8

500

1000

1500

– pF

2000

2500

– mA

LOAD

Figure 6. Transm itter Output Voltage High/Low vs.

Load Capacitance @ 230 kbps

Figure 9. Transm itter Output Voltage Low/High vs.

Load Current

= +5V

= 25؇C

3.5

4.5

5.5

– V

Figure 10. 230 kbps Data Transm ission

Figure 7. Transm itter Output Voltage High vs. V_CC

400

= 25؇C

= +5V

350

300

250

200

150

100

= 25؇C

–2

–4

–6

–8

–10

3.5

4.5

5.5

– mA

– V

LOAD

Figure 11. Charge Pum p Im pedance vs. V_CC

Figure 8. Charge Pum p V+, V– vs. Current

REV. 0

–6–

ADM202E/ADM1181A

ESD TESTING (IEC1000-4-2)

100

IEC1000-4-2 (previously 801-2) specifies compliance testing

using two coupling methods, contact discharge and air-gap

discharge. Contact discharge calls for a direct connection to the

unit being tested. Air-gap discharge uses a higher test voltage

but does not make direct contact with the unit under test. With

air discharge, the discharge gun is moved towards the unit un-

der test developing an arc across the air gap, hence the term air-

gap discharge. T his method is influenced by humidity, tempera-

ture, barometric pressure, distance and rate of closure of the dis-

charge gun. T he contact-discharge method while less realistic is

more repeatable and is gaining acceptance in preference to the

air-gap method.

36.8

t_DL

t_RL

TIME t

Although very little energy is contained within an ESD pulse,

the extremely fast rise time coupled with high voltages can cause

failures in unprotected semiconductors. Catastrophic destruc-

tion can occur immediately as a result of arcing or heating. Even

if catastrophic failure does not occur immediately, the device

may suffer from parametric degradation which may result in de-

graded performance. T he cumulative effects of continuous ex-

posure can eventually lead to complete failure.

Figure 13. Hum an Body Model ESD Current Waveform

100

I/O lines are particularly vulnerable to ESD damage. Simply

touching or plugging in an I/O cable can result in a static dis-

charge which can damage or completely destroy the interface

product connected to the I/O port. T raditional ESD test meth-

ods such as the MIL-ST D-883B method 3015.7 do not fully

test a product’s susceptibility to this type of discharge. T his test

was intended to test a product’s susceptibility to ESD damage

during handling. Each pin is tested with respect to all other

pins. T here are some important differences between the tradi-

tional test and the IEC test:

0.1 TO 1ns

TIME t

30ns

60ns

Figure 14. IEC1000-4-2 ESD Current Waveform

T he ADM202E/ADM1181E products are tested using both the

above mentioned test methods. All pins are tested with respect

to all other pins as per the MIL-ST D-883B specification. In ad-

dition all I/O pins are tested as per the IEC test specification.

T he products were tested under the following conditions:

a. T he IEC test is much more stringent in terms of discharge

energy. T he peak current injected is over four times greater.

b. T he current rise time is significantly faster in the IEC test.

c. T he IEC test is carried out while power is applied to the device.

It is possible that the ESD discharge could induce latch-up in

the device under test. T his test therefore is more representative

of a real-world I/O discharge where the equipment is operating

normally with power applied. For maximum peace of mind,

however, both tests should be performed therefore ensuring

maximum protection both during handling and later during field

service.

a. Power-On

b. Power-Off

T here are four levels of compliance defined by IEC1000-4-2.

T he ADM202E/ADM1181A products meet the most stringent

compliance level for both contact and for air-gap discharge.

T his means that the products are able to withstand contact dis-

charges in excess of 8 kV and air-gap discharges in excess of

15 kV.

HIGH

VOLTAGE

GENERATOR

DEVICE

UNDER TEST

ESD TEST METHOD

H. BODY MIL-STD883B

IEC1000-4-2

1.5kΩ

330Ω

100pF

150pF

Figure 12. ESD Test Standards

REV. 0

–7–

ADM202E/ADM1181A

Table I. IEC1000-4-2 Com pliance Levels

A simplified circuit diagram of the actual EFT generator is illus-

trated in Figure 16.

Level

Contact D ischarge

2 kV

Air D ischarge

2 kV

T he transients are coupled onto the signal lines using an EFT

coupling clamp. T he clamp is 1 m long and it completely sur-

rounds the cable providing maximum coupling capacitance

(50 pF to 200 pF typ) between the clamp and the cable. High

energy transients are capacitively coupled onto the signal lines.

Fast rise times (5 ns) as specified by the standard result in very

effective coupling. T his test is very severe since high voltages are

coupled onto the signal lines. T he repetitive transients can often

cause problems where single pulses don’t. Destructive latchup

may be induced due to the high energy content of the tran-

sients. Note that this stress is applied while the interface prod-

ucts are powered up and are transmitting data. T he EFT test

applies hundreds of pulses with higher energy than ESD. Worst

case transient current on an I/O line can be as high as 40 A.

4 kV

6 kV

8 kV

4 kV

8 kV

15 kV

Table II. AD M202E/AD M1181A ESD Test Results

ESD Test Method

I/O P ins

O ther P ins

MIL-ST D-883B

IEC1000-4-2

Contact

±15 kV

±3 kV

±8 kV

Air

±15 kV

FAST TRANSIENT BURST TESTING (IEC1000-4-4)

IEC1000-4-4 (previously 801-4) covers electrical fast-transient/

burst (EFT ) immunity. Electrical fast transients occur as a re-

sult of arcing contacts in switches and relays. T he tests simulate

the interference generated when for example a power relay dis-

connects an inductive load. A spark is generated due to the well

known back EMF effect. In fact the spark consists of a burst of

sparks as the relay contacts separate. T he voltage appearing on

the line therefore consists of a bust of extremely fast transient

impulses. A similar effect occurs when switching on fluorescent

lights.

HIGH

VOLTAGE

SOURCE

50Ω

OUTPUT

Figure 16. IEC1000-4-4 Fast Transient Generator

T est results are classified according to the following:

1. Normal performance within specification limits.

2. T emporary degradation or loss of performance that is

self-recoverable.

T he fast transient burst test defined in IEC1000-4-4 simulates

this arcing and its waveform is illustrated in Figure 11. It con-

sists of a burst of 2.5 kH z to 5 kH z transients repeating at

300 ms intervals. It is specified for both power and data lines.

3. T emporary degradation or loss of function or performance

that requires operator intervention or system reset.

4. Degradation or loss of function that is not recoverable due

to damage.

T he ADM202E/ADM1181A have been tested under worst case

conditions using unshielded cables and meet Classification 2.

Data transmission during the transient condition is corrupted,

but it may be resumed immediately following the EFT event

without user intervention.

300ms

15ms

5ns

50ns

0.2/0.4ms

Figure 15. IEC1000-4-4 Fast Transient Waveform

REV. 0

–8–

ADM202E/ADM1181A

IEC1000-4-3 RAD IATED IMMUNITY

current glitch between V_CCand GND which results in con-

ducted emissions. It is, therefore, important that the switches in

the charge pump guarantee break-before-make switching under

all conditions so that instantaneous short circuit conditions do

not occur.

IEC1000-4-3 (previously IEC801-3) describes the measurement

method and defines the levels of immunity to radiated electro-

magnetic fields. It was originally intended to simulate the elec-

tromagnetic fields generated by portable radio transceivers or

any other device which generates continuous wave radiated

electromagnetic energy. Its scope has since been broadened to

include spurious EM energy which can be radiated from fluores-

cent lights, thyristor drives, inductive loads, etc.

T he ADM202E has been designed to minimize the switching

transients and ensure break-before-make switching thereby

minimizing conducted emissions. T his has resulted in the level

of emissions being well below the limits required by the specifi-

cation. No additional filtering/decoupling other than the recom-

mended 0.1 µF capacitor is required.

T esting for immunity involves irradiating the device with an EM

field. T here are various methods of achieving this including use

of anechoic chamber, stripline cell, T EM cell, GT EM cell. A

stripline cell consists of two parallel plates with an electric field

developed between them. T he device under test is placed within

the cell and exposed to the electric field. T here are three severity

levels having field strengths ranging from 1 V to 10 V/m. Results

are classified in a similar fashion to those for IEC1000-4-2.

Conducted emissions are measured by monitoring the mains

line. T he equipment used consists of a LISN (Line Impedance

Stabilizing Network) that essentially presents a fixed impedance

at RF, and a spectrum analyzer. T he spectrum analyzer scans

for emissions up to 30 MHz and a plot for the ADM202E is

shown in Figure 19.

1. Normal Operation.

2. T emporary Degradation or loss of function that is self-

recoverable when the interfering signal is removed.

V+ = 2V

3. T emporary degradation or loss of function that requires

operator intervention or system reset when the interfering

signal is removed.

GND

INTERNAL

OSCILLATOR

4. Degradation or loss of function that is not recoverable due to

damage.

T he ADM202E/ADM1181A products easily meet Classification

1 at the most stringent (Level 3) requirement. In fact field

strengths up to 30 V/m showed no performance degradation,

and error-free data transmission continued even during irradia-

tion.

Figure 17. Charge Pum p Voltage Doubler

Table III. Test Severity Levels (IEC1000-4-3)

Level

Field Strength V/m

SWITCHING GLITCHES

Figure 18. Switching Glitches

EMISSIO NS/INTERFERENCE

EN55 022, CISPR22 defines the permitted limits of radiated

and conducted interference from Information T echnology (IT )

equipment. T he objective of the standard is to minimize the

level of emissions both conducted and radiated.

LIMIT

For ease of measurement and analysis, conducted emissions are

assumed to predominate below 30 MHz and radiated emissions

are assumed to predominate above 30 MHz.

CO ND UCTED EMISSIO NS

T his is a measure of noise that gets conducted onto the mains

power supply. Switching transients from the charge pump that

are 20 V in magnitude and contain significant energy can lead to

conducted emissions. Other sources of conducted emissions can

be due to overlap in switch on-times in the charge pump voltage

converter. In the voltage doubler shown below, if S2 has not

fully turned off before S4 turns on, this results in a transient

0.3

0.6

LOG FREQUENCY – MHz

Figure 19. ADM202E Conducted Em issions Plot

REV. 0

–9–

ADM202E/ADM1181A

RADIATED NOISE

RAD IATED EMISSIO NS

Radiated emissions are measured at frequencies in excess of

30 MHz. RS-232 outputs designed for operation at high baud

rates while driving cables can radiate high frequency EM energy.

T he reasons already discussed that cause conducted emissions

can also be responsible for radiated emissions. Fast RS-232 out-

put transitions can radiate interference, especially when lightly

loaded and driving unshielded cables. Charge pump devices are

also prone to radiating noise due to the high frequency oscillator

and high voltages being switched by the charge pump. T he

move towards smaller capacitors in order to conserve board

space has resulted in higher frequency oscillators being em-

ployed in the charge pump design. T his has resulted in higher

levels of emission, both conducted and radiated.

DUT

RECEIVER

ADJUSTABLE

ANTENNA

TURNTABLE

Figure 20. Radiated Em issions Test Setup

T he RS-232 outputs on the ADM202E products feature a con-

trolled slew rate in order to minimize the level of radiated emis-

sions, yet are fast enough to support data rates up to 230 kBaud.

LIMIT

Figure 21 shows a plot of radiated emissions vs. frequency. T his

shows that the levels of emissions are well within specifications

without the need for any additional shielding or filtering compo-

nents. T he ADM202E was operated at maximum baud rates

and configured as in a typical RS-232 interface.

T esting for radiated emissions was carried out in a shielded

anechonic chamber.

START 30.0 MHz

STOP 200.0 MHz

Figure 21. ADM202E Radiated Em issions Plot

REV. 0

–10–

ADM202E/ADM1181A

O UTLINE D IMENSIO NS

D imensions shown in inches and (mm).

SO IC (Wide) P ackage

(R-16W)

TSSO P P ackage

(RU-16)

0.201 (5.10)

0.193 (4.90)

0.4133 (10.50)

0.3977 (10.00)

0.1043 (2.65)

0.0926 (2.35)

0.0291 (0.74)

PIN 1

x 45°

0.0118 (0.30)

0.0040 (0.10)

0.0098 (0.25)

0.006 (0.15)

0.0433

(1.10)

MAX

0.002 (0.05)

0.0500 (1.27)

0.0157 (0.40)

8°

0°

0.028 (0.70)

0.020 (0.50)

8°

0°

0.0500

(1.27)

BSC

0.0192 (0.49)

0.0118 (0.30)

0.0075 (0.19)

0.0256

(0.65)

BSC

SEATING

PLANE

0.0125 (0.32)

0.0091 (0.23)

SEATING

PLANE

0.0138 (0.35)

0.0079 (0.20)

0.0035 (0.090)

SO IC (Nar r ow) P ackage

(R-16N)

D IP P ackage

(N-16)

0.3937 (10.00)

0.3859 (9.80)

0.840 (21.33)

0.745 (18.93)

0.280 (7.11)

0.240 (6.10)

0.1574 (4.00)

0.2440 (6.20)

0.1497 (3.80)

0.2284 (5.80)

0.325 (8.25)

0.195 (4.95)

0.300 (7.62)

PIN 1

0.060 (1.52)

0.015 (0.38)

0.115 (2.93)

0.0688 (1.75)

0.0532 (1.35)

PIN 1

0.0196 (0.50)

0.0099 (0.25)

0.210 (5.33)

MAX

x 45°

0.0098 (0.25)

0.0040 (0.10)

0.130

(3.30)

MIN

0.160 (4.06)

0.115 (2.93)

0.015 (0.381)

0.008 (0.204)

8°

0°

0.070 (1.77) SEATING

0.100

(2.54)

BSC

0.022 (0.558)

0.014 (0.356)

0.0500

(1.27)

BSC

0.0192 (0.49)

0.0138 (0.35)

SEATING

PLANE

0.0500 (1.27)

0.0160 (0.41)

0.0099 (0.25)

0.0075 (0.19)

PLANE

0.045 (1.15)

REV. 0

–11–

–12–

ADM202EA相关文章

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ADM202EAN产品参数

型号:	ADM202EAN
是否无铅：	不含铅
是否Rohs认证：	不符合
生命周期：	Active
IHS 制造商：	ROCHESTER ELECTRONICS LLC
零件包装代码：	DIP
包装说明：	PLASTIC, MO-095AC, DIP-16
针数：	16
Reach Compliance Code：	unknown
风险等级：	5.3
差分输出：	NO
驱动器位数：	2
输入特性：	SCHMITT TRIGGER
接口集成电路类型：	LINE TRANSCEIVER
接口标准：	EIA-232-E; V.28
JESD-30 代码：	R-PDIP-T16
JESD-609代码：	e0
长度：	19.43 mm
湿度敏感等级：	NOT APPLICABLE
功能数量：	2
端子数量：	16
最高工作温度：	85 °C
最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY
封装代码：	DIP
封装形状：	RECTANGULAR
封装形式：	IN-LINE
峰值回流温度（摄氏度）：	NOT APPLICABLE
认证状态：	COMMERCIAL
最大接收延迟：	1000 ns
接收器位数：	2
座面最大高度：	4.57 mm
最大供电电压：	5.5 V
最小供电电压：	4.5 V
标称供电电压：	5 V
表面贴装：	NO
技术：	CMOS
温度等级：	INDUSTRIAL
端子面层：	TIN LEAD
端子形式：	THROUGH-HOLE
端子节距：	2.54 mm
端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT APPLICABLE
最大传输延迟：	1500 ns
宽度：	7.62 mm

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