PRELIMINARY
CYUSB3014
Both SCL and SDA signals of the I2C interface require external
pull-up resistors. The pull-up resistors must be connected to
VIO5.
JTAG Interface
EZ-USB FX3’s JTAG interface provides a standard five-pin
interface for connecting to a JTAG debugger to debug firmware
through the CPU-core's on-chip-debug circuitry.
2
I S Interface
EZ-USB FX3 has an I2S port to support external audio codec
devices. EZ-USB FX3 functions as I2S Master as transmitter
only. The I2S interface consists of four signals: clock line
(I2S_CLK), serial data line (I2S_SD), word select line (I2S_WS),
and master system clock (I2S_MCLK). EZ-USB FX3 can
generate the system clock as an output on I2S_MCLK or accept
an external system clock input on I2S_MCLK.
Industry standard debugging tools for the ARM926EJ-S core can
be used for EZ-USB FX3 application development.
Other Interfaces
EZ-USB FX3 supports the following serial peripherals:
■ UART
■ I2C
The sampling frequencies supported by the I2S interface are
32 kHz, 44.1 kHz, and 48 kHz.
■ I2S
SPI Interface
■ SPI
EZ-USB FX3 supports an SPI Master interface on the Serial
Peripherals port.The maximum frequency of operation is
33 MHz.
The SPI, UART and I2S interfaces are multiplexed on the Serial
Peripheral port.
The SPI controller supports four modes of SPI communication
with Start-Stop clock. The SPI controller is a single master
controller with a single automated SSN control. It supports
transaction sizes from 4-bit to 32 bits long.
The Pin List on page 32 shows details of how these interfaces
are multiplexed.
UART Interface
The UART interface of EZ-USB FX3 supports full duplex
communication. It includes the signals noted in Table 1.
Boot Options
EZ-USB FX3 can load boot images from various sources,
selected by the configuration of the PMODE pins. The boot
options for EZ-USB FX3 are listed as follows:
Table 1. UART Interface Signals
Signal
TX
Description
Output signal
Input signal
Flow control
Flow control
■ Boot from USB
■ Boot from I2C
RX
CTS
RTS
■ Boot from SPI (SPI devices supported are M25P16 (16 Mbit),
M25P80 (8 Mbit), and M25P40 (4 Mbit)) or their equivalents
■ Boot from GPIF II ASync ADMUX mode
■ Boot from GPIF II Sync ADMUX mode
■ Boot from GPIF II ASync SRAM mode
The UART is capable of generating a range of baud rates from
300 bps to 4608 Kbps selectable by the firmware.
2
I C Interface
EZ-USB FX3 has an I2C interface compatible with the I2C Bus
Specification Revision 3. EZ-USB FX3’s I2C interface is capable
of operating as I2C Master only, hence may be used to
communicate with other I2C slave devices. For example,
EZ-USB FX3 may boot from an EEPROM connected to the I2C
interface, as a selectable boot option.
EZ-USB FX3’s I2C Master Controller also supports Multi-master
mode functionality.
The power supply for the I2C interface is VIO5, which is a
separate power domain from the other serial peripherals. This is
to allow the I2C interface the flexibility to operate at a different
voltage than the other serial interfaces.
Table 2. Booting Options for EZ-USB FX3
PMODE[2:0][2]
Boot From
Sync ADMUX (16-bit)
F00
F01
F11
F0F
F1F
1FF
0F1
Async ADMUX (16-bit)
USB boot
Async SRAM (16-bit)
I2C, On Failure, USB Boot is Enabled
I2C only
SPI, On Failure, USB Boot is Enabled
The bus frequencies supported by the I2C controller are 100 kHz,
400 kHz, and 1 MHz. When VIO5 is 1.2V, the maximum
operating frequency supported is 100 kHz. When VIO5 is 1.8 V,
2.5 V or 3.3 V, the operating frequencies supported are 400 kHz
and 1 MHz.
Note
2. F indicates Floating.
Document Number 001-52136 Rev. *H
Page 7 of 38
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