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产品型号HCPL-7800的概述

HCPL-7800芯片的概述 HCPL-7800是一款高性能的光耦合器芯片，由安森美半导体（ON Semiconductor）生产。这种组件在工业控制、数据通信以及信号隔离等领域得到了广泛应用。HCPL-7800被设计为在电气隔离的情况下，提供稳定的信号传输。它作为一种光耦合器，通过光信号的方式在输入和输出端之间实现电气隔离，从而有效地保护下游电路和设备，防止高压或噪音对敏感设备的影响。该芯片通常用于隔离数字信号和高压直流电源，能够处理高达1500V的瞬时隔离电压。HCPL-7800的内部结构相对简单，集成了发光二极管（LED）和光电接收器，使其在紧凑的外形中达到良好的性能。 HCPL-7800的详细参数 HCPL-7800具有以下主要技术参数： - 输入电流（IF）：需要偏置电流来驱动内部LED，一般在5mA至20mA之间。 - 输出电压（VO）：可以处理高达30V的输出电压，适用...

产品型号HCPL-7800的Datasheet PDF文件预览

High CMR Isolation Amplifiers

Technical Data

HCPL-7800

HCPL-7800A

HCPL-7800B

applications, we recommend the

HCPL-7800 which exhibits a

part-to-part gain tolerance of

± 5%. For precision applications,

HP offers the HCPL-7800A and

HCPL-7800B, each with part-to-

part gain tolerances of ± 1%.

Features

• 15 kV/µs Common-Mode

Rejection at V_CM= 1000 V*

• Compact, Auto-Insertable

Standard 8-pin DIP Package

• 4.6 µV/°C Offset Drift vs.

Temperature

• 0.9 mV Input Offset Voltage

• 85 kHz Bandwidth

• 0.1% Nonlinearity

• Worldwide Safety Approval:

UL 1577 (3750 V rms/1 min),

VDE 0884 and CSA

• Advanced Sigma-Delta(Σ∆)

A/D Converter Technology

• Fully Differential Circuit

Topology

• 1 µm CMOS IC Technology

• Switch-Mode Power Supply

Signal Isolation

• General Purpose Analog

Signal Isolation

• Transducer Isolation

Description

The HCPL-7800 high CMR

isolation amplifier provides a

unique combination of features

ideally suited for motor control

circuit designers. The product

provides the precision and

stability needed to accurately

monitor motor current in high-

noise motor control environ-

ments, providing for smoother

control (less “torque ripple”) in

various types of motor control

applications.

The HCPL-7800 utilizes sigma-

delta (Σ∆) analog-to-digital

converter technology, chopper

stabilized amplifiers, and a fully

differential circuit topology

fabricated using HP’s 1 µm

CMOS IC process. The part also

couples our high-efficiency, high-

speed AlGaAs LED to a high-

speed, noise-shielded detector

Functional Diagram

Applications

• Motor Phase Current

Sensing

• General Purpose Current

Sensing

• High-Voltage Power Source

Voltage Monitoring

DD2

DD1

This product paves the way for a

smaller, lighter, easier to produce,

high noise rejection, low cost

solution to motor current

sensing. The product can also be

used for general analog signal

isolation applications requiring

high accuracy, stability and

DD1

DD2

IN+

OUT+

OUT-

IN-

*The terms common-mode rejection

(CMR) and isolation-mode rejection (IMR)

are used interchangeably throughout this

data sheet.

linearity under similarly severe

noise conditions. For general

GND1

GND2

CMR SHIELD

CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to

prevent damage and/or degradation which may be induced by ESD.

1-216

5965-3592E

using our patented “light-pipe”

optocoupler packaging

technology.

rejection, as well as excellent

offset and gain accuracy and

stability over time and tempera-

ture. This performance is

delivered in a compact, auto-

insertable, industry standard 8-

pin DIP package that meets

worldwide regulatory safety

standards (gull-wing surface

mount option #300 also

available).

Together, these features deliver

unequaled isolation-mode noise

Ordering Information:

HCPL-7800x

No Specifier = ± 5% Gain Tol.; Mean Gain Value = 8.00

A = ± 1% Gain Tol.; Mean Gain Value = 7.93

B = ± 1% Gain Tol.; Mean Gain Value = 8.07

Option yyy

300 = Gull Wing Surface Mount Lead Option

500 = Tape/Reel Package Option (1 k min.)

Option datasheets available. Contact your Hewlett-Packard sales representative or authorized distributor for

information.

Package Outline Drawings

Standard DIP Package

9.40 (0.370)

9.90 (0.390)

TYPE NUMBER*

DATE CODE

0.20 (0.008)

0.33 (0.013)

6.10 (0.240)

6.60 (0.260)

HP 7800

YYWW

7.36 (0.290)

7.88 (0.310)

5° TYP.

PIN ONE

1.78 (0.070) MAX.

1.19 (0.047) MAX.

4.70 (0.185) MAX.

PIN DIAGRAM

DD1

IN+

DD2

PIN ONE

0.51 (0.020) MIN.

2.92 (0.115) MIN.

OUT+

OUT–

IN–

0.76 (0.030)

1.24 (0.049)

0.65 (0.025) MAX.

GND1 GND2

2.28 (0.090)

2.80 (0.110)

DIMENSIONS IN MILLIMETERS AND (INCHES).

* TYPE NUMBER FOR: HCPL-7800 = 7800

HCPL-7800A = 7800A

HCPL-7800B = 7800B

1-217

Gull Wing Surface Mount Option 300*

PIN LOCATION (FOR REFERENCE ONLY)

9.65 ± 0.25

(0.380 ± 0.010)

1.02 (0.040)

1.19 (0.047)

4.83

(0.190)

TYP.

HP 7800

YYWW

6.350 ± 0.25

(0.250 ± 0.010)

9.65 ± 0.25

(0.380 ± 0.010)

MOLDED

0.380 (0.015)

0.635 (0.025)

1.19 (0.047)

1.78 (0.070)

9.65 ± 0.25

(0.380 ± 0.010)

1.780

(0.070)

MAX.

1.19

(0.047)

MAX.

7.62 ± 0.25

(0.300 ± 0.010)

0.20 (0.008)

0.33 (0.013)

4.19

MAX.

(0.165)

0.635 ± 0.25

(0.025 ± 0.010)

1.080 ± 0.320

(0.043 ± 0.013)

0.51 ± 0.130

(0.020 ± 0.005)

12° NOM.

2.540

(0.100)

BSC

DIMENSIONS IN MILLIMETERS (INCHES).

TOLERANCES (UNLESS OTHERWISE SPECIFIED): xx.xx = 0.01

xx.xxx = 0.005

LEAD COPLANARITY

MAXIMUM: 0.102 (0.004)

* REFER TO OPTION 300 DATA SHEET FOR MORE INFORMATION.

Maximum Solder Reflow Thermal Profile

260

240

220

200

180

160

140

120

100

∆T = 145°C, 1°C/SEC

∆T = 115°C, 0.3°C/SEC

∆T = 100°C, 1.5°C/SEC

TIME – MINUTES

(NOTE: USE OF NON-CHLORINE ACTIVATED FLUXES IS RECOMMENDED.)

1-218

Regulatory Information

The HCPL-7800 has been

approved by the following

organizations:

CSA

VDE

Recognized under UL 1577,

Component Recognition

Program, File E55361.

Approved under CSA Component

Acceptance Notice #5, File CA

88324.

Approved according to VDE

0884/06.92.

Insulation and Safety Related Specifications

Parameter

Symbol Value Units

Conditions

Min. External Air Gap

(External Clearance)

Min. External Tracking

Path (External Creepage)

Min. Internal Plastic Gap

(Internal Clearance)

L(IO1)

7.4

8.0

0.5

Measured from input terminals to output terminals,

shortest distance through air

Measured from input terminals to output terminals,

shortest distance path along body

Through insulation distance, conductor to conductor,

usually the direct distance between the photoemitter

and photodetector inside the optocoupler cavity

L(IO2)

Tracking Resistance

(Comparative Tracking

Index)

CTI

175

III a

DIN IEC 112/VDE 0303 Part 1

Isolation Group

Material Group (DIN VDE 0110, 1/89, Table 1)

Option 300 – surface mount classification is Class A in accordance with CECC 00802.

VDE 0884 (06.92) Insulation Characteristics

Description

Symbol

Characteristic

Unit

Installation classification per DIN VDE 0110, Table 1

for rated mains voltage ≤ 300 V rms

for rated mains voltage ≤ 600 V rms

I-IV

I-III

Climatic Classification

Pollution Degree (DIN VDE 0110, Table 1)*

Maximum Working Insulation Voltage

40/100/21

IORM

848

V peak

Input to Output Test Voltage, Method b**

V_PR= 1.875 x V_IORM, Production test with t_p= 1 sec,

Partial discharge < 5 pC

V_PR

1591

Input to Output Test Voltage, Method a**

V_PR= 1.5 x V_IORM, Type and sample test with t_p= 60 sec,

Partial discharge < 5 pC

Highest Allowable Overvoltage**

(Transient Overvoltage t_TR= 10 sec)

V_PR

1273

6000

V peak

V_TR

Safety-limiting values (Maximum values allowed in the event

of a failure, also see Figure 27)

Case Temperature

Input Power

T_S

175

°C

P_S,Input

Output Power

P_S,Output

250

Insulation Resistance at T_S, V_IO= 500 V

R_S

≥ 1x10¹²

Ω

*This part may also be used in Pollution Degree 3 environments where the rated mains voltage is ≤ 300 V rms (per DIN VDE 0110).

**Refer to the front of the optocoupler section of the current catalog for a more detailed description of VDE 0884 and other product

safety requirements.

Note: Optocouplers providing safe electrical separation per VDE 0884 do so only within the safety-limiting values to which they are

qualified. Protective cut-out switches must be used to ensure that the safety limits are not exceeded.

1-219

Absolute Maximum Ratings

Parameter

Storage Temperature

Symbol

T_S

Min.

-55

Max.

125

Unit

°C

Note

Ambient Operating Temperature

Supply Voltages

T_A

-40

0.0

100

5.5

V_DD1, V_DD2

Steady-State Input Voltage

Two Second Transient Input Voltage

Output Voltages

_IN+, V

-2.0

-6.0

-0.5

V_DD1+0.5

IN-

V_OUT+, V_OUT-

T_LS

V_DD2+0.5

260

°C

Lead Solder Temperature

(1.6 mm below seating plane, 10 sec.)

Reflow Temperature Profile

See Package Outline Drawings Section

Recommended Operating Conditions

Parameter

Ambient Operating Temperature

Supply Voltages

Symbol

Min.

-40

Max.

Unit

°C

Note

T_A

V_DD1, V_DD2

4.5

-200

5.5

200

Input Voltage

_IN+, V

IN-

Output Current

|I_O|

1-220

DC Electrical Specifications

All specifications and figures are at the nominal operating condition of V_IN+= 0 V, V_IN-= 0 V, T_A= 25°C, V_DD1

5.0 V, and V_DD2= 5.0 V, unless otherwise noted.

Parameter

Input Offset Voltage

Input Offset Drift vs.

Temperature

Abs. Value of Input

Symbol

Min.

-1.8

Typ. Max.

Unit

µV/°C

Test Conditions

Fig. Note

-0.9

-2.1

0.0

dV /dT

1, 2

|dV /dT|

4.6

µV/°C

Offset Drift vs. Temperature

Input Offset Drift vs. V_DD1

Input Offset Drift vs. V_DD2

Gain (± 5% Tol.)

Gain - A Version (± 1% Tol.)

Gain - B Version (± 1% Tol.)

Gain Drift vs. Temperature

dV /dV_DD1

µV/V

1, 3

1, 4

dV /dV_DD2

-40

G_A

7.61

7.85

7.99

8.00 8.40

7.93 8.01

8.07 8.15

0.001

-200 mV < V_IN+< 200 mV 1, 5

G_B

dG/dT

|dG/dT|

%/°C

5, 6

Abs. Value of Gain Drift vs.

Temperature

0.001

Gain Drift vs. V_DD1

Gain Drift vs. V_DD2

200 mV Nonlinearity

200 mV Nonlinearity Drift

vs. Temperature

200 mV Nonlinearity Drift

vs. V_DD1

200 mV Nonlinearity Drift

vs. V_DD2

dG/dV_DD1

dG/dV_DD2

NL₂₀₀

0.21

%/V

5, 7

5, 8

5, 9

-0.06

0.2

-0.001

0.35

0.25

dNL₂₀₀/dT

% pts/°C

5, 10

dNL₂₀₀/dV_DD1

dNL₂₀₀/dV_DD2

NL₁₀₀

-0.005

-0.007

% pts/V

5, 11

5, 12

100 mV Nonlinearity

0.1

-100 mV< V_IN+< 100 mV 5, 13

Maximum Input Voltage

Before Output Clipping

300

IN+ max

Average Input Bias Current

Input Bias Current

I_IN

dI_IN/dT

-670

nA/°C

15,16 20

Temperature Coefficient

Average Input Resistance

R_IN

530

kΩ

Input Resistance

dR_IN/dT

0.38

%/°C

Temperature Coefficient

Input DC Common-Mode

Rejection Ratio

Output Resistance

CMRR_IN

R_O

Ω

Output Resistance

dR_O/dT

0.6

%/°C

Temperature Coefficient

Output Low Voltage

Output High Voltage

Output Common-Mode

Voltage

1.18

3.61

2.39 2.60

|V_IN+| = 500 mV

I_OUT+= 0 A, I_OUT–= 0 A

2.20

-40°C < T < 85°C

OCM

4.5 V < V_DD1< 5.5 V

Input Supply Current

Output Supply Current

I_DD1

I_DD2

10.7 15.5

11.6 14.5

V_IN+= 200 mV,

-40°C < T < 85°C

4.5 V < V_DD2< 5.5 V

Output Short-Circuit

Current

|I_OSC

9.3

V_OUT= 0 V or V_DD2

1-221

AC Electrical Specifications

All specifications and figures are at the nominal operating condition of V_IN+= 0 V, V_IN-= 0 V, T = 25°C,

V_DD1= 5.0 V, and V_DD2= 5.0 V, unless otherwise noted.

Parameter

Symbol Min.

Typ. Max.

Unit

Test Conditions

_IM= 1 kV

Fig.

Note

Rising Edge Isolation

Mode Rejection

IMR_R

IMR_F

IMRR

kV/µs

19, 20

Falling Edge Isolation

Mode Rejection

kV/µs

Isolation Mode Rejection

Ratio at 60 Hz

>140

Propagation Delay to 10%

Propagation Delay to 50%

Propagation Delay to 90%

Rise/Fall Time (10%-90%)

Bandwidth (-3 dB)

t_PD10

t_PD50

t_PD90

t_R/F

2.0

3.4

6.3

4.3

3.3

5.6

9.9

6.6

µs

-40°C < T < 85°C

21, 22

µs

f_-3dB

f_-45°

V_N

kHz

23, 24

Bandwidth (-45°)

RMS Input-Referred

Noise

300

µV rms Bandwidth = 100 kHz 25, 26

Power Supply Rejection

PSR

p-p

Package Characteristics

All specifications and figures are at the nominal operating condition of V_IN+= 0 V, V_IN-= 0 V, T = 25°C, V_DD1

= 5.0 V, and V_DD2= 5.0 V, unless otherwise noted.

Parameter

Symbol Min. Typ. Max.

Unit

Test Conditions

Fig. Note

Input-Output Momentary

Withstand Voltage*

3750

V rms t = 1 min., RH ≤ 50%

30, 31

ISO

Input-Output Resistance

R_I-O

10¹²10¹³

Ω

T_A= 25°C

T_A= 100°C

f = 1 MHz

V_I-O= 500 Vdc

10¹¹

0.7

Input-Output Capacitance

C_I-O

Input IC Junction-to-

θ_jci

°C/W

Case Thermal Resistance

Output IC Junction-to-Case

Thermal Resistance

θ_jco

114

°C/W

*The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output

continuous voltage rating. For the continuous voltage rating refer to the VDE 0884 Insulation Characteristics Table (if applicable), your

equipment level safety specification, or HP Application Note 1074, “Optocoupler Input-Output Endurance Voltage.”

1-222

Notes:

as the change in magnitude per °C

change in temperature.

16. Data sheet value is the average change

in nonlinearity versus temperature at

T_A= 25°C, with all other parameters

held constant. This value is expressed

as the number of percentage points

that the nonlinearity will change per

°C change in temperature. For

General Note: Typical values represent the

mean value of all characterization units at

the nominal operating conditions. Typical

drift specifications are determined by

calculating the rate of change of the speci-

fied parameter versus the drift parameter

(at nominal operating conditions) for each

characterization unit, and then averaging

the individual unit rates. The correspond-

ing drift figures are normalized to the

nominal operating conditions and show

how much drift occurs as the particular

drift parameter is varied from its nominal

value, with all other parameters held at

their nominal operating values. Figures

show the mean drift of all characterization

units as a group, as well as the ± 2-sigma

statistical limits. Note that the typical drift

specifications in the tables below may

differ from the slopes of the mean curves

shown in the corresponding figures.

8. Data sheet value is the average change

in offset voltage versus input supply

voltage at V_DD1= 5 V, with all other

parameters held constant. This value

is expressed as the change in offset

voltage per volt change of the input

supply voltage.

9. Data sheet value is the average change

in offset voltage versus output supply

voltage at V_DD2= 5 V, with all other

parameters held constant. This value

is expressed as the change in offset

voltage per volt change of the output

supply voltage.

10. Gain is defined as the slope of the

best-fit line of differential output

voltage (V_OUT+- V_OUT-) versus

differential input voltage (V_IN+-V_IN-

over the specified input range.

11. Data sheet value is the average change

in gain versus temperature at

example, if the temperature is

increased from 25°C to 35°C, the

nonlinearity typically will decrease by

0.01 percentage points (10°C times

-0.001 % pts/°C) from 0.2% to 0.19%.

17. Data sheet value is the average change

in nonlinearity versus input supply

voltage at V_DD1= 5 V, with all other

parameters held constant. This value

is expressed as the number of

percentage points that the nonlinearity

will change per volt change of the

input supply voltage.

)

18. Data sheet value is the average change

in nonlinearity versus output supply

voltage at V_DD2= 5 V, with all other

parameters held constant. This value

is expressed as the number of

1. HP recommends the use of non-

chlorine activated fluxes.

T_A= 25°C, with all other parameters

held constant. This value is expressed

as the percentage change in gain per

°C change in temperature.

2. The HCPL-7800 will operate properly

at ambient temperatures up to 100°C

but may not meet published specifi-

cations under these conditions.

3. DC performance can be best

maintained by keeping V_DD1and V_DD2

as close as possible to 5 V. See

application section for circuit

recommendations.

percentage points that the nonlinearity

will change per volt change of the

output supply voltage.

12. Data sheet value is the average

magnitude of the change in gain

19. NL₁₀₀is the nonlinearity specified over

an input voltage range of ± 100 mV.

20. Because of the switched-capacitor

nature of the input sigma-delta

versus temperature at T = 25°C, with

all other parameters held constant.

This value is expressed as the

percentage change in magnitude per

°C change in temperature.

converter, time-averaged values are

shown.

4. HP recommends operation with V

= 0 V (tied to GND1). Limiting V

to 100 mV will improve DC

IN-

13. Data sheet value is the average change

in gain versus input supply voltage at

21. This parameter is defined as the ratio

of the differential signal gain (signal

applied differentially between pins 2

and 3) to the common-mode gain

(input pins tied together and the signal

applied to both inputs at the same

time), expressed in dB.

22. When the differential input signal

exceeds approximately 300 mV, the

outputs will limit at the typical values

shown.

IN+

V_DD1= 5 V, with all other parameters

nonlinearity and nonlinearity drift. If

held constant. This value is expressed

as the percentage change in gain per

volt change of the input supply

voltage.

V_IN-is brought above 800 mV with

respect to GND1, an internal test

mode may be activated. This test mode

is not intended for customer use.

5. Although, statistically, the average

difference in the output resistance of

pins 6 and 7 is near zero, the standard

deviation of the difference is 1.3 Ω

due to normal process variations.

Consequently, keeping the output

current below 1 mA will ensure the

best offset performance.

6. Data sheet value is the average change

in offset voltage versus temperature at

T_A= 25°C, with all other parameters

held constant. This value is expressed

as the change in offset voltage per °C

change in temperature.

14. Data sheet value is the average change

in gain versus output supply voltage at

V_DD2= 5 V, with all other parameters

held constant. This value is expressed

as the percentage change in gain per

volt change of the output supply

voltage.

23. The maximum specified input supply

current occurs when the differential

input voltage (V_IN+- V_IN-) = 0 V. The

input supply current decreases

15. Nonlinearity is defined as the maxi-

mum deviation of the output voltage

from the best-fit gain line (see Note

10), expressed as a percentage of the

full-scale differential output voltage

range. For example, an input range of

± 200 mV generates a full-scale differ-

ential output range of 3.2 V (± 1.6 V);

a maximum output deviation of 6.4

mV would therefore correspond to a

nonlinearity of 0.2%.

approximately 1.3 mA per 1 V

decrease in V_DD1

24. The maximum specified output supply

current occurs when the differential

input voltage (V_IN+- V_IN-) = 200 mV,

the maximum recommended operating

input voltage. However, the output

supply current will continue to rise for

differential input voltages up to

approximately 300 mV, beyond which

the output supply current remains

constant.

7. Data sheet value is the average

magnitude of the change in offset

voltage versus temperature at

T_A= 25°C, with all other parameters

held constant. This value is expressed

1-223

25. Short circuit current is the amount of

output current generated when either

output is shorted to V_DD2or ground.

26. IMR (also known as CMR or Common

Mode Rejection) specifies the mini-

mum rate of rise of an isolation mode

noise signal at which small output

perturbations begin to appear. These

output perturbations can occur with

both the rising and falling edges of the

isolation-mode wave form and may be

of either polarity. When the perturba-

tions first appear, they occur only

occasionally and with relatively small

peak amplitudes (typically 20-30 mV

at the output of the recommended

application circuit). As the magnitude

of the isolation mode transients

the isolation mode gain (input pins

tied to pin 4 and the signal applied

between the input and the output of

the isolation amplifier) at 60 Hz,

expressed in dB.

29. Data sheet value is the differential

amplitude of the transient at the

output of the HCPL-7800 when a

1 V_pk-pk, 1 MHz square wave with 5 ns

rise and fall times is applied to both

28. Output noise comes from two primary

sources: chopper noise and sigma-

delta quantization noise. Chopper

noise results from chopper stabiliza-

tion of the output op-amps. It occurs

at a specific frequency (typically 200

kHz at room temperature), and is not

attenuated by the internal output filter.

A filter circuit can be easily added to

the external post-amplifier to reduce

the total rms output noise. The

V_DD1and V_DD2.

30. This is a two-terminal measurement:

pins 1-4 are shorted together and pins

5-8 are shorted together.

31. In accordance with UL1577, for

devices with minimum V_ISOspecified at

3750 V_rms, each optocoupler is proof-

tested by applying an insulation test

voltage greater-than-or-equal-to 4500

V_rmsfor one second (leak current

detection limit, I_I-O< 5 µA). This test

is performed before the method b,

100% production test for partial

internal output filter does eliminate

most, but not all, of the sigma-delta

quantization noise. The magnitude of

the output quantization noise is very

small at lower frequencies (below 10

kHz) and increases with increasing

frequency. See applications section for

more information.

increase, the regularity and amplitude

of the perturbations also increase. See

applications section for more

discharge shown in the VDE 0884

Insulation Characteristics Table.

32. Case temperature was measured with a

thermocouple located in the center of

the underside of the package.

information.

27. IMRR is defined as the ratio of

differential signal gain (signal applied

differentially between pins 2 and 3) to

1500

MEAN

± 2 SIGMA

+5 V

+15 V

1000

500

0.1 µF

HCPL-7800

0.1 µF

10 K

OUT

AD624CD

GAIN = 1000

10 K

-500

0.1 µF

0.33 µF

-1000

-40 -20

100

– TEMPERATURE – °C

-15 V

Figure 1. Input Offset Voltage Test Circuit.

Figure 2. Input-Referred Offset Drift

vs. Temperature.

1-224

600

400

200

400

300

200

100

MEAN

± 2 SIGMA

MEAN

± 2 SIGMA

-200

-400

-100

-600

-200

4.4

4.6

4.8

5.0

5.2

5.4

5.6

4.4

4.6

4.8

5.0

5.2

5.4

5.6

– INPUT SUPPLY VOLTAGE – V

– OUTPUT SUPPLY VOLTAGE – V

DD1

DD2

Figure 3. Input-Referred Offset Drift

vs. V_DD1(V_DD2= 5 V).

Figure 4. Input-Referred Offset Drift

vs. V_DD2(V_DD1= 5 V).

1.5

1.0

0.5

MEAN

± 2 SIGMA

+5 V

+15 V

0.1 µF

HCPL-7800

0.1 µF

10 K

OUT

-0.5

-1.0

AD624CD

GAIN = 1

10 K

0.01 µF

0.1 µF

0.33 µF

-40

-20

100

-15 V

– TEMPERATURE – °C

Figure 5. Gain and Nonlinearity Test Circuit.

Figure 6. Gain Drift vs. Temperature.

0.3

0.5

0.4

0.3

MEAN

± 2 SIGMA

MEAN

± 2 SIGMA

0.2

0.1

-0.5

-1.0

0.2

0.1

-0.1

-1.5

-0.2

-0.3

MEAN

± 2 SIGMA

-0.1

-2.0

-0.2

-0.1

0.1

0.2

4.4

4.6

4.8

5.0

5.2

5.4

5.6

4.4

4.6

4.8

5.0

5.2

5.4

5.6

– INPUT VOLTAGE – V

– INPUT SUPPLY VOLTAGE – V

– OUTPUT SUPPLY VOLTAGE – V

DD1

DD2

Figure 7. Gain Drift vs.

V_DD1(V_DD2= 5 V).

Figure 8. Gain Drift vs.

V_DD2(V_DD1= 5 V).

Figure 9. 200 mV Nonlinearity Error

Plot.

1-225

0.15

0.10

0.05

0.06

0.04

0.06

0.04

MEAN

± 2 SIGMA

MEAN

± 2 SIGMA

MEAN

± 2 SIGMA

0.02

-0.02

-0.04

-0.06

-0.05

-0.02

-0.04

-0.10

4.4

4.6

4.8

5.0

5.2

5.4

5.6

4.4

4.6

4.8

5.0

5.2

5.4

5.6

-40 -20

100

– INPUT SUPPLY VOLTAGE – V

– OUTPUT SUPPLY VOLTAGE – V

DD2

– TEMPERATURE – °C

DD1

Figure 10. 200 mV Nonlinearity Drift

vs. Temperature.

Figure 11. 200 mV Nonlinearity Drift

vs. V_DD1(V_DD2= 5 V).

Figure 12. 200 mV Nonlinearity Drift

vs. V_DD2(V_DD1= 5 V).

0.15

0.10

0.05

4.0

3.5

-200

-400

3.0

POSITIVE

2.5

2.0

OUTPUT

(PIN 7)

-600

-800

-0.05

NEGATIVE

OUTPUT

(PIN 6)

-0.10

1.5

1.0

-1000

-1200

-0.15

MEAN

± 2 SIGMA

-0.20

-0.10

-0.05

0.05

0.10

-0.6 -0.4

-0.2

0.2

0.4

0.6

-0.2

-0.1

0.1

0.2

– INPUT VOLTAGE – V

Figure 13. 100 mV Nonlinearity Error

Plot.

Figure 14. Typical Output Voltages vs.

Input Voltage.

Figure 15. Typical Input Current vs.

Input Voltage.

12.0

10.5

10.0

9.5

= 85°C

= 25°C

= -40°C

11.5

11.0

-2

-4

-6

10.5

10.0

9.0

= -40°C

= 25°C

= 85°C

-8

-10

8.5

-0.4 -0.3 -0.2 -0.1

-6

-4

-2

-0.4 -0.3 -0.2 -0.1

0.1

0.2 0.3 0.4

0.1

0.2 0.3 0.4

– INPUT VOLTAGE – V

Figure 16. Typical Input Current vs.

Input Voltage.

Figure 17. Typical Input Supply

Current vs. Input Voltage.

Figure 18. Typical Output Supply

Current vs. Input Voltage.

1-226

330 pF

5.11 K

+15 V

+5 V

0.1 µF

78L05

HCPL-7800

0.1 µF

OUT

1.00 K

OUT

0.1 µF

OP-42

0.1 µF

9 V

5.11 K

330 pF

PULSE GEN.

-15 V

Figure 19. Isolation Mode Rejection Test Circuit.

DELAY TO 90%

RISE/FALL TIME

DELAY TO 50%

DELAY TO 10%

1000 V

0 V

50 mV PERTURBATION

(DEFINITION OF FAILURE)

-40

-20

80 100

0 V

– TEMPERATURE – °C

Figure 20. Typical IMR Failure Waveform.

Figure 21. Typical Propagation Delays

and Rise/Fall Time vs. Temperature.

1-227

50%

t_PD90

t_PD50

t_PD10

90%

OUT

50%

10%

t _R/F

10.0 K

+15 V

+5 V

0.1 µF

HCPL-7800

0.1 µF

2.00 K

OUT

OP-42

0.1 µF

2.00 K

0.01 µF

10.0 K

-15 V

Figure 22. Propagation Delay and Rise/Fall Time Test Circuit.

3.0

2.5

110

100

NO BANDWIDTH LIMITING

BANDWIDTH LIMITED TO 100 kHz

BANDWIDTH LIMITED TO 10 kHz

-5

-10

3 dB BANDWIDTH

45 DEGREE PHASE

BANDWIDTH

-1

-15

2.0

1.5

1.0

-2

-30

-3

-4

-45

-60

0.5

AMPLITUDE

PHASE

100

150

200

250

-40

-20

100

500 1000

5000 10000 50000 100000

– INPUT VOLTAGE – mV

– TEMPERATURE – °C

f – FREQUENCY – Hz

Figure 23. Typical Amplitude and

Phase Response vs. Frequency.

Figure 24. Typical 3 dB and 45°

Bandwidths vs. Temperature.

Figure 25. Typical RMS Input-Referred

Noise vs. Input Voltage.

1-228

FLOATING

POSITIVE

SUPPLY

HV+

75 pF

GATE DRIVE

CIRCUIT

10.0 KΩ

+5 V

+15 V

0.1 µF

OUT

78L05

0.1 µF

2.00 KΩ

0.1 µF

0.01 µF

OUT

39 Ω

HCPL-7800

MC34081

MOTOR

2.00 KΩ

SENSE

0.1 µF

75 pF

10.0 KΩ

-15 V

HV-

Figure 26. Recommended Application Circuit.

400

OUTPUT POWER, P

INPUT POWER, P

300

200

100

20 40 60 80 100 120 140 160 180

175

– TEMPERATURE – °C

Figure 27. Dependence of Safety-

Limiting Parameters on Ambient

Temperature.

Applications Information

Functional Description

signal is decoded and converted

into accurate analog voltage

levels, which are then filtered to

produce the final output signal.

the converter data to be

transmitted, essentially converting

the widths of the sigma-delta

output pulses into the positions

of the encoder output pulses. A

significant benefit of this coding

scheme is that any non-ideal

characteristics of the LED (such

as non-linearity and drift over

time and temperature) have little,

if any, effect on the performance

of the HCPL-7800.

Figure 28 shows the primary

functional blocks of the HCPL-

7800. In operation, the sigma-

delta analog-to-digital converter

converts the analog input signal

into a high-speed serial bit

stream, the time average of which

is directly proportional to the

input signal. This high speed

stream of digital data is encoded

and optically transmitted to the

detector circuit. The detected

To help maintain device accuracy

over time and temperature,

internal amplifiers are chopper-

stabilized. Additionally, the

encoder circuit eliminates the

effects of pulse-width distortion of

the optically transmitted data by

generating one pulse for every

edge (both rising and falling) of

1-229

Circuit Information

µF capacitors close to the

exhibit better offset performance

than op-amps with JFET or

MOSFET input stages.

The recommended application

circuit is shown in Figure 26. A

floating power supply (which in

many applications could be the

same supply that is used to drive

the high-side power transistor) is

regulated to 5 V using a simple

three-terminal voltage regulator.

The input of the HCPL-7800 is

connected directly to the current

sensing resistor. The differential

output of the isolation amplifier is minimize any stray coupling by

converted to a ground-referenced maintaining the maximum

single-ended output voltage with a possible distance between the

simple differential amplifier

circuit. Although the application

circuit is relatively simple, a few

general recommendations should

be followed to ensure optimal

performance.

isolation amplifier. In either case,

it is recommended that twisted-

pair wire be used to connect the

isolation amplifier to the current-

sensing resistor to minimize

electro-magnetic interference of

the sense signal.

In addition, the op-amp should

also have enough bandwidth and

slew rate so that it does not

adversely affect the response

speed of the overall circuit. The

post-amplifier circuit includes a

pair of capacitors (C5 and C6)

that form a single-pole low-pass

filter; these capacitors allow the

bandwidth of the post-amp to be

adjusted independently of the gain

and are useful for reducing the

output noise from the isolation

amplifier. Many different op-amps

could be used in the circuit,

To obtain optimal CMR perfor-

mance, the layout of the printed

circuit board (PCB) should

input and output sides of the

circuit and ensuring that any

ground plane on the PCB does not

pass directly below the HCPL-

7800. An example single-sided

PCB layout for the recommended

application circuit is shown in

Figure 29. The trace pattern is

shown in “X-ray” view as it would

including: MC34082A (Motorola),

TL032A, TLO52A, and TLC277

(Texas Instruments), LF412A

(National Semiconductor).

As shown in Figure 26, 0.1 µF

bypass capacitors should be

located as close as possible to the be seen from the top of the PCB;

The gain-setting resistors in the

post-amp should have a tolerance

of 1% or better to ensure

input and output power supply

pins of the HCPL-7800. Notice

that pin 2 (V_IN+) is bypassed with

a 0.01 µF capacitor to reduce

input offset voltage that can be

caused by the combination of

a mirror image of this layout can

be used to generate a PCB.

adequate CMRR and adequate

gain tolerance for the overall

circuit. Resistor networks can be

used that have much better ratio

tolerances than can be achieved

using discrete resistors. A resistor

network also reduces the total

number of components for the

circuit as well as the required

board space.

An inexpensive 78L05 three-

terminal regulator is shown in the

recommended application circuit.

long input leads and the switched- Because the performance of the

capacitor nature of the input

circuit.

isolation amplifier can be affected

by changes in the power supply

voltages, using regulators with

tighter output voltage tolerances

will result in better overall circuit

performance. Many different

regulators that provide tighter

output voltage tolerances than the

78L05 can be used, including:

TL780-05 (Texas Instruments),

LM340LAZ-5.0 and LP2950CZ-

5.0 (National Semiconductor).

With pin 3 (V ) tied directly to

IN-

pin 4 (GND1), the power-supply

return line also functions as the

sense line for the negative side of

the current-sensing resistor; this

allows a single twisted pair of

wire to connect the isolation

amplifier to the sense resistor. In

some applications, however,

better performance may be

The current-sensing resistor

should have a relatively low value

of resistance to minimize power

dissipation, a fairly low

inductance to accurately reflect

high-frequency signal compo-

nents, and a reasonably tight

tolerance to maintain overall

circuit accuracy. Although

decreasing the value of the sense

resistor decreases power

dissipation, it also decreases the

full-scale input voltage making

iso-amp offset voltage effects

more significant. These two

obtained by connecting pins 2

The op-amp used in the external

post-amplifier circuit should be of

sufficiently high precision so that

it does not contribute a significant

amount of offset or offset drift

relative to the contribution from

and 3 (V_IN+and V ) directly

IN-

across the sense resistor with

twisted pair wire and using a

separate wire for the power

supply return line. Both input

pins should be bypassed with 0.01 the isolation amplifier. Generally,

op-amps with bipolar input stages

1-230

conflicting considerations,

therefore, must be weighed

against each other in selecting an

appropriate sense resistor for a

particular application. To

maintain circuit accuracy, it is

recommended that the sense

resistor and the isolation amplifier

circuit be located as close as

possible to one another. Although

it is possible to buy current-

sensing resistors from established

vendors (e.g., the LVR-1, -3 and

-5 resistors from Dale), it is also

possible to make a sense resistor

using a short piece of wire or

even a trace on a PC board.

Figures 30 and 31 illustrate the

response of the overall isolation

amplifier circuit shown in Figure

26. Figure 30 shows the response

of the circuit to a ± 200 mV 20

kHz sine wave input and Figure

31 the response of the circuit to a

± 200 mV 20 kHz square wave

input. Both figures demonstrate

the fast, well-behaved response of

the HCPL-7800.

the time scale is different from

the previous figures). The first

wave form is the output of the

application circuit with the filter

capacitors removed to show the

actual response of the isolation

amplifier. The second wave form

is the response of the same circuit

with the capacitors installed. The

recovery time and overshoot are

relatively independent of the

amplitude and polarity of the

overdrive signal, as well as its

duration.

Figure 32 shows how quickly the

isolation amplifier recovers from

an overdrive condition generated

by a 2 kHz square wave swinging

between 0 and 500 mV (note that

For more information, refer to

Application Note 1059.

VOLTAGE

CLOCK

VOLTAGE

REGULATOR

GENERATOR

REGULATOR

ISOLATION

BOUNDARY

Σ∆

LED DRIVE

CIRCUIT

DETECTOR

CIRCUIT

DECODER

AND D/A

ISO-AMP

OUTPUT

ISO-AMP

INPUT

ENCODER

FILTER

MODULATOR

Figure 28. HCPL-7800 Block Diagram.

Figure 29. PC Board Trace Pattern and Loading Diagram Example.

1-231

Figure 30. Application Circuit Sine Wave Response.

Figure 31. Application Circuit Square Wave Response.

Figure 32. Application Circuit Overload Recovery Waveform.

1-232

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HCPL-7800产品参数

型号:	HCPL-7800
是否Rohs认证：	不符合
生命周期：	Transferred
IHS 制造商：	HEWLETT PACKARD CO
零件包装代码：	DIP
包装说明：	DIP, DIP8,.3
针数：	8
Reach Compliance Code：	unknown
ECCN代码：	EAR99
HTS代码：	8542.33.00.01
风险等级：	5.21
Is Samacsys：	N
放大器类型：	ISOLATION AMPLIFIER
标称带宽 (3dB)：	85 MHz
最大共模电压：	3750 V
最小绝缘电压：	3750 V
JESD-30 代码：	R-PDIP-T8
JESD-609代码：	e0
功能数量：	1
端子数量：	8
最高工作温度：	85 °C
最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY
封装代码：	DIP
封装等效代码：	DIP8,.3
封装形状：	RECTANGULAR
封装形式：	IN-LINE
电源：	5 V
认证状态：	Not Qualified
子类别：	Isolation Amplifiers
供电电压上限：	5.5 V
标称供电电压 (Vsup)：	5 V
表面贴装：	NO
技术：	CMOS
温度等级：	INDUSTRIAL
端子面层：	Tin/Lead (Sn/Pb)
端子形式：	THROUGH-HOLE
端子节距：	2.54 mm
端子位置：	DUAL
最大电压增益：	8.4
最小电压增益：	7.61
Base Number Matches：	1

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