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  • 北京元坤伟业科技有限公司

         该会员已使用本站17年以上

  • LP3962ESX-3.3
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  • 深圳市芯脉实业有限公司

     该会员已使用本站11年以上
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  • 数量500 
  • 厂家TI 
  • 封装DDPAK/TO-263 (KTT) 
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  • 深圳市集创讯科技有限公司

     该会员已使用本站5年以上
  • LP3962ESX-3.3/NOPB
  • 数量11500 
  • 厂家TI/德州仪器 
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  • 深圳市华科泰电子商行

     该会员已使用本站13年以上
  • LP3962ESX-3.3
  • 数量840000 
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  • 北京中其伟业科技有限公司

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  • LP3962ESX-3.3 NOPB
  • 数量3000 
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  • 深圳市华斯顿电子科技有限公司

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  • LP3962ESX-3.3/NOPB
  • 数量12500 
  • 厂家TI/德州仪器 
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  • 深圳市华斯顿电子科技有限公司

     该会员已使用本站16年以上
  • LP3962ESX-3.3
  • 数量31366 
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     该会员已使用本站17年以上
  • LP3962ESX-3.3
  • 数量5000 
  • 厂家National Semiconductor (TI) 
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     该会员已使用本站13年以上
  • LP3962ESX-3.3
  • 数量13607 
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  • 深圳市斌腾达科技有限公司

     该会员已使用本站9年以上
  • LP3962ESX-3.3
  • 数量500 
  • 厂家Texas Instruments 
  • 封装TO-263 
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     该会员已使用本站8年以上
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  • 数量7536 
  • 厂家Texas Instruments 
  • 封装DDPAK/TO-263-5 
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  • 深圳市得捷芯城科技有限公司

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  • LP3962ESX-3.3
  • 数量2012 
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  • 北京元坤伟业(国际)科技有限公司

     该会员已使用本站12年以上
  • LP3962ESX-3.3
  • 数量5000 
  • 厂家National Semiconductor (TI) 
  • 封装贴/插片 
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  • 深圳市原力达电子有限公司

     该会员已使用本站8年以上
  • LP3962ESX-3.3/NOPB
  • 数量5600 
  • 厂家National Semiconductor 
  • 封装原装 
  • 批号14+ 
  • 热卖库存 最低报价
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  • 深圳市恒益昌科技有限公司

     该会员已使用本站6年以上
  • LP3962ESX-3.3
  • 数量3200 
  • 厂家NS 
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  • 数量932 
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  • 深圳市芯脉实业有限公司

     该会员已使用本站11年以上
  • LP3962ESX-3.3/NOPB
  • 数量500 
  • 厂家TI 
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  • 深圳市宏世佳电子科技有限公司

     该会员已使用本站13年以上
  • LP3962ESX-3.3
  • 数量3505 
  • 厂家NS 
  • 封装TO-263 
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  • 深圳市硅诺电子科技有限公司

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  • LP3962ESX-3.3
  • 数量34852 
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  • 昂富(深圳)电子科技有限公司

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  • LP3962ESX-3.3/NOPB
  • 数量34931 
  • 厂家TI/德州仪器 
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  • 深圳市惊羽科技有限公司

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  • LP3962ESX-3.3
  • 数量9328 
  • 厂家TI-德州仪器 
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  • 深圳市华兴微电子有限公司

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  • 数量5000 
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  • 数量5369 
  • 厂家NS 
  • 封装TO2635 
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     该会员已使用本站11年以上
  • LP3962ESX-3.3
  • 数量10000 
  • 厂家TI(德州仪器) 
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  • 深圳市晶美隆科技有限公司

     该会员已使用本站14年以上
  • LP3962ESX-3.3
  • 数量15372 
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  • 数量55000 
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  • 数量1200 
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  • 上海意淼电子科技有限公司

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  • LP3962ESX-3.3
  • 数量20000 
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  • 万三科技(深圳)有限公司

     该会员已使用本站2年以上
  • LP3962ESX-3.3
  • 数量6500000 
  • 厂家TI 
  • 封装原厂原装 
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  • 深圳市鹏和科技有限公司

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  • LP3962ESX-3.3
  • 数量660000 
  • 厂家Texas Instruments 
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产品型号LP3962ESX-3.3的概述

芯片LP3962ESX-3.3的概述 LP3962ESX-3.3是一款高性能的低压线性稳压器,广泛应用于便携式设备、嵌入式系统和其他要求低输入电压、高输出电压稳定性的应用场合。其主要特点是高效率、低静态电流、小型封装和较宽的负载调整范围,使其在现代电子电路设计中非常受欢迎。 该芯片采用先进的 CMOS 技术,可以在不需要外部元件的情况下实现高达 200 mA 的输出电流,输出电压固定在 3.3 V。LP3962 对输入电压的范围要求较宽,可以接收高达 16 V 的输入电压,而其低压差的设计使得输入和输出之间的差值可以低至 0.1 V,从而改善了电源效率。 芯片LP3962ESX-3.3的详细参数 1. 工作电压范围: - 输入电压:2.5 V 至 16 V - 输出电压:固定输出 3.3 V 2. 输出电流: - 最大输出电流:200 mA 3. 功率损耗: -...

产品型号LP3962ESX-3.3的Datasheet PDF文件预览

November 2001  
LP3962/LP3965  
1.5A Fast Ultra Low Dropout Linear Regulators  
General Description  
Features  
n Ultra low dropout voltage  
n Low ground pin current  
n Load regulation of 0.04%  
The LP3962/LP3965 series of fast ultra low-dropout linear  
regulators operate from a +2.5V to +7.0V input supply. Wide  
range of preset output voltage options are available. These  
ultra low dropout linear regulators respond very fast to step  
changes in load which makes them suitable for low voltage  
microprocessor applications. The LP3962/LP3965 are de-  
veloped on a CMOS process which allows low quiescent  
current operation independent of output load current. This  
CMOS process also allows the LP3962/LP3965 to operate  
under extremely low dropout conditions.  
n 15µA quiescent current in shutdown mode  
n Guaranteed output current of 1.5A DC  
n Available in SOT-223,TO-263 and TO-220 packages  
±
n Output voltage accuracy 1.5%  
n Error flag indicates output status (LP3962)  
n Sense option improves better load regulation (LP3965)  
n Extremely low output capacitor requirements  
n Overtemperature/overcurrent protection  
Dropout Voltage: Ultra low dropout voltage; typically 38mV  
at 150mA load current and 380mV at 1.5A load current.  
n −40˚C to +125˚C junction temperature range  
Ground Pin Current: Typically 5mA at 1.5A load current.  
Shutdown Mode: Typically 15µA quiescent current when  
the shutdown pin is pulled low.  
Applications  
n Microprocessor power supplies  
n GTL, GTL+, BTL, and SSTL bus terminators  
n Power supplies for DSPs  
n SCSI terminator  
Error Flag: Error flag goes low when the output voltage  
drops 10% below nominal value (for LP3962).  
SENSE: Sense pin improves regulation at remote loads.  
(For LP3965)  
n Post regulators  
Precision Output Voltage: Multiple output voltage options  
n High efficiency linear regulators  
n Battery chargers  
are available ranging from 1.2V to 5.0V and adjustable  
±
(LP3965), with a guaranteed accuracy of 1.5% at room  
±
temperature, and 3.0% over all conditions (varying line,  
n Other battery powered applications  
load, and temperature).  
Typical Application Circuits  
10126601  
*SD and ERROR pins must be pulled high through a 10kpull-up resistor. Connect the ERROR pin to ground if this function is not used. See applications  
section for more information.  
**  
See Application Hints.  
© 2001 National Semiconductor Corporation  
DS101266  
www.national.com  
Typical Application Circuits (Continued)  
10126634  
*SD and ERROR pins must be pulled high through a 10kpull-up resistor. Connect the ERROR pin to ground if this function is not used. See applications section  
for more information.  
**  
See Application Hints.  
Block Diagram LP3962  
10126603  
www.national.com  
2
Block Diagram LP3965  
10126629  
Block Diagram LP3965-ADJ  
10126635  
3
www.national.com  
Connection Diagrams  
10126605  
10126606  
Top View  
Top View  
TO220-5 Package  
Bent, Staggered Leads  
TO263-5 Package  
10126604  
Top View  
SOT 223-5 Package  
Pin Description for SOT223-5 Package  
LP3962  
LP3965  
#
Pin  
Name  
SD  
Function  
Shutdown  
Name  
Function  
1
2
3
4
SD  
VIN  
Shutdown  
VIN  
Input Supply  
Output Voltage  
ERROR Flag  
Input Supply  
Output Voltage  
VOUT  
ERROR  
VOUT  
SENSE/ADJ  
Remote Sense Pin or  
Output Adjust Pin  
Ground  
5
GND  
Ground  
GND  
Pin Description for TO220-5 and TO263-5 Packages  
LP3962  
LP3965  
#
Pin  
Name  
SD  
Function  
Shutdown  
Name  
SD  
Function  
Shutdown  
1
2
3
4
5
VIN  
Input Supply  
Ground  
VIN  
Input Supply  
GND  
VOUT  
ERROR  
GND  
Ground  
Output Voltage  
ERROR Flag  
VOUT  
Output Voltage  
Remote Sense Pin or  
Output Adjust Pin  
SENSE/ADJ  
Ordering Information  
10126631  
Package Type Designator is ’MP’ for SOT223 package, ’T’ for TO220 package, and ’S’ for TO263 package.  
www.national.com  
4
Ordering Information (Continued)  
TABLE 1. Package Marking and Ordering Information  
Output  
Voltage  
5.0  
Description  
Package  
Type  
Order Number  
LP3962EMP-5.0  
(Current, Option)  
Package Marking  
Supplied As:  
1.5A, Error Flag  
SOT223-5  
LBTB  
1000 units on Tape and  
Reel  
5.0  
3.3  
3.3  
2.5  
2.5  
1.8  
1.8  
5.0  
5.0  
3.3  
3.3  
2.5  
2.5  
1.8  
1.8  
ADJ  
ADJ  
LP3962EMPX-5.0  
LP3962EMP-3.3  
LP3962EMPX-3.3  
LP3962EMP-2.5  
LP3962EMPX-2.5  
LP3962EMP-1.8  
LP3962EMPX-1.8  
LP3965EMP-5.0  
LP3965EMPX-5.0  
LP3965EMP-3.3  
LP3965EMPX-3.3  
LP3965EMP-2.5  
LP3965EMPX-2.5  
LP3965EMP-1.8  
LP3965EMPX-1.8  
LP3965EMP-ADJ  
LP3965EMPX-ADJ  
1.5A, Error Flag  
1.5A, Error Flag  
1.5A, Error Flag  
1.5A, Error Flag  
1.5A, Error Flag  
1.5A, Error Flag  
1.5A, Error Flag  
1.5A, SENSE  
1.5A, SENSE  
1.5A, SENSE  
1.5A, SENSE  
1.5A, SENSE  
1.5A, SENSE  
1.5A, SENSE  
1.5A, SENSE  
1.5A, ADJ  
SOT223-5  
SOT223-5  
SOT223-5  
SOT223-5  
SOT223-5  
SOT223-5  
SOT223-5  
SOT223-5  
SOT223-5  
SOT223-5  
SOT223-5  
SOT223-5  
SOT223-5  
SOT223-5  
SOT223-5  
SOT223-5  
SOT223-5  
LBTB  
LBEB  
LBEB  
LBDB  
LBDB  
LBCB  
LBCB  
LBVB  
LBVB  
LBNB  
LBNB  
LBLB  
LBLB  
LBKB  
LBKB  
LBRB  
LBRB  
2000 units on Tape and  
Reel  
1000 units on Tape and  
Reel  
2000 units on Tape and  
Reel  
1000 units on Tape and  
Reel  
2000 units on Tape and  
Reel  
1000 units on Tape and  
Reel  
2000 units on Tape and  
Reel  
1000 units on Tape and  
Reel  
2000 units on Tape and  
Reel  
1000 units on Tape and  
Reel  
2000 units on Tape and  
Reel  
1000 units on Tape and  
Reel  
2000 units on Tape and  
Reel  
1000 units on Tape and  
Reel  
2000 units on Tape and  
Reel  
1000 units on Tape and  
Reel  
1.5A, ADJ  
2000 units on Tape and  
Reel  
5.0  
5.0  
3.3  
3.3  
2.5  
2.5  
1.8  
1.8  
5.0  
5.0  
3.3  
3.3  
2.5  
LP3962ES-5.0  
LP3962ESX-5.0  
LP3962ES-3.3  
LP3962ESX-3.3  
LP3962ES-2.5  
LP3962ESX-2.5  
LP3962ES-1.8  
LP3962ESX-1.8  
LP3965ES-5.0  
LP3965ESX-5.0  
LP3965ES-3.3  
LP3965ESX-3.3  
LP3965ES-2.5  
1.5A, Error Flag  
1.5A, Error Flag  
1.5A, Error Flag  
1.5A, Error Flag  
1.5A, Error Flag  
1.5A, Error Flag  
1.5A, Error Flag  
1.5A, Error Flag  
1.5A, SENSE  
TO263-5  
TO263-5  
TO263-5  
TO263-5  
TO263-5  
TO263-5  
TO263-5  
TO263-5  
TO263-5  
TO263-5  
TO263-5  
TO263-5  
TO263-5  
LP3962ES-5.0  
LP3962ESX-5.0  
LP3962ES-3.3  
LP3962ES-3.3  
LP3962ES-2.5  
LP3962ES-2.5  
LP3962ES-1.8  
LP3962ES-1.8  
LP3965ES-5.0  
LP3965ES-5.0  
LP3965ES-3.3  
LP3965ES-3.3  
LP3965ES-2.5  
Rail  
Tape and Reel  
Rail  
Tape and Reel  
Rail  
Tape and Reel  
Rail  
Tape and Reel  
Rail  
1.5A, SENSE  
Tape and Reel  
Rail  
1.5A, SENSE  
1.5A, SENSE  
Tape and Reel  
Rail  
1.5A, SENSE  
5
www.national.com  
Ordering Information (Continued)  
TABLE 1. Package Marking and Ordering Information (Continued)  
Output  
Voltage  
2.5  
Description  
Package  
Type  
Order Number  
LP3965ESX-2.5  
(Current, Option)  
Package Marking  
LP3965ES-2.5  
LP3965ES-1.8  
LP3965ES-1.8  
LP3965ES-ADJ  
LP3965ES-ADJ  
LP3962ET-5.0  
LP3962ET-3.3  
LP3962ET-2.5  
LP3962ET-1.8  
LP3965ET-5.0  
LP3965ET-3.3  
LP3965ET-2.5  
LP3965ET-1.8  
LP3965ET-ADJ  
Supplied As:  
Tape and Reel  
1.5A, SENSE  
TO263-5  
1.8  
LP3965ES-1.8  
LP3965ESX-1.8  
LP3965ES-ADJ  
LP3965ESX-ADJ  
LP3962ET-5.0  
LP3962ET-3.3  
LP3962ET-2.5  
LP3962ET-1.8  
LP3965ET-5.0  
LP3965ET-3.3  
LP3965ET-2.5  
LP3965ET-1.8  
LP3965ET-ADJ  
1.5A, SENSE  
1.5A, SENSE  
1.5A, ADJ  
TO263-5  
TO263-5  
TO263-5  
TO263-5  
TO220-5  
TO220-5  
TO220-5  
TO220-5  
TO220-5  
TO220-5  
TO220-5  
TO220-5  
TO220-5  
Rail  
1.8  
Tape and Reel  
ADJ  
ADJ  
5.0  
Rail  
1.5A, ADJ  
Tape and Reel  
Rail  
1.5A, Error Flag  
1.5A, Error Flag  
1.5A, Error Flag  
1.5A, Error Flag  
1.5A, SENSE  
1.5A, SENSE  
1.5A, SENSE  
1.5A, SENSE  
1.5A, ADJ  
3.3  
Rail  
2.5  
Rail  
1.8  
Rail  
5.0  
Rail  
3.3  
Rail  
2.5  
Rail  
1.8  
Rail  
ADJ  
Rail  
www.national.com  
6
Absolute Maximum Ratings (Note 1)  
If Military/Aerospace specified devices are required,  
please contact the National Semiconductor Sales Office/  
Distributors for availability and specifications.  
IOUT (Survival)  
Short Circuit Protected  
VIN+0.3V  
Maximum Voltage for ERROR  
Pin  
Maximum Voltage for SENSE Pin  
VOUT+0.3V  
Storage Temperature Range  
Lead Temperature  
−65˚C to +150˚C  
Operating Ratings  
Input Supply Voltage (Operating),  
(Note 12)  
(Soldering, 5 sec.)  
260˚C  
2 kV  
ESD Rating (Note 3)  
Power Dissipation (Note 2)  
Input Supply Voltage (Survival)  
Shutdown Input Voltage  
(Survival)  
2.5V to 7.0V  
Internally Limited  
−0.3V to +7.5V  
Shutdown Input Voltage  
(Operating)  
−0.3V to VIN+0.3V  
1.5A  
Maximum Operating Current (DC)  
Operating Junction Temp. Range  
−0.3V to VIN+0.3V  
−0.3V to +7.5V  
−40˚C to +125˚C  
Output Voltage (Survival), (Note  
6), (Note 7)  
Electrical Characteristics  
LP3962/LP3965  
Limits in standard typeface are for TJ = 25˚C, and limits in boldface type apply over the full operating temperature range.  
Unless otherwise specified: VIN = VO(NOM) + 1V, IL = 10 mA, COUT = 33µF, VSD = VIN-0.3V.  
Symbol  
Parameter  
Conditions  
Typ  
LP3962/5 (Note 5)  
Units  
(Note 4)  
Min  
Max  
VO  
Output Voltage  
10 mA IL 1.5A  
-1.5  
+1.5  
Tolerance  
VOUT +1 VIN7.0V  
0
%
-3.0  
+3.0  
(Note 8)  
VADJ  
V OL  
Adjust Pin Voltage (ADJ  
version)  
10 mA IL 1.5A  
1.198  
1.234  
1.216  
V
VOUT +1.5V VIN7.0V  
1.180  
1.253  
<
<
Output Voltage Line  
Regulation (Note 8)  
Output Voltage Load  
Regulation  
VOUT+1V VIN 7.0V,  
0.02  
0.06  
0.04  
0.09  
%
<
<
VO/ IOUT  
10 mA IL 1.5 A  
%
(Note 8)  
VIN - VOUT  
IL = 150 mA  
IL = 1.5 A  
38  
380  
4
45  
55  
450  
550  
9
Dropout Voltage  
(Note 10)  
mV  
IL = 150 mA  
IL = 1.5 A  
10  
14  
15  
25  
75  
Ground Pin Current In  
Normal Operation Mode  
IGND  
mA  
µA  
5
IGND  
Ground Pin Current In  
Shutdown Mode  
(Note 11)  
VSD 0.2V  
15  
IO(PK)  
Peak Output Current  
(Note 2)  
2.5  
4.5  
2.0  
A
A
1.7  
SHORT CIRCUIT PROTECTION  
ISC Short Circuit Current  
OVER TEMPERATURE PROTECTION  
Tsh(t)  
Shutdown Threshold  
Thermal Shutdown  
Hysteresis  
165  
10  
˚C  
˚C  
Tsh(h)  
SHUTDOWN INPUT  
Output = High  
Output = Low  
VIN  
0
VIN–0.3  
VSDT Shutdown Threshold  
V
0.2  
7
www.national.com  
Electrical Characteristics  
LP3962/LP3965 (Continued)  
Limits in standard typeface are for TJ = 25˚C, and limits in boldface type apply over the full operating temperature range.  
Unless otherwise specified: VIN = VO(NOM) + 1V, IL = 10 mA, COUT = 33µF, VSD = VIN-0.3V.  
Symbol  
Parameter  
Conditions  
Typ  
LP3962/5 (Note 5)  
Units  
(Note 4)  
Min  
Max  
TdOFF  
TdON  
ISD  
Turn-off delay  
IL = 1.5 A  
20  
25  
1
µs  
µs  
nA  
Turn-on delay  
IL = 1.5 A  
VSD = VIN  
SD Input Current  
ERROR FLAG COMPARATOR  
VT  
VTH  
VEF(Sat)  
Td  
Threshold  
(Note 9)  
10  
5
5
2
16  
8
%
%
Threshold Hysteresis  
Error Flag Saturation  
Flag Reset Delay  
Error Flag Pin Leakage  
Current  
(Note 9)  
Isink = 100µA  
0.02  
1
0.1  
V
µs  
nA  
Ilk  
1
Imax  
Error Flag Pin Sink  
Current  
VError = 0.5V (over temp.)  
1
mA  
dB  
AC PARAMETERS  
VIN = VOUT + 1.5V  
COUT = 100uF  
60  
40  
VOUT = 3.3V  
PSRR  
Ripple Rejection  
VIN = VOUT + 0.3V  
COUT = 100uF  
VOUT = 3.3V  
ρn(l/f  
Output Noise Density  
f = 120Hz  
0.8  
150  
100  
µV  
BW = 10Hz – 100kHz  
BW = 300Hz – 300kHz  
Output Noise Voltage  
(rms)  
en  
µV (rms)  
Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating ratings indicate conditions for which the device is  
intended to be functional, but does not guarantee specific performance limits. For guaranteed specifications and test conditions, see Electrical Charateristics. The  
guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed  
test conditions.  
Note 2: At elevated temperatures, devices must be derated based on package thermal resistance. The devices in TO220 package must be derated at θ = 50˚C/W  
jA  
2
(with 0.5in , 1oz. copper area), junction-to-ambient (with no heat sink). The devices in the TO263 surface-mount package must be derated at θ = 60˚C/W (with  
0.5in , 1oz. copper area), junction-to-ambient. The devices in SOT223 package must be derated at θ = 90˚C/W (with 0.5in , 1oz. copper area), junction-to-ambient.  
jA  
2
2
jA  
Note 3: The human body model is a 100pF capacitor discharged through a 1.5kresistor into each pin.  
Note 4: Typical numbers are at 25˚C and represent the most likely parametric norm.  
Note 5: Limits are 100% production tested at 25˚C. Limits over the operating temperature range are guaranteed through correlation using Statistical Quality Control  
(SQC) methods. The limits are used to calculate National’s Average Outgoing Quality Level (AOQL).  
Note 6: If used in a dual-supply system where the regulator load is returned to a negative supply, the LP396X output must be diode-clamped to ground.  
Note 7: The output PMOS structure contains a diode between the V and V  
terminals. This diode is normally reverse biased. This diode will get forward biased  
OUT  
IN  
if the voltage at the output terminal is forced to be higher than the voltage at the input terminal. This diode can typically withstand 200mA of DC current and 1Amp  
of peak current.  
Note 8: Output voltage line regulation is defined as the change in output voltage from the nominal value due to change in the input line voltage. Output voltage load  
regulation is defined as the change in output voltage from the nominal value due to change in load current. The line and load regulation specification contains only  
the typical number. However, the limits for line and load regulation are included in the output voltage tolerance specification.  
Note 9: Error Flag threshold and hysteresis are specified as percentage of regulated output voltage.  
Note 10: Dropout voltage is defined as the minimum input to output differential voltage at which the output drops 2% below the nominal value. Dropout voltage  
specification applies only to output voltages of 2.5V and above. For output voltages below 2.5V, the drop-out voltage is nothing but the input to output differential,  
since the minimum input voltage is 2.5V.  
Note 11: This specification has been tested for −40˚C T 85˚C since the temperature rise of the device is negligible under shutdown conditions.  
J
Note 12: The minimum operating value for V is equal to either [V  
+ V  
] or 2.5V, whichever is greater.  
IN  
OUT(NOM)  
DROPOUT  
www.national.com  
8
Typical Performance Characteristics Unless otherwise specified, VIN =VO(NOM) + 1V, VOUT= 2.5V,  
COUT = 33µF, IOUT = 10mA, CIN = 68µF, VSD = VIN, and TA = 25˚C.  
Drop-Out Voltage vs Temperature for Different Load  
Currents  
Drop-Out Voltage vs Temperature for Different Output  
Voltages (IOUT = 800mA  
10126609  
10126610  
Ground Pin Current vs Input Voltage (VSD=VIN  
)
Ground Pin Current vs Input Voltage (VSD=100mV)  
10126611  
10126615  
Ground Current vs Temperature (VSD=VIN  
)
Ground Current vs Temperature (VSD=0V  
10126618  
10126612  
9
www.national.com  
Typical Performance Characteristics Unless otherwise specified, VIN =VO(NOM) + 1V, VOUT= 2.5V,  
COUT = 33µF, IOUT = 10mA, CIN = 68µF, VSD = VIN, and TA = 25˚C. (Continued)  
Ground Pin Current vs Shutdown Pin Voltage  
Input Voltage vs Output Voltage  
10126616  
10126617  
Output Noise Density, VOUT= 2.5V  
Output Noise Density, VOUT= 5V  
10126613  
10126614  
Load Transient Response  
Ripple Rejection vs Frequency  
10126637  
10126638  
www.national.com  
10  
Typical Performance Characteristics Unless otherwise specified, VIN =VO(NOM) + 1V, VOUT= 2.5V,  
COUT = 33µF, IOUT = 10mA, CIN = 68µF, VSD = VIN, and TA = 25˚C. (Continued)  
δVOUT vs Temperature  
Noise Density VIN = 3.5V, VOUT = 2.5V, IL = 10 mA  
10126639  
10126640  
Line Transient Response  
Line Transient Response  
10126641  
10126642  
Line Transient Response (IOUT = 1.5A)  
Line Transient Response (IOUT = 1.5A)  
10126643  
10126644  
11  
www.national.com  
Applications Information  
EXTERNAL CAPACITORS  
very little capacitance variation with temperature, but a ce-  
ramic may not be as good (depending on dielectric type).  
Aluminum electrolytics also typically have large temperature  
variation of capacitance value.  
Like any low-dropout regulator, external capacitors are re-  
quired to assure stability. these capacitors must be correctly  
selected for proper performance.  
Equally important to consider is a capacitor’s ESR change  
with temperature: this is not an issue with ceramics, as their  
ESR is extremely low. However, it is very important in Tan-  
talum and aluminum electrolytic capacitors. Both show in-  
creasing ESR at colder temperatures, but the increase in  
aluminum electrolytic capacitors is so severe they may not  
be feasible for some applications (see Capacitor Character-  
istics Section).  
INPUT CAPACITOR: The LP3962/5 requires a low source  
impedance to maintain regulator stability because the inter-  
nal bias circuitry is connected directly to VIN. The input  
capacitor must be located less than 1 cm from the LP3962/5  
device and connected directly to the input and ground pins  
using traces which have no other currents flowing through  
them (see PCB Layout section).  
The minimum allowable input capacitance for a given appli-  
cation depends on the type of the capacitor and ESR  
(equivalent series resistance). A lower ESR capacitor allows  
the use of less capacitance, while higher ESR types (like  
aluminum electrolytics) require more capacitance.  
CAPACITOR CHARACTERISTICS  
CERAMIC: For values of capacitance in the 10 to 100 µF  
range, ceramics are usually larger and more costly than  
tantalums but give superior AC performance for bypassing  
high frequency noise because of very low ESR (typically less  
than 10 m). However, some dielectric types do not have  
good capacitance characteristics as a function of voltage  
and temperature.  
The lowest value of input capacitance that can be used for  
stable full-load operation is 68 µF (assuming it is a ceramic  
or low-ESR Tantalum with ESR less than 100 m).  
To determine the minimum input capacitance amount and  
ESR value, an approximation which should be used is:  
Z5U and Y5V dielectric ceramics have capacitance that  
drops severely with applied voltage. A typical Z5U or Y5V  
capacitor can lose 60% of its rated capacitance with half of  
the rated voltage applied to it. The Z5U and Y5V also exhibit  
a severe temperature effect, losing more than 50% of nomi-  
nal capacitance at high and low limits of the temperature  
range.  
CIN ESR (m) / CIN (µF) 1.5  
This shows that input capacitors with higher ESR values can  
be used if sufficient total capacitance is provided. Capacitor  
types (aluminum, ceramic, and tantalum) can be mixed in  
parallel, but the total equivalent input capacitance/ESR must  
be defined as above to assure stable operation.  
IMPORTANT: The input capacitor must maintain its ESR and  
capacitance in the ’stable range’ over the entire temperature  
range of the application to assure stability (see Capacitor  
Characteristics Section).  
X7R and X5R dielectric ceramic capacitors are strongly rec-  
ommended if ceramics are used, as they typically maintain a  
±
capacitance range within 20% of nominal over full operat-  
ing ratings of temperature and voltage. Of course, they are  
typically larger and more costly than Z5U/Y5U types for a  
given voltage and capacitance.  
OUTPUT CAPACITOR: An output capacitor is also required  
for loop stability. It must be located less than 1 cm from the  
LP3962/5 device and connected directly to the output and  
ground pins using traces which have no other currents flow-  
ing through them (see PCB Layout section).  
TANTALUM: Solid Tantalum capacitors are recommended  
for use on the output because their typical ESR is very close  
to the ideal value required for loop compensation. They also  
work well as input capacitors if selected to meet the ESR  
requirements previously listed.  
The minimum value of the output capacitance that can be  
used for stable full-load operation is 33 µF, but it may be  
increased without limit. The output capacitor’s ESR is critical  
because it forms a zero to provide phase lead which is  
required for loop stability. The ESR must fall within the  
specified range:  
Tantalums also have good temperature stability: a good  
quality Tantalum will typically show a capacitance value that  
varies less than 10-15% across the full temperature range of  
125˚C to −40˚C. ESR will vary only about 2X going from the  
high to low temperature limits.  
0.2Ω ≤ COUT ESR 5Ω  
The increasing ESR at lower temperatures can cause oscil-  
lations when marginal quality capacitors are used (if the ESR  
of the capacitor is near the upper limit of the stability range at  
room temperature).  
The lower limit of 200 mmeans that ceramic capacitors are  
not suitable for use as LP3962/5 output capacitors (but can  
be used on the input). Some ceramic capacitance can be  
used on the output if the total equivalent ESR is in the stable  
range: when using a 100 µF Tantalum as the output capaci-  
tor, approximately 3 µF of ceramic capacitance can be ap-  
plied before stability becomes marginal.  
ALUMINUM: This capacitor type offers the most capaci-  
tance for the money. The disadvantages are that they are  
larger in physical size, not widely available in surface mount,  
and have poor AC performance (especially at higher fre-  
quencies) due to higher ESR and ESL.  
IMPORTANT: The output capacitor must meet the require-  
ments for minimum amount of capacitance and also have an  
appropriate ESR value over the full temperature range of the  
application to assure stability (see Capacitor Characteristics  
Section).  
Compared by size, the ESR of an aluminum electrolytic is  
higher than either Tantalum or ceramic, and it also varies  
greatly with temperature. A typical aluminum electrolytic can  
exhibit an ESR increase of as much as 50X when going from  
25˚C down to −40˚C.  
SELECTING A CAPACITOR  
It is important to note that capacitance tolerance and varia-  
tion with temperature must be taken into consideration when  
selecting a capacitor so that the minimum required amount  
of capacitance is provided over the full operating tempera-  
ture range. In general, a good Tantalum capacitor will show  
It should also be noted that many aluminum electrolytics only  
specify impedance at a frequency of 120 Hz, which indicates  
they have poor high frequency performance. Only aluminum  
electrolytics that have an impedance specified at a higher  
frequency (between 20 kHz and 100 kHz) should be used for  
www.national.com  
12  
quencies, ground planes begin to look inductive and  
RFI/EMI can cause ground bounce across the ground plane.  
Applications Information (Continued)  
the LP396X. Derating must be applied to the manufacturer’s  
ESR specification, since it is typically only valid at room  
temperature.  
In multi-layer PCB applications, care should be taken in  
layout so that noisy power and ground planes do not radiate  
directly into adjacent layers which carry analog power and  
ground.  
Any applications using aluminum electrolytics should be  
thoroughly tested at the lowest ambient operating tempera-  
ture where ESR is maximum.  
Output Adjustment  
An adjustable output device has output voltage range of  
1.215V to 5.1V. To obtain a desired output voltage, the  
following equation can be used with R1 always a 10kΩ  
resistor.  
PCB LAYOUT  
Good PC layout practices must be used or instability can be  
induced because of ground loops and voltage drops. The  
input and output capacitors must be directly connected to the  
input, output, and ground pins of the LP3962/5 using traces  
which do not have other currents flowing in them Kelvin  
connect).  
The best way to do this is to lay out CIN and COUT near the  
device with short traces to the VIN, VOUT, and ground pins.  
The regulator ground pin should be connected to the exter-  
nal circuit ground so that the regulator and its capacitors  
have a ’single point ground’.  
For output stability, CF must be between 68pF and 100pF.  
Output Noise  
Noise is specified in two ways-  
It should be noted that stability problems have been seen in  
applications where ’vias’ to an internal ground plane were  
used at the ground points of the LP3962/5 IC and the input  
and output capacitors. This was caused by varying ground  
potentials at these nodes resulting from current flowing  
through the ground plane. Using a single point ground tech-  
nique for the regulator and it’s capacitors fixed the problem.  
Spot Noise or Output noise density is the RMS sum of all  
noise sources, measured at the regulator output, at a spe-  
cific frequency (measured with a 1Hz bandwidth). This type  
of noise is usually plotted on a curve as a function of fre-  
quency.  
Total output Noise or Broad-band noise is the RMS sum  
of spot noise over a specified bandwidth, usually several  
decades of frequencies.  
Since high current flows through the traces going into VIN  
and coming from VOUT, Kelvin connect the capacitor leads to  
these pins so there is no voltage drop in series with the input  
and output capacitors.  
Attention should be paid to the units of measurement. Spot  
noise is measured in units µV/ Hz or nV/ Hz and total output  
noise is measured in µV(rms).  
The primary source of noise in low-dropout regulators is the  
internal reference. In CMOS regulators, noise has a low  
frequency component and a high frequency component,  
which depend strongly on the silicon area and quiescent  
current. Noise can be reduced in two ways: by increasing the  
transistor area or by increasing the current drawn by the  
internal reference. Increasing the area will decrease the  
chance of fitting the die into a smaller package. Increasing  
the current drawn by the internal reference increases the  
total supply current (ground pin current). Using an optimized  
trade-off of ground pin current and die size, LP3962/LP3965  
achieves low noise performance and low quiescent current  
operation.  
RFI/EMI SUSCEPTIBILITY  
RFI (radio frequency interference) and EMI (electromagnetic  
interference) can degrade any integrated circuit’s perfor-  
mance because of the small dimensions of the geometries  
inside the device. In applications where circuit sources are  
present which generate signals with significant high fre-  
>
quency energy content ( 1 MHz), care must be taken to  
ensure that this does not affect the IC regulator.  
If RFI/EMI noise is present on the input side of the LP396X  
regulator (such as applications where the input source  
comes from the output of a switching regulator), good ce-  
ramic bypass capacitors must be used at the input pin of the  
LP396X.  
The total output noise specification for LP3962/LP3965 is  
presented in the Electrical Characteristics table. The Output  
noise density at different frequencies is represented by a  
curve under typical performance characteristics.  
If a load is connected to the LP396X output which switches  
at high speed (such as a clock), the high-frequency current  
pulses required by the load must be supplied by the capaci-  
tors on the LP396X output. Since the bandwidth of the  
regulator loop is less than 100 kHz, the control circuitry  
cannot respond to load changes above that frequency. The  
means the effective output impedance of the LP396X at  
frequencies above 100 kHz is determined only by the output  
capacitor(s).  
Short-Circuit Protection  
The LP3962and LP3965 is short circuit protected and in the  
event of a peak over-current condition, the short-circuit con-  
trol loop will rapidly drive the output PMOS pass element off.  
Once the power pass element shuts down, the control loop  
will rapidly cycle the output on and off until the average  
power dissipation causes the thermal shutdown circuit to  
respond to servo the on/off cycling to a lower frequency.  
Please refer to the section on thermal information for power  
dissipation calculations.  
In applications where the load is switching at high speed, the  
output of the LP396X may need RF isolation from the load. It  
is recommended that some inductance be placed between  
the LP396X output capacitor and the load, and good RF  
bypass capacitors be placed directly across the load.  
PCB layout is also critical in high noise environments, since  
RFI/EMI is easily radiated directly into PC traces. Noisy  
circuitry should be isolated from ’clean’ circuits where pos-  
sible, and grounded through a separate path. At MHz fre-  
Error Flag Operation  
The LP3962/LP3965 produces a logic low signal at the Error  
Flag pin when the output drops out of regulation due to low  
input voltage, current limiting, or thermal limiting. This flag  
13  
www.national.com  
a pull up resistor. Although the ERROR pin can sink current  
of 1mA, this current is energy drain from the input supply.  
Hence, the value of the pull up resistor should be in the  
range of 10kto 1M. The ERROR pin must be con-  
nected to ground if this function is not used. It should  
also be noted that when the shutdown pin is pulled low, the  
ERROR pin is forced to be invalid for reasons of saving  
power in shutdown mode.  
Applications Information (Continued)  
has a built in hysteresis. The timing diagram in Figure 1  
shows the relationship between the ERROR and the output  
voltage. In this example, the input voltage is changed to  
demonstrate the functionality of the Error Flag.  
The internal Error flag comparator has an open drain output  
stage. Hence, the ERROR pin should be pulled high through  
10126607  
FIGURE 1. Error Flag Operation  
Sense Pin  
tance. For example, in the case of a 3.3V output, if the trace  
resistance is 100m, the voltage at the remote load will be  
3.15V with 1.5 A of load current, ILOAD. The LP3965 regu-  
lates the voltage at the sense pin. Connecting the sense pin  
to the remote load will provide regulation at the remote load,  
as shown in Figure 2. If the sense option pin is not required,  
the sense pin must be connected to the VOUT pin.  
In applications where the regulator output is not very close to  
the load, LP3965 can provide better remote load regulation  
using the SENSE pin. Figure 2 depicts the advantage of the  
SENSE option. LP3962 regulates the voltage at the output  
pin. Hence, the voltage at the remote load will be the regu-  
lator output voltage minus the drop across the trace resis-  
www.national.com  
14  
Applications Information (Continued)  
10126608  
FIGURE 2. Improving remote load regulation using LP3965  
Shutdown Operation  
The maximum allowable temperature rise (TRmax) depends  
on the maximum ambient temperature (TAmax) of the appli-  
A CMOS Logic level signal at the shutdown ( SD) pin will  
turn-off the regulator. Pin SD must be actively terminated  
through a 10kpull-up resistor for a proper operation. If this  
pin is driven from a source that actively pulls high and low  
(such as a CMOS rail to rail comparator), the pull-up resistor  
is not required. This pin must be tied to Vin if not used.  
cation, and the maximum allowable junction temperature(TJ  
max):  
-
TRmax = TJmax− TAmax  
The maximum allowable value for junction to ambient Ther-  
mal Resistance, θJA, can be calculated using the formula:  
θJA = TRmax / PD  
Dropout Voltage  
LP3962 and LP3965 are available in TO-220, TO-263, and  
SOT-223 packages. The thermal resistance depends on  
amount of copper area or heat sink, and on air flow. If the  
maximum allowable value of θJA calculated above is 60  
˚C/W for TO-220 package, 60 ˚C/W for TO-263 package,  
and 140 ˚C/W for SOT-223 package, no heatsink is  
needed since the package can dissipate enough heat to  
satisfy these requirements. If the value for allowable θJA falls  
below these limits, a heat sink is required.  
The dropout voltage of a regulator is defined as the minimum  
input-to-output differential required to stay within 2% of the  
output voltage. The LP3962/LP3965 use an internal MOS-  
FET with an Rds(on) of 240m(typically). For CMOS LDOs,  
the dropout voltage is the product of the load current and the  
Rds(on) of the internal MOSFET.  
Reverse Current Path  
The internal MOSFET in LP3962and LP3965 has an inher-  
ent parasitic diode. During normal operation, the input volt-  
age is higher than the output voltage and the parasitic diode  
is reverse biased. However, if the output is pulled above the  
input in an application, then current flows from the output to  
the input as the parasitic diode gets forward biased. The  
output can be pulled above the input as long as the current  
in the parasitic diode is limited to 200mA continuous and 1A  
peak.  
Heatsinking TO-220 Packages  
The thermal resistance of a TO220 package can be reduced  
by attaching it to a heat sink or a copper plane on a PC  
board. If a copper plane is to be used, the values of θJA will  
be same as shown in next section for TO263 package.  
The heatsink to be used in the application should have a  
heatsink to ambient thermal resistance,  
θ
HA≤ θJA θCH θJC.  
Maximum Output Current Capability  
In this equation, θCH is the thermal resistance from the  
junction to the surface of the heat sink and θJC is the thermal  
resistance from the junction to the surface of the case. θJC is  
about 3˚C/W for a TO220 package. The value for θCH de-  
pends on method of attachment, insulator, etc. θCH varies  
between 1.5˚C/W to 2.5˚C/W. If the exact value is unknown,  
2˚C/W can be assumed.  
LP3962 and LP3965 can deliver a continuous current of 1.5  
A over the full operating temperature range. A heatsink may  
be required depending on the maximum power dissipation  
and maximum ambient temperature of the application. Under  
all possible conditions, the junction temperature must be  
within the range specified under operating conditions. The  
total power dissipation of the device is given by:  
PD = (VIN−VOUT)IOUT+ (VIN)IGND  
where IGND is the operating ground current of the device  
(specified under Electrical Characteristics).  
15  
www.national.com  
Applications Information (Continued)  
Heatsinking TO-263 and SOT-223 Packages  
The TO-263 and SOT223 packages use the copper plane on  
the PCB as a heatsink. The tab of these packages are  
soldered to the copper plane for heat sinking. Figure 3  
shows a curve for the θJA of TO-263 package for different  
copper area sizes, using a typical PCB with 1 ounce copper  
and no solder mask over the copper area for heat sinking.  
10126619  
FIGURE 5. θJA vs Copper(1 Ounce) Area for SOT-223  
package  
The following figures show different layout scenarios for  
SOT-223 package.  
10126632  
FIGURE 3. θJA vs Copper(1 Ounce) Area for TO-263  
package  
10126620  
As shown in the figure, increasing the copper area beyond 1  
square inch produces very little improvement. The minimum  
value for θJA for the TO-263 packag mounted to a PCB is  
32˚C/W.  
FIGURE 6. SCENARIO A, θJA = 148˚C/W  
Figure 4 shows the maximum allowable power dissipation  
for TO-263 packages for different ambient temperatures,  
assuming θJA is 35˚C/W and the maximum junction tempera-  
ture is 125˚C.  
10126621  
FIGURE 7. SCENARIO B, θJA = 125˚C/W  
10126633  
FIGURE 4. Maximum power dissipation vs ambient  
temperature for TO-263 package  
Figure 5 shows a curve for the θJA of SOT-223 package for  
different copper area sizes, using a typical PCB with 1 ounce  
copper and no solder mask over the copper area for heat  
sinking.  
www.national.com  
16  
Applications Information (Continued)  
10126622  
FIGURE 8. SCENARIO C, θJA = 92˚C/W  
10126624  
FIGURE 10. SCENARIO E, θJA = 77˚C/W  
10126623  
FIGURE 9. SCENARIO D, θJA = 83˚C/W  
10126625  
FIGURE 11. SCENARIO F, θJA = 75˚C/W  
17  
www.national.com  
Applications Information (Continued)  
10126626  
FIGURE 12. SCENARIO G, θJA = 113˚C/W  
10126627  
FIGURE 13. SCENARIO H, θJA = 79˚C/W  
www.national.com  
18  
Applications Information (Continued)  
10126628  
FIGURE 14. SCENARIO I, θJA = 78.5˚C/W  
19  
www.national.com  
Physical Dimensions inches (millimeters)  
unless otherwise noted  
TO220 5-lead, Molded, Stagger Bend Package (TO220-5)  
NS Package Number T05D  
For Order Numbers, refer to the “Ordering Information” section of this document.  
www.national.com  
20  
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)  
TO263 5-Lead, Molded, Surface Mount Package (TO263-5)  
NS Package Number TS5B  
For Order Numbers, refer to the “Ordering Information” section of this document.  
21  
www.national.com  
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)  
SOT223, 5-Lead, Molded, Surface Mount Package (SOT223-5)  
NS Package Number MA05C  
For Order Numbers, refer to the “Ordering Information” section of this document.  
LIFE SUPPORT POLICY  
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL  
COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:  
1. Life support devices or systems are devices or  
systems which, (a) are intended for surgical implant  
into the body, or (b) support or sustain life, and  
whose failure to perform when properly used in  
accordance with instructions for use provided in the  
labeling, can be reasonably expected to result in a  
significant injury to the user.  
2. A critical component is any component of a life  
support device or system whose failure to perform  
can be reasonably expected to cause the failure of  
the life support device or system, or to affect its  
safety or effectiveness.  
National Semiconductor  
Corporation  
Americas  
National Semiconductor  
Europe  
National Semiconductor  
Asia Pacific Customer  
Response Group  
Tel: 65-2544466  
Fax: 65-2504466  
National Semiconductor  
Japan Ltd.  
Tel: 81-3-5639-7560  
Fax: 81-3-5639-7507  
Fax: +49 (0) 180-530 85 86  
Email: support@nsc.com  
Email: europe.support@nsc.com  
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Français Tel: +33 (0) 1 41 91 8790  
Email: ap.support@nsc.com  
www.national.com  
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.  
配单直通车
LP3962ESX-3.3产品参数
型号:LP3962ESX-3.3
是否Rohs认证: 不符合
生命周期:Transferred
包装说明:TO-263, 5 PIN
Reach Compliance Code:not_compliant
ECCN代码:EAR99
HTS代码:8542.39.00.01
风险等级:3.67
可调性:FIXED
最大回动电压 1:0.55 V
标称回动电压 1:0.38 V
最大绝对输入电压:7.5 V
最大输入电压:7 V
最小输入电压:3.85 V
JESD-30 代码:R-PSSO-G5
JESD-609代码:e0
长度:10.16 mm
湿度敏感等级:3
功能数量:1
输出次数:1
端子数量:5
工作温度TJ-Max:125 °C
工作温度TJ-Min:-40 °C
最大输出电流 1:1.5 A
最大输出电压 1:3.399 V
最小输出电压 1:3.201 V
标称输出电压 1:3.3 V
封装主体材料:PLASTIC/EPOXY
封装代码:TO-263
封装等效代码:SMSIP5H,.6,67TB
封装形状:RECTANGULAR
封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL
峰值回流温度(摄氏度):235
认证状态:Not Qualified
调节器类型:FIXED POSITIVE SINGLE OUTPUT LDO REGULATOR
座面最大高度:4.8 mm
子类别:Other Regulators
表面贴装:YES
技术:BICMOS
端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING
端子节距:1.7 mm
端子位置:SINGLE
处于峰值回流温度下的最长时间:30
最大电压容差:3%
宽度:8.635 mm
Base Number Matches:1
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