LTC6655CHLS8-5全新原装原理图各脚功能电路原理芯片引脚定义-中国IC网-芯三七

LTC6655

0.25ppm Noise, Low Drift

Precision References

FeaTures

DescripTion

The LTC^®6655 is a complete family of precision bandgap

voltage references, offering exceptional noise and drift

performance. This low noise and drift is ideally suited for

thehighresolutionmeasurementsrequiredbyinstrumenta-

tion and test equipment. In addition, the LTC6655 is fully

speciﬁed over the temperature range of –40°C to 125°C,

ensuring its suitability for demanding automotive and

industrialapplications.Advancedcurvaturecompensation

allowsthisbandgapreferencetoachieveadriftoflessthan

2ppm/°C with a predictable temperature characteristic

and an output voltage accurate to 0.025ꢀ, reducing or

eliminating the need for calibration.

n

Low Noise: 0.25ppm (0.1Hz to 10Hz)

P-P

625nV for the LTC6655-2.5

P-P

n

Low Drift: 2ppm/°C Max

n

High Accuracy: 0.025ꢀ Max

No Humidity Sensitivity (LS8 Package)

n

Thermal Hysteresis (LS8): 30ppm (–40°C to 85°C)

n

Long-Term Drift (LS8): 20ppm/√kHr

n

100ꢀ Tested at –40°C, 25°C and 125°C

n

Load Regulation: <10ppm/mA

n

Sinks and Sources Current: 5mA

n

Low Dropout: 500mV

n

Maximum Supply Voltage: 13.2V

n

Low Power Shutdown: <20µA Max

The LTC6655 can be powered from as little as 500mV

above the output voltage to as much as 13.2V. Superior

loadregulationwithsourceandsinkcapability,coupledwith

exceptionallinerejection,ensuresconsistentperformance

over a wide range of operating conditions. A shutdown

mode is provided for low power applications.

n

Available Output Voltages: 1.25V, 2.048V, 2.5V, 3V,

3.3V, 4.096V, 5V

n

Available in an 8-Lead MSOP and High Stability

Hermetic 5mm × 5mm LS8 Packages

applicaTions

The LTC6655 references are offered in an 8-lead MSOP

package and an 8-lead LS8 package. The LS8 is a 5mm

× 5mm surface mount hermetic package that provides

outstanding stability.

n

Instrumentation and Test Equipment

n

High Resolution Data Acquisition Systems

Weigh Scales

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear

Precision Battery Monitors

Precision Regulators

Technology Corporation. All other trademarks are the property of their respective owners.

Medical Equipment

Typical applicaTion

Low Frequency 0.1Hz to 10Hz Noise (LTC6655-2.5)

Basic Connection

LTC6655-2.5

3V < V ≤ 13.2V

V

C

V

IN

OUT

IN

OUT_F

OUT_S

C

IN

500nV/DIV

SHDN

V

0.1µF

OUT

10µF

GND

6655 TA01a

6655 TA01b

1s/DIV

6655fc

1

For more information www.linear.com/LTC6655

LTC6655

absoluTe MaxiMuM raTings ^{(Note 1)}

Operating Temperature Range (Note 2).. –40°C to 125°C

Storage Temperature Range (Note 2)..... –65°C to 150°C

Lead Temperature Range (Soldering, 10 sec)

Input Voltage

V to GND.......................................... –0.3V to 13.2V

IN

SHDN to GND ........................... –0.3V to (V + 0.3V)

Output Voltage:

IN

(Note 3).................................................................300°C

V

OUT_F

V

....................................... –0.3V to (V + 0.3V)

IN

..................................................... –0.3V to 6V

OUT_S

Output Short-Circuit Duration...................... Indeﬁnite

pin conFiguraTion

TOP VIEW

GND*

TOP VIEW

8

SHDN

1

2

3

7

6

5

V

OUT_F

OUT_S

SHDN

1

2

3

4

8 GND*

V

7 V

6 V

IN

OUT_F

OUT_S

V

IN

GND*

GND

5 GND*

GND*

4

MS8 PACKAGE

8-LEAD PLASTIC MSOP

= 150°C, θ = 300°C/W

GND

LS8 PACKAGE

8-PIN LEADLESS CHIP CARRIER (5mm × 5mm)

T

JMAX

JA

*CONNECT PINS TO DEVICE GND (PIN 4)

T

JMAX

= 150°C, θ = 120°C/W

JA

*CONNECT PINS TO DEVICE GND (PIN 4)

6655fc

2

For more information www.linear.com/LTC6655

LTC6655

orDer inForMaTion

PART

MARKING*

LEAD FREE FINISH

TAPE AND REEL

PACKAGE DESCRIPTION

8-Lead Plastic MSOP

8-Lead Ceramic LCC (5mm × 5mm)

SPECIFIED TEMPERATURE RANGE

–40°C to 125°C

LTC6655BHMS8-1.25#PBF

LTC6655CHMS8-1.25#PBF

LTC6655BHMS8-2.048#PBF LTC6655BHMS8-2.048#TRPBF LTFDH

LTC6655CHMS8-2.048#PBF LTC6655CHMS8-2.048#TRPBF LTFDH

LTC6655BHMS8-2.5#PBF

LTC6655CHMS8-2.5#PBF

LTC6655BHMS8-3#PBF

LTC6655CHMS8-3#PBF

LTC6655BHMS8-3.3#PBF

LTC6655CHMS8-3.3#PBF

LTC6655BHMS8-1.25#TRPBF

LTC6655CHMS8-1.25#TRPBF

LTFDG

LTC6655BHMS8-2.5#TRPBF

LTC6655CHMS8-2.5#TRPBF

LTC6655BHMS8-3#TRPBF

LTC6655CHMS8-3#TRPBF

LTC6655BHMS8-3.3#TRPBF

LTC6655CHMS8-3.3#TRPBF

LTFCY

LTFDJ

LTFDK

LTC6655BHMS8-4.096#PBF LTC6655BHMS8-4.096#TRPBF LTFDM

LTC6655CHMS8-4.096#PBF LTC6655CHMS8-4.096#TRPBF LTFDM

LTC6655BHMS8-5#PBF

LTC6655CHMS8-5#PBF

LTC6655BHLS8-2.5 #PBF

LTC6655CHLS8-2.5 #PBF

LTC6655BHMS8-5#TRPBF

LTC6655CHMS8-5#TRPBF

N/A

LTFDN

665525

66555

†

LTC6655BHLS8-5 #PBF

†

LTC6655CHLS8-5 #PBF

Consult LTC Marketing for parts speciﬁed with wider operating temperature ranges.*The temperature grade is identiﬁed by a label on the shipping container.

†This product is only offered in trays. For more information refer to http//www.linear.com/packaging/

Consult LTC Marketing for information on non-standard lead based ﬁnish parts.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel speciﬁcations, go to: http://www.linear.com/tapeandreel/

6655fc

3

For more information www.linear.com/LTC6655

LTC6655

aVailable opTions

†

OUTPUT VOLTAGE

INITIAL ACCURACY

TEMPERATURE COEFFICIENT

PART NUMBER

1.250

0.025ꢀ

0.05ꢀ

2ppm/°C

5ppm/°C

LTC6655BHMS8-1.25

LTC6655CHMS8-1.25

2.048

2.500

0.025ꢀ

0.05ꢀ

2ppm/°C

5ppm/°C

LTC6655BHMS8-2.048

LTC6655CHMS8-2.048

0.025ꢀ

0.05ꢀ

2ppm/°C

5ppm/°C

LTC6655BHMS8-2.5

LTC6655CHMS8-2.5

0.025ꢀ

0.05ꢀ

2ppm/°C

5ppm/°C

LTC6655BHLS8-2.5

LTC6655CHLS8-2.5

3.000

3.300

4.096

5.000

0.025ꢀ

0.05ꢀ

2ppm/°C

5ppm/°C

LTC6655BHMS8-3.0

LTC6655CHMS8-3.0

0.025ꢀ

0.05ꢀ

2ppm/°C

5ppm/°C

LTC6655BHMS8-3.3

LTC6655CHMS8-3.3

0.025ꢀ

0.05ꢀ

2ppm/°C

5ppm/°C

LTC6655BHMS8-4.096

LTC6655CHMS8-4.096

0.025ꢀ

0.05ꢀ

2ppm/°C

5ppm/°C

LTC6655BHMS8-5

LTC6655CHMS8-5

0.025ꢀ

0.05ꢀ

2ppm/°C

5ppm/°C

LTC6655BHLS8-5

LTC6655CHLS8-5

†

See Order Information section for complete part number listing.

elecTrical characTerisTics ^Thel denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T_A= 25°C. V_IN= V_OUT+ 0.5V, V_{OUT_S}connected to V_{OUT_F}, unless otherwise noted.

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Output Voltage

LTC6655B

LTC6655C

–0.025

–0.05

0.025

0.05

ꢀ

l

Output Voltage Temperature Coefﬁcient

(Note 4)

LTC6655B

LTC6655C

1

2.5

2

5

ppm/°C

Line Regulation

V

+ 0.5V ≤ V ≤ 13.2V, SHDN = V

IN

5

3

25

40

ppm/V

OUT

IN

l

Load Regulation (Note 5)

I

= 5mA

LTC6655MS8

LTC6655LS8

LTC6655MS8

LTC6655LS8

ppm/mA

SOURCE

15

3

ppm/mA

I

= 5mA

10

20

ppm/mA

SINK

30

ppm/mA

45

Operating Voltage (Note 6)

LTC6655-1.25, LTC6655-2.048, LTC6655-2.5

= 5mA, V Error ≤ 0.1ꢀ

I

3

13.2

V

SOURCE

OUT

LTC6655-3, LTC6655-3.3, LTC6655-4.096, LTC6655-5

l

I

= 5mA, V

Error ≤ 0.1ꢀ

V

OUT

V

OUT

+ 0.5

+ 0.2

13.2

V

SOURCE

OUT

Error ≤ 0.1ꢀ

= 0mA, V

OUT

6655fc

4

For more information www.linear.com/LTC6655

LTC6655

elecTrical characTerisTics ^Thel denotes the speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T_A= 25°C. V_IN= V_OUT+ 0.5V, V_{OUT_S}connected to V_{OUT_F}, unless otherwise noted.

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Output Short-Circuit Current

Short V

to GND

20

mA

OUT

to V

IN

l

Shutdown Pin (SHDN)

Logic High Input Voltage

Logic High Input Current, SHDN = 2V

2.0

V

µA

12

l

Logic Low Input Voltage

Logic Low Input Current, SHDN = 0.8V

0.8

15

V

µA

Supply Current

No Load

5

7

mA

l

7.5

Shutdown Current

SHDN Tied to GND

20

µA

Output Voltage Noise (Note 7)

0.1Hz ≤ f ≤ 10Hz

10Hz ≤ f ≤ 1kHz

0.25

0.67

ppm

P-P

ppm

RMS

Turn-On Time

0.1ꢀ Settling, C

= 2.7µF

400

µs

OUT

Long-Term Drift of Output Voltage (Note 8) LTC6655MS8

LTC6655LS8

60

20

ppm/√kHr

Hysteresis (Note 9)

LTC6655MS8

∆T = 0°C to 70°C

∆T = –40°C to 85°C

∆T = –40°C to 125°C

20

30

60

ppm

LTC6655LS8

∆T = 0°C to 70°C

∆T = –40°C to 85°C

∆T = –40°C to 125°C

5

30

80

ppm

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: Precision may be affected if the parts are stored outside of the

speciﬁed temperature range. Large temperature changes may cause

changes in device performance due to thermal hysteresis. For best

performance, extreme temperatures should be avoided whenever possible.

noise measurements will yield larger and smaller peak values in a given

measurement interval. By repeating the measurement for 1000 intervals,

each 10 seconds long, it is shown that there are time intervals during

which the noise is higher than in a typical single interval, as predicted by

statistical theory. In general, typical values are considered to be those for

which at least 50ꢀ of the units may be expected to perform similarly or

better. For the 1000 interval test, a typical unit will exhibit noise that is

less than the typical value listed in the Electrical Characteristics table in

more than 50ꢀ of its measurement intervals. See Application Note 124 for

noise testing details. RMS noise is measured with a spectrum analyzer in a

shielded environment.

Note 3: The stated temperature is typical for soldering of the leads during

manual rework. For detailed IR reﬂow recommendations, refer to the

Applications Information section.

Note 8: Long-term stability typically has a logarithmic characteristic and

therefore, changes after 1000 hours tend to be much smaller than before

that time. Total drift in the second thousand hours is normally less than

one-third that of the ﬁrst thousand hours with a continuing trend toward

reduced drift with time. Long-term stability is also affected by differential

stresses between the IC and the board material created during board

assembly.

Note 9: Hysteresis in output voltage is created by mechanical stress

that differs depending on whether the IC was previously at a higher or

lower temperature. Output voltage is always measured at 25°C, but

the IC is cycled to the hot or cold temperature limit before successive

measurements. Hysteresis is roughly proportional to the square of the

temperature change. For instruments that are stored at well controlled

temperatures (within 20 or 30 degrees of operational temperature),

hysteresis is usually not a signiﬁcant error source. Typical hysteresis is the

worst case of 25°C to cold to 25°C or 25°C to hot to 25°C, preconditioned

by one thermal cycle.

Note 4: Temperature coefﬁcient is measured by dividing the maximum

change in output voltage by the speciﬁed temperature range.

Note 5: Load regulation is measured on a pulse basis from no load to

the speciﬁed load current. Load current does not include the 2mA sense

current. Output changes due to die temperature change must be taken into

account separately.

Note 6: Excludes load regulation errors. Minimum supply for the

LTC6655-1.25, LTC6655-2.048 and LTC6655-2.5 is set by internal circuitry

supply requirements, regardless of load condition. Minimum supply for

the LTC6655-3, LTC6655-3.3, LTC6655-4.096 and LTC6655-5 is speciﬁed

by load current.

Note 7: Peak-to-peak noise is measured with a 2-pole highpass ﬁlter at

0.1Hz and 3-pole lowpass ﬁlter at 10Hz. The unit is enclosed in a still-air

environment to eliminate thermocouple effects on the leads, and the

test time is 10 seconds. Due to the statistical nature of noise, repeating

6655fc

5

For more information www.linear.com/LTC6655

LTC6655

Typical perForMance characTerisTics

Characteristic curves are similar for most voltage options of the LTC6655. Curves from the LTC6655-1.25, LTC6655-2.5 and the

LTC6655-5 represent the range of performance across the entire family of references. Characteristic curves for other output voltages

fall between these curves and can be estimated based on their voltage output.

1.25V Low Frequency

0.1Hz to 10Hz Noise

1.25V Output Voltage

Temperature Drift

1.25V Load Regulation (Sourcing)

20

1.2504

1.2502

1.2500

1.2498

1.2496

3 TYPICAL UNITS

125°C

25°C

–40°C

10

0

200nV/

DIV

–10

–20

–30

–40

6655 G01

–50 –25

0

25

50

75 100 125

0.001

0.01

0.1

1

10

1s/DIV

OUTPUT CURRENT (mA)

TEMPERATURE (°C)

6655 G03

6655 G02

1.25V Output Voltage Noise

Spectrum

1.25V Sinking Current with a

3.3µF Output Capacitor

1.25V Load Regulation (Sinking)

200

160

120

80

40

35

30

25

20

15

10

5

125°C

25°C

–40°C

5mA

I

OUT

0mA

V

OUT

10mV/DIV

40

6655 G06

2.7µF

10µF

100µF

C

OUT

= 3.3µF

200µs/DIV

0

0.001

0.01

0.1

1

10

0.01

0.1

1

10

100

1000

OUTPUT CURRENT (mA)

FREQUENCY (kHz)

6655 G04

6655 G05

1.25V Sourcing Current with a

3.3µF Output Capacitor

1.25V Shutdown Supply Current

vs Input Voltage

1.25V V_OUTDistribution

60

50

14

12

T

= 25°C

A

125°C

25°C

–40°C

0mA

I

OUT

10

8

–5mA

40

30

V

6

OUT

10mV/DIV

20

10

0

4

6655 G07

C

OUT

= 3.3µF

200µs/DIV

2

0

1.2495

1.2498

1.2500

(V)

1.2503

1.2505

8

12

14

0

2

4

6

10

V

INPUT VOLTAGE (V)

OUT

6655 G09

6655 G08

6655fc

6

For more information www.linear.com/LTC6655

LTC6655

Typical perForMance characTerisTics

Characteristic curves are similar for most voltage options of the LTC6655. Curves from the LTC6655-1.25, LTC6655-2.5 and the

LTC6655-5 represent the range of performance across the entire family of references. Characteristic curves for other output voltages

fall between these curves and can be estimated based on their voltage output.

2.5V Low Frequency

0.1Hz to 10Hz Noise

2.5V Output Voltage

Temperature Drift

2.5V Load Regulation (Sourcing)

10

0

2.5010

2.5005

2.5000

2.4995

2.4990

3 TYPICAL UNITS

–10

–20

–30

–40

–50

500nV/

DIV

125°C

25°C

–40°C

6655 G10

–50

0

50

100

150

0.001

0.01

0.1

1

10

1s/DIV

OUTPUT CURRENT (mA)

TEMPERATURE (°C)

6655 G12

6655 G11

2.5V Supply Current

vs Input Voltage

2.5V Shutdown Supply Current

vs Input Voltage

2.5V Load Regulation (Sinking)

8

7

6

5

4

3

2

1

0

160

140

120

100

80

14

12

10

8

125°C

25°C

–40°C

60

6

40

4

20

125°C

25°C

125°C

2

0

25°C

–40°C

–20

0

2

4

6

8

10

12

14

0

2

4

6

8

10

12

14

0.001

0.01

0.1

1

10

OUTPUT CURRENT (mA)

INPUT VOLTAGE (V)

6655 G13

6655 G14

6655 G15

2.5V Minimum V_IN– V_OUT

Differential (Sourcing)

2.5V Minimum V_IN– V_OUT

Differential (Sinking)

2.5V Output Voltage Noise

Spectrum

10

1

120

100

80

60

40

20

0

10

1

C

= 2.7µF

OUT

C

= 10µF

OUT

C

= 100µF

OUT

0.1

125°C

25°C

–40°C

25°C

–40°C

0.01

–0.15

–0.05

0.05

0.15

0.01

0.1

1

0.01

0.1

1

10

100

1000

INPUT – OUTPUT VOLTAGE (V)

FREQUENCY (kHz)

6655 G17

6655 G16

6655 F01

6655fc

7

For more information www.linear.com/LTC6655

LTC6655

Typical perForMance characTerisTics

Characteristic curves are similar for most voltage options of the LTC6655. Curves from the LTC6655-1.25, LTC6655-2.5 and the

LTC6655-5 represent the range of performance across the entire family of references. Characteristic curves for other output voltages

fall between these curves and can be estimated based on their voltage output.

2.5V Temperature Drift

Distribution

2.5V SHDN Input Voltage

2.5V V_OUTDistribution

Thresholds vs V_IN

2.5

2.0

1.5

1.0

0.5

0.0

100

90

80

70

60

50

40

30

20

10

0

14

12

T

= 25°C

–40°C TO 125°C

A

10

V

TH_UP

8

6

4

2

V

TH_DN

0

2.4992

2.4996

2.5004

2.5008

0

0.4 0.8 1.2 1.6

2

2.4 2.8

2

4

6

8

(V)

10

12

14

2.5000

(V)

V

DRIFT (ppm/C)

IN

OUT

6655 G21

6655 G19

6655 G20

2.5V Output Impedance

vs Frequency

2.5V Power Supply Rejection

Ratio vs Frequency

2.5V Line Regulation

120

2.502

2.501

2.500

2.499

2.498

10

1

C

= 2.7µF

= 10µF

= 100µF

OUT

100

80

60

40

20

0

0.1

0.01

C

= 2.7µF

= 10µF

= 100µF

125°C

OUT

25°C

–40°C

0.001

0.01

0.1

1

10

100

0.001 0.01

0.1

1

10

100 1000

0

2

4

6

8

10

12

14

FREQUENCY (kHz)

INPUT VOLTAGE (V)

6655 G22

6655 G24

6655 G23

6655fc

8

For more information www.linear.com/LTC6655

LTC6655

Typical perForMance characTerisTics

Characteristic curves are similar for most voltage options of the LTC6655. Curves from the LTC6655-1.25, LTC6655-2.5 and the

LTC6655-5 represent the range of performance across the entire family of references. Characteristic curves for other output voltages

fall between these curves and can be estimated based on their voltage output.

5V Low Frequency

0.1Hz to 10Hz Noise

5V Output Voltage

Temperature Drift

5V Load Regulation (Sourcing)

10

0

5.0010

5.0005

5.0000

4.9995

4.9990

4.9985

3 TYPICAL UNITS

–10

–20

–30

–40

–50

500nV/

DIV

125°C

25°C

–40°C

6655 G25

–50 –25

0

25

50

75 100 125

0.01

0.1

1

10

1s/DIV

TEMPERATURE (°C)

OUTPUT CURRENT (mA)

6655 G26

6655 G27

5V Supply Current

vs Input Voltage

5V Output Voltage Noise

Spectrum

5V Load Regulation (Sinking)

200

180

160

140

100

80

60

40

20

0

6

5

4

3

125°C

25°C

–40°C

120

100

80

60

40

20

0

2

1

0

125°C

25°C

2.7µF

10µF

100µF

–40°C

–20

0.01

0.1

1

10

0

2

4

6

8

10

12

14

0.01

0.1

1

10

100

1000

OUTPUT CURRENT (mA)

INPUT VOLTAGE (V)

FREQUENCY (kHz)

6655 G30

6655 G28

6655 G29

5V Minimum V_IN-V_OUT

Differential (Sourcing)

5V Minimum V_IN-V_OUT

Differential (Sinking)

5V Start-Up Response with a

3.3µF Output Capacitor

10

1

10

1

V

IN

2V/DIV

V

OUT

2V/DIV

0.1

0.01

125°C

25°C

–40°C

125°C

25°C

–40°C

6655 G33

C

OUT

= 3.3µF

400µs/DIV

0.01

0.1

1

–0.3

–0.2

–0.1

0

0.1

INPUT-OUTPUT VOLTAGE (V)

6655 G31

6655 G32

6655fc

9

For more information www.linear.com/LTC6655

LTC6655

pin FuncTions

V

(Pin 6): V

Sense Pin. Connect this pin at the

SHDN (Pin 1): Shutdown Input. This active low input

powers down the device to <20µA. If left open, an inter-

nal pull-up resistor puts the part in normal operation. It

is recommended to tie this pin high externally for best

performance during normal operation.

OUT_S

OUT

load and route with a wide metal trace to minimize load

regulation errors. This pin sinks 2mA. Output error is

R

•2mA,regardlessofloadcurrent.Forloadcurrents

TRACE

<100µA, tie directly to V

pin.

OUT_F

V

(Pin 7): V

Force Pin. This pin sources and

OUT

V

(Pin 2): Power Supply. Bypass V with a 0.1µF, or

IN

OUT_F

IN

sinks current to the load. An output capacitor of 2.7µF to

larger, capacitor to GND.

100µF is required.

GND (Pin 4): Device Ground. This pin is the main ground

and must be connected to a noise-free ground plane.

GND (Pins 3, 5, 8): Internal Function. Ground these

pins.

blocK DiagraM

V

IN

2

+

V

OUT_F

SHDN

1

7

6

BANDGAP

–

V

OUT_S

GND

6655 BD

4

GND

3,5,8

6655fc

10

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Bypass and Load Capacitors

For very low noise applications where every nanovolt

counts, ﬁlm capacitors should be considered for their

low noise and lack of piezoelectric effects. Film capaci-

tors such as polyester, polystyrene, polycarbonate, and

polypropylenehave good temperature stability. Additional

caremustbetakenaspolystyreneandpolypropylenehave

an upper temperature limit of 85°C to 105°C. Above these

temperatures, the working voltages need to be derated

according to manufacturer’s speciﬁcations. Another type

of ﬁlm capacitor is polyphenylene sulﬁde (PPS). These

devices work over a wide temperature range, are stable,

and have large capacitance values beyond 1μF. In general,

ﬁlm capacitors are found in surface mount and leaded

packages. Table 1 is a partial list of capacitor companies

and some of their available products.

The LTC6655 voltage references require a 0.1µF or larger

input capacitor located close to the part to improve power

supply rejection. An output capacitorwith a valuebetween

2.7µF and 100µF is also required.

The output capacitor has a direct effect on the stability,

turn-on time and settling behavior. Choose a capacitor

with low ESR to insure stability. Resistance in series with

the output capacitor (ESR) introduces a zero in the output

buffer transfer function and could cause instability. The

2.7μF to 100μF range includes several types of capacitors

thatarereadilyavailableasthrough-holeandsurfacemount

components. It is recommended to keep ESR less than or

equal to 0.1Ω. Capacitance and ESR are both frequency

dependent. At higher frequencies capacitance drops and

ESR increases. To insure stable operation the output ca-

pacitor should have the required values at 100kHz.

In voltage reference applications, ﬁlm capacitor lifetime

is affected by temperature and applied voltage. When

polyester capacitors are operated beyond their rated

temperatures(somecapacitorsarenotratedforoperation

above 85°C) they need to be derated. Voltage derating is

usually accomplished as a ratio of applied voltage to rated

voltagelimit.Contactspeciﬁcﬁlmcapacitormanufacturers

to determine exact lifetime and derating information.

In order to achieve the best performance, caution should

be used when choosing a capacitor. X7R ceramic ca-

pacitors are small, come in appropriate values and are

relatively stable over a wide temperature range. However,

for a low noise application X7R capacitors may not be

suitable since they may exhibit a piezoelectric effect. The

mechanical vibrations cause a charge displacement in the

ceramic dielectric and the resulting perturbation can look

like noise. If X7R capacitors are necessary, a thorough

bench evaluation should be completed to verify proper

performance.

The lifetime of X7R capacitors is long, especially for

reference applications. Capacitor lifetime is degraded by

operating near or exceeding the rated voltage, at high

temperature,withACrippleorsomecombinationofthese.

Most reference applications have AC ripple only during

transient events.

Table 1. Film Capacitor Companies

COMPANY

Cornell Dublier

Dearborn Electronics

Tecate

DIELECTRIC

Polyester

AVAILABLE CAPACITANCE TEMPERATURE RANGE

TYPE

DME

0.5µF to 10µF

0.1µF to 12µF

0.01µF to 18µF

10µF to 22µF

–55°C to 125°C

–40°C to 105°C

–55°C to 100°C

–55°C to 125°C

–55°C to 100°C

–55°C to 125°C

–55°C to 140°C

Polyester

218P, 430P, 431P, 442P, and 410P

901, 914, and 914D

MKS 4, MKS 2-XL

MKT1820

Polyester

Wima

Polyester

Vishay

Polyester

1000pF to 15µF

0.01µF to 10µF

0.01µF to 15µF

0.01µF to 6.8µF

Vishay

Polycarbonate

Polyphenylene Sulﬁde (PPS)

MKC1862, 632P

Dearborn Electronics

Wima

820P, 832P, 842P, 860P, and 880P

SMD-PPS

6655fc

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120

100

80

60

40

20

0

The choice of output capacitor also affects the bandwidth

of the reference circuitry and resultant noise peaking. As

shown in Figure 1, the bandwidth is inversely proportional

to the value of the output capacitor.

C

= 2.7µF

OUT

C

= 10µF

OUT

C

= 100µF

OUT

Noise peaking is related to the phase margin of the output

buffer.Higherpeakinggenerallyindicateslowerphasemar-

gin.Otherfactorsaffectingnoisepeakingaretemperature,

input voltage, and output load current.

Start-Up and Load Transient Response

0.01

0.1

1

10

100

1000

FREQUENCY (kHz)

Results for the transient response plots (Figures 3 to 8)

were produced with the test circuit shown in Figure 2

unless otherwise indicated.

6655 F01

Figure 1. Output Voltage Noise Spectrum

The turn-on time is slew limited and determined by the

short-circuit current, the output capacitor, and output

voltage as shown in the equation:

V

100Ω

OUT

7

6

1,2

V

IN

LTC6655-2.5

3,4,5,8

V

0.5V

3V

GEN

C

OUT

C

IN

3.3µF

0.1µF

6655 F02

C_OUT

t_ON= V_OUT

•

I_SC

Figure 2. Transient Load Test Circuit

For example, the LTC6655-2.5V, with a 3.3µF output

capacitor and a typical short-circuit current of 20mA, the

start-up time would be approximately:

V

IN

2V/DIV

3.3•10^–6F

2.5V •

= 412µs

0.02A

V

OUT

1V/DIV

The resulting turn-on time is shown in Figure 3. Here

the output capacitor is 3.3µF and the input capacitor is

0.1µF.

6655 F03

200µs/DIV

C

= 3.3µF

OUT

Figure 4 shows the output response to a 500mV step on

IN

sinking is shown in Figures 5 and 6, respectively.

Figure 3. Start-Up Response

V . The output response to a current step sourcing and

Figure 7 shows the output response as the current goes

from sourcing to sinking.

3.5V

V

IN

3V

Shutdown Mode

The LTC6655 family of references can be shut down by

tying the SHDN pin to ground. There is an internal pull-up

resistor tied to this pin. If left unconnected this pin rises to

V

OUT

50mV/DIV

6655 F04

C

= 3.3µF

400µs/DIV

V and the part is enabled. Due to the low internal pull-up

OUT

IN

current, it is recommended that the SHDN pin be pulled

high externally for normal operation to prevent accidental

Figure 4. Output Response with a 500mV Step On V_IN

6655fc

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shutdown due to system noise or leakage currents. The

turn-on/turn-off response due to shutdown is shown in

Figure 8.

0mA

OUT

I

–5mA

Tocontrolshutdownfromalowvoltagesource,aMOSFET

can be used as a pull-down device as shown in Figure 9.

Note that an external resistor is unnecessary. A MOSFET

with a low drain-to-source leakage over the operating

temperaturerangeshouldbechosentoavoidinadvertently

pulling down the SHDN pin. A resistor may be added from

V

OUT

10mV/DIV

6655 F05

C

OUT

= 3.3µF

200µs/DIV

Figure 5. Output Response with a 5mA Load Step Sourcing

SHDN to V to overcome excessive MOSFET leakage.

IN

The SHDN thresholds have some dependency on V

IN

5mA

and temperature as shown in the Typical Performance

Characteristics section. Avoid leaving SHDN at a voltage

between the thresholds as this will cause an increase in

supply current due to shoot-through current.

I

OUT

0mA

V

OUT

10mV/DIV

3V ≤ V ≤ 13.2V

IN

C1

1µF

V

IN

6655 F06

V

OUT

OUT_F

C

= 3.3µF

200µs/DIV

OUT

LTC6655-2.5

GND

C2

Figure 6. Output Response with 5mA Load Step Sinking

SHDN

V

10µF

OUT_S

2N7002

TO µC

6655 F09

2mA

I

OUT

Figure 9. Open-Drain Shutdown Circuit

–2mA

Long-Term Drift

V

OUT

Long-term drift cannot be extrapolated from accelerated

high temperature testing. This erroneous technique gives

drift numbers that are wildly optimistic. The only way

long-term drift can be determined is to measure it over

the time interval of interest.

10mV/DIV

6655 F07

C

= 3.3µF

200µs/DIV

OUT

Figure 7. Output Response Showing a

Sinking to Sourcing Transition

TheLTC6655long-termdriftdatawascollectedon80parts

that were soldered into printed circuit boards similar to a

real world application. The boards were then placed into a

SHDN

2V/DIV

constant temperature oven with a T = 35°C, their outputs

A

were scanned regularly and measured with an 8.5 digit

DVM. Typical long-term drift is illustrated in Figure 10a.

The hermetic LS8 package provides additional stability as

shown in Figure 10b.

V

OUT

1V/DIV

6655 F08

1ms/DIV

C

= 3.3µF

OUT

Figure 8. Shutdown Response with 5mA Source Load

6655fc

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120

30

25

20

15

10

5

4 TYPICAL UNITS

LTC6655-2.5

80

40

0

–40

–80

0

500

1000

1500

2000

2500

–90 –70

–50 –30 –10 10 30

50 70 90

110

HOURS

DISTRIBUTION (ppm)

6655 F11

6655 F10

Figure 11. Hysteresis Plot –40°C to 125°C

Figure 10a. Long-Term Drift MS8

200

160

120

80

more stable in environments where humidity may be a

concern. However, PC board material may absorb water

and apply mechanical stress to the LTC6655LS8. Proper

board materials and layout are essential.

40

For best stability, the PC board layout is critical. Change

in temperature and position of the PC board, as well as

aging, can alter the mechanical stress applied to compo-

nentssolderedtotheboard.FR4andsimilarmaterialsalso

absorb water, causing the board to swell. Even conformal

coating or potting of the board does not always eliminate

this effect, though it may delay the symptoms by reducing

the rate of absorption.

0

–40

–80

–120

–160

–200

0

600

1200

1800

2400

3000

HOURS

6655 F10b

Figure 10b. LT6655-2.5V LS8

Figure 12a shows a tab cut through the PC board on three

sides of an LTC6655, which signiﬁcantly reduces stress

on the IC, as described in Application Note 82. For even

better performance, Figure 12b shows slots cut through

the PC board on all four sides. The slots should be as

long as possible, and the corners just large enough to

accommodate routing of traces. It has been shown that

for PC boards designed in this way, humidity sensitivity

can be reduced to less than 35ppm for a change in relative

humidity of approximately 60ꢀ. Mounting the reference

near the center of the board, with slots on four sides, can

further reduce the sensitivity to less than 10ppm.

Hysteresis

Thermal hysteresis is a measure of change of output

voltage as a result of temperature cycling. Figure 11

illustrates the typical hysteresis based on data taken from

theLTC6655-2.5.Aproprietarydesigntechniqueminimizes

thermal hysteresis.

Humidity Sensitivity

Plastic mould compounds absorb water. With changes in

relative humidity, plastic packaging materials change the

amount of pressure they apply to the die inside, which

can cause slight changes in the output of a voltage refer-

ence, usually on the order of 100ppm. The LS8 package is

hermetic, so it is not affected by humidity, and is therefore

An additionaladvantageofslotting the PC board is thatthe

LTC6655 is thermally isolated from surrounding circuitry.

This can help reduce thermocouple effects and improve

accuracy.

6655fc

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0.14

0.12

0.10

0.08

0.06

0.04

0.02

0

5mA LOAD

NO LOAD

LS8

6655 F12b

10

15

0

5

Figure 12a. LTC6655-2.5 Tab Cutout

V

(V)

IN

6655 F12

Figure 13. LTC6655-2.5 Power Consumption

125

115

NO LOAD

105

LS8

5mA LOAD

95

85

75

65

55

6655 F12a

Figure 12b. LTC6655-2.5 Side Cutout

3

6

9

15

0

12

V

(V)

IN

6655 F13

Power Dissipation

Figure 14. LTC6655-2.5 Maximum

Ambient Operating Temperature

Power dissipation for the LTC6655 depends on V and

IN

load current. Figure 13 illustrates the power consump-

tion versus V under a no-load and 5mA load condition

IN

the absolute maximum junction temperature rating of the

devicewouldbeexceeded.Althoughthemaximumjunction

temperature is 150°C, for best performance it is recom-

mended to not exceed a junction temperature of 125°C.

The plot in Figure 14 shows the recommended maximum

at room temperature for the LTC6655-2.5. Other voltage

options display similar behavior.

The MSOP8 package has a thermal resistance (θ )

JA

equal to 300°C/W. Under the maximum loaded condition,

the increase in die temperature is over 35°C. If operated

attheseconditionswithanambienttemperatureof125°C,

ambient temperature limits for differing V and load con-

IN

ditions using a maximum junction temperature of 125°C.

6655fc

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PC Board Layout

The V

pin sinks 2mA, which is unusual for a Kelvin

OUT_S

connection. However, this is required to achieve the ex-

The LTC6655 reference is a precision device that is fac-

tory trimmed to an initial accuracy of 0.025ꢀ, as shown

in the Typical Performance Characteristic section. The

mechanical stress caused by soldering parts to a printed

circuit board may cause the output voltage to shift and

the temperature coefﬁcient to change.

ceptional low noise performance. The I • R drop on the

V

line directly affects load regulation. The V

OUT_S

trace should be as short and wide as practical to minimize

series resistance The V trace adds error as R

OUT_S

TRACE

• 2mA, so a 0.1Ω trace adds 200µV error. The V

OUT_F

is not as important as the V

pin in this regard. An

OUT_S

To reduce the effects of stress-related shifts, mount the

reference near the short edge of a printed circuit board

or in a corner. In addition, slots can be cut into the board

on two sides of the device to reduce mechanical stress.

A thicker and smaller board is stiffer and less prone to

bend. Finally, use stress relief, such as ﬂexible standoffs,

when mounting the board.

I•RdropontheV

pinincreasestheminimumsupply

OUT_F

voltagewhensourcingcurrent, butdoesnotdirectlyaffect

load regulation. For light loading of the output (maximum

output current <100µA), V

should be tied to V

OUT_S

OUT_F

by the shortest possible path to reduce errors caused by

resistance in the sense trace.

Careful attention to grounding is also important, espe-

cially when sourcing current. The return load current can

produce an I • R drop causing poor load regulation. Use

a “star” ground connection and minimize the ground to

load metal resistance. Although there are several pins that

are required to be connected to ground, Pin 4 is the actual

ground for return current.

Additional precautions include making sure the solder

joints are clean and the board is ﬂux free to avoid leakage

paths. A sample PCB layout is shown in Figure 15.

V

IN

Optimal Noise Performance

TheLTC6655offersextraordinarilylownoiseforabandgap

reference—only 0.25ppm in 0.1Hz to 10Hz. As a result,

system noise performance may be dominated by system

design and physical layout.

GND

V

OUT

6655 F14

Figure 15. Sample PCB Layout

Some care is required to achieve the best possible noise

performance. The use of dissimilar metals in component

leads and PC board traces creates thermocouples. Varia-

tions in thermal resistance, caused by uneven air ﬂow,

create differential lead temperatures, thereby causing

thermoelectric voltage noise at the output of the refer-

ence. Minimizing the number of thermocouples, as well

as limiting airﬂow, can substantially reduce these errors.

Additional information can be found in Linear Technology

ApplicationNote82.Positiontheinputandloadcapacitors

close to the part. Although the LTC6655 has a DC PSRR

of over 100dB, the power supply should be as stable as

possible to guarantee optimal performance. A plot of the

0.1Hz to 10Hz low frequency noise is shown in the Typical

Load Regulation

To take advantage of the V

Kelvin force/sense pins,

OUT

the V

OUT_F

pin should be connected separately from the

OUT_S

V

pin as shown in Figure 16.

7

2

2mA

6

LTC6655-2.5

LOAD

STAR

+

4

6655 F15

MINIMIZE RESISTANCE

OF METAL

Figure 16. Kelvin Connection for Good Load Regulation

6655fc

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Performance Characteristic section. Noise performance

can be further improved by wiring several LTC6655s in

parallel as shown in the Typical Applications section. With

this technique the noise is reduced by √N, where N is the

number of LTC6655s in parallel.

the LTC6655-2.5 measures less than 0.25ppm

least 50ꢀ of the 10 second observations.

in at

P-P

As mentioned above, the statistical distribution of noise

is such that if observed for long periods of time, the

peak error in output voltage due to noise may be much

larger than that observed in a smaller interval. The likely

maximum error due to noise is often estimated using the

RMSvalue,multipliedbyanestimatedcrestfactor,assumed

tobeintherangeof6to8.4. Thismaximumpossiblevalue

will only be observed if the output voltage is measured

for very long periods of time. Therefore, in addition to the

commonmethod,amorethoroughapproachtomeasuring

noisehasbeenusedfortheLTC6655(describedindetailin

Linear Technology’s AN124) that allows more information

to be obtained from the result. In particular, this method

characterizes the noise over a signiﬁcantly greater length

of time, resulting in a more complete description of low

frequency noise. The peak-to-peak voltage is measured

for 10 second intervals over hundreds of intervals. In ad-

dition, anelectronicpeak-detectcircuitstoresanobjective

valueforeachinterval. Theresultsarethensummarizedin

terms of the fraction of measurement intervals for which

observed noise is below a speciﬁed level. For example,

Noise Speciﬁcation

Noise in any frequency band is a random function based

on physical properties such as thermal noise, shot noise,

andﬂickernoise.Themostprecisewaytospecifyarandom

error such as noise is in terms of its statistics, for example

asanRMSvalue.Thisallowsforrelativelysimplemaximum

error estimation, generally involving assumptions about

noise bandwidth and crest factor. Unlike wideband noise,

low frequency noise, typically speciﬁed in a 0.1Hz to 10Hz

band, has traditionally been speciﬁed in terms of expected

error, illustrated as peak-to-peak error. Low frequency

noise is generally measured with an oscilloscope over a

10secondtimeframe. Thisisapragmaticapproach, given

that it can be difﬁcult to measure noise accurately at low

frequencies, and that it can also be difﬁcult to agree on the

statistical characteristics of the noise, since ﬂicker noise

dominates the spectral density. While practical, a random

sampling of 10 second intervals is an inadequate method

for representation of low frequency noise, especially for

systems where this noise is a dominant limit of system

performance.Giventherandomnatureofnoise,theoutput

voltage may be observed over many time intervals, each

giving different results. Noise speciﬁcations that were

determined using this method are prone to subjectivity,

and will tend toward a mean statistical value, rather than

the maximum noise that is likely to be produced by the

device in question.

the LTC6655-2.5 measures less than 0.27ppm in 80ꢀ

P-P

of the measurement intervals, and less than 0.295ppm

P-P

in 95ꢀ of observation intervals. This statistical variation

in noise is illustrated in Table 2 and Figure 18. The test

circuit is shown in Figure 17.

Table 2

Low Frequency Noise (ppm

)

P-P

50ꢀ

60ꢀ

70ꢀ

80ꢀ

90ꢀ

0.246

0.252

0.260

0.268

0.292

Because the majority of voltage reference data sheets

express low frequency noise as a typical number, and as

it tends to be illustrated with a repeatable plot near the

meanofadistributionofpeak-to-peakvalues,theLTC6655

datasheetprovidesasimilarlydeﬁnedtypicalspeciﬁcation

in order to allow a reasonable direct comparison against

This method of testing low frequency noise is superior to

morecommonmethods.Theresultsyieldacomprehensive

statistical description, rather than a single observation. In

addition, the direct measurement of output voltage over

time gives an actual representation of peak noise, rather

than an estimate based on statistical assumptions such

as crest factor. Additional information can be derived from

a measurement of low frequency noise spectral density,

-

similar products. Data produced with this method gener

ally suggests that in a series of 10 second output voltage

measurements,atleasthalftheobservationsshouldhavea

peak-to-peakvaluethatisbelowthisnumber.Forexample,

as shown in Figure 19.

6655fc

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+

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of expansion and contraction. After a part undergoes the

extreme heat of a lead-free IR reﬂow proﬁle, like the one

shown in Figure 20, the output voltage shifts. After the

device expands, due to the heat, and then contracts, the

stresses on the die have changed position. This shift is

similar, but more extreme than thermal hysteresis.

35

30

25

20

15

10

5

Experimental results of IR reﬂow shift are shown below

in Figure 21. These results show only shift due to reﬂow

and not mechanical stress.

0

450

750

850

950

550

650

300

PEAK-TO-PEAK NOISE (nV)

380s

T

= 260°C

P

6655 F17

RAMP

DOWN

T

= 217°C

L

225

150

75

Figure 18. Low Frequency Noise Histogram of the LTC6655-2.5

T

= 200°C

S(MAX)

t

P

T

= 190°C

S

30s

200

160

120

80

T = 150°C

t

L

RAMP TO

150°C

130s

40s

120s

4

0

2

6

8

10

MINUTES

6655 F19

40

Figure 20. Lead-Free Reﬂow Proﬁle

0

0.1

1

10

100

FREQUENCY (Hz)

8

7

6

5

4

3

2

1

0

6655 F18

Figure 19. LTC6655-2.5 Low Frequency Noise Spectrum

It should be noted from Figure 19 that the LTC6655 has

not only a low wideband noise, but an exceptionally low

ﬂicker noise corner of 1Hz! This substantially reduces

low frequency noise, as well as long-term variation in

peak noise.

IR Reﬂow Shift

–0.029 –0.023 –0.017 –0.011 –0.005

OUTPUT VOLTAGE SHIFT DUE TO IR REFLOW (%)

6655 F20

The mechanical stress of soldering a part to a board can

cause the output voltage to shift. Moreover, the heat of

an IR reﬂow or convection soldering oven can also cause

the output voltage to shift. The materials that make up a

semiconductor device and its package have different rates

Figure 21. Output Voltage Shift Due to IR Reﬂow

6655fc

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LTC6655

Typical applicaTions

Extended Supply Range Reference

4V TO 30V

6V TO 80V

R1

R2

100k 4.7k

ON SEMI

R1

LTC6655-2.5

MMBT5551

C1

0.1µF

V

IN

V

OUT_F

OUT_S

OUT

BZX84C12

C1

0.1µF

SHDN

V

C2

10µF

BZX84C12

0.1µF

GND

6655 TA02

V

SHDN

IN

V

OUT

OUT_F

LTC6655-2.5

C2

V

OUT_S

10µF

GND

6655 TA03

Boosted Output Current

4V TO 13.2V

V

OUT

+ 1.8V TO 13.2V

C4

1µF

C1

R1

1µF

220Ω

R2

1k

LTC6655-2.5

Q1

SHDN

V

OUT_F

2N2222

2N2905

35mA MAX

C3

0.1µF

V

OUT

V

IN

OUT_S

V

SHDN

IN

GND

C1

0.1µF

C2

4.7µF

V

OUT

OUT_F

LTC6655-2.5

V

6655 TA05

C2

I

SET BY NPN

OUT_S

MAX

10µF

GND

6655 TA04

6655fc

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LTC6655

Typical applicaTions

Output Voltage Boost

V

IN

OUT

V

IN

OUT_F

V

+ 0.5V TO 13.2V

2.5V TO 4.5V

OUT

C2

10µF

C1

1µF

R

LTC6655-2.5

SHDN

V

OUT_S

R = 0k to 1k

6655 TA07

GND

V

= VOLTAGE OPTION + 0.002 • R

FOR R USE A POTENTIOMETER THAT

CAN HANDLE 2mA, IS LOW NOISE AND

HAS A LOW TEMPERATURE COEFFICIENT

OUT

THIS EXAMPLE USES 2.5V AS THE

VOLTAGE OPTION

Low Noise Precision Voltage Boost Circuit

V

IN

OUT

V

IN

OUT_F

V

OUT

+ 0.5V TO 13.2V

5V

V

IN

C2

10µF

C1

1µF

LTC6655-2.5

SHDN

R1

LT1677

+

–

+

–

10k

V

OUT_S

R

LOAD

GND

R2

10k

6655 TA08

R3

5k

V

= VOLTAGE OPTION • (1 + R1/R2)

OUT

FOR R1 AND R2 USE VISHAY TRIMMED

RESISTOR ARRAY (VSR144 OR MPM).

WITH A PRECISION ARRAY THE

THIS EXAMPLE USES 2.5V AS THE

VOLTAGE OPTION

MATCHING AND LOW TC WILL HELP

PRESERVE LOW DRIFT. R3 = R1||R2

6655fc

21

For more information www.linear.com/LTC6655

LTC6655

Typical applicaTions

Low Noise Statistical Averaging Reference

e′_N= e_N/√N; Where N is the Number of LTC6655s in Parallel

LTC6655-2.5

3V TO

13.2V

SHDN

V

OUT_F

R1

32.4Ω

V

OUT

V

IN

V

OUT_S

GND

C1

0.1µF

C2

2.7µF

C9

4.7µF

LTC6655-2.5

SHDN

V

OUT_F

R2

32.4Ω

V

IN

V

OUT_S

GND

C3

0.1µF

C4

2.7µF

LTC6655-2.5

SHDN

V

OUT_F

R3

32.4Ω

V

IN

V

OUT_S

GND

C5

0.1µF

C6

2.7µF

LTC6655-2.5

SHDN

V

OUT_F

R4

32.4Ω

V

IN

V

OUT_S

6655 TA06a

GND

C7

0.1µF

C8

2.7µF

Low Frequency Noise (0.1Hz to 10Hz)

with Four LTC6655-2.5 in Parallel

200nV/

DIV

6655 TA06b

1s/DIV

320nV

P-P

0.1Hz to 10Hz

6655fc

22

For more information www.linear.com/LTC6655

LTC6655

pacKage DescripTion

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

MS8 Package

8-Lead Plastic MSOP

(Reference LTC DWG # 05-08-ꢀꢂꢂ0 Rev F)

0.889 0.ꢀꢁ7

(.035 .005)

5.ꢁ3

3.ꢁ0 – 3.45

(.ꢁ0ꢂ)

(.ꢀꢁꢂ – .ꢀ3ꢂ)

MIN

3.00 0.ꢀ0ꢁ

(.ꢀꢀ8 .004)

(NOTE 3)

0.5ꢁ

(.0ꢁ05)

REF

0.ꢂ5

(.0ꢁ5ꢂ)

BSC

0.4ꢁ 0.038

(.0ꢀꢂ5 .00ꢀ5)

TYP

8

7 ꢂ 5

RECOMMENDED SOLDER PAD LAYOUT

3.00 0.ꢀ0ꢁ

(.ꢀꢀ8 .004)

(NOTE 4)

4.90 0.ꢀ5ꢁ

(.ꢀ93 .00ꢂ)

DETAIL “A”

0.ꢁ54

(.0ꢀ0)

0° – ꢂ° TYP

GAUGE PLANE

ꢀ

ꢁ

3

4

0.53 0.ꢀ5ꢁ

(.0ꢁꢀ .00ꢂ)

ꢀ.ꢀ0

(.043)

MAX

0.8ꢂ

(.034)

REF

DETAIL “A”

0.ꢀ8

(.007)

SEATING

PLANE

0.ꢁꢁ – 0.38

0.ꢀ0ꢀꢂ 0.0508

(.009 – .0ꢀ5)

(.004 .00ꢁ)

0.ꢂ5

(.0ꢁ5ꢂ)

BSC

TYP

MSOP (MS8) 0307 REV F

NOTE:

ꢀ. DIMENSIONS IN MILLIMETER/(INCH)

ꢁ. DRAWING NOT TO SCALE

3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.

MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.ꢀ5ꢁmm (.00ꢂ") PER SIDE

4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.

INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.ꢀ5ꢁmm (.00ꢂ") PER SIDE

5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.ꢀ0ꢁmm (.004") MAX

6655fc

23

For more information www.linear.com/LTC6655

LTC6655

pacKage DescripTion

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

LS8 Package

8-Pin Leadless Chip Carrier (5mm × 5mm)

(Reference LTC DWG # 05-08-1852 Rev Ø)

8

2.50 0.15

PACKAGE OUTLINE

7

1

2

3

6

5

2.54 0.15

1.50 0.15

4

0.70 0.05

5.00 SQ 0.15

5.80 SQ 0.15

APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED

5.00 SQ 0.15

4.20 SQ 0.10

8

1.45 0.10

0.95 0.10

R0.20 REF

8

2.00 REF

PIN 1

1

2

1

2

7

6

7

6

TOP MARK

(SEE NOTE 5)

2.54 0.15

4.20 0.10

5

3

5

R0.20 REF

1.00 TYP

LS8 0609 REV Ø

4

0.70 TYP

0.10 TYP

0.64 TYP

NOTE:

1. ALL DIMENSIONS ARE IN MILLIMETERS

2. DRAWING NOT TO SCALE

3. DIMENSIONS PACKAGE DO NOT INCLUDE PLATING BURRS

PLATING BURRS, IF PRESENT, SHALL NOT EXCEED 0.30mm ON ANY SIDE

4. PLATING—ELECTO NICKEL MIN 1.25UM, ELECTRO GOLD MIN 0.30UM

5. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE

TOP AND BOTTOM OF PACKAGE

6655fc

24

For more information www.linear.com/LTC6655

LTC6655

reVision hisTory

REV

DATE

DESCRIPTION

PAGE NUMBER

A

02/10 Voltage Options Added (1.250, 2.048, 3.000, 3.300, 4.096, 5.000), Reﬂected Throughout the Data Sheet

1 to 22

B

12/12 Addition of 5mm x 5mm hermetic LS8 package

Update to Electrical Characteristics to include LS8 package

Addition of long-term drift and hysteresis plots for LS8 package

Addition of Humidity Sensitivity information

1, 2, 3, 12, 22

3, 4

13

Addition of Related Parts

22

C

06/13

T

JMAX

changed from 125°C to 150°C

2

Addition of 5V Option in the LS8 package

Addition of PC board layout guidance

3, 4

14, 15

6655fc

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

25

For more information www.linear.com/LTC6655

LTC6655

Typical applicaTion

Low Noise Precision 24-Bit Analog-to-Digital Converter Application

2.5k

5V

V

REF

7.5V

R

REF

1nF

400Ω

CH0

CH1

CH2

CH3

5k

MUXOUTN

ADCINN

–

+

50Ω

1/2

LTC6241

R

TD

CH4

CH5

–2.5V

CH6

CH7

CH8

MUXOUTP

ADCINP

2.5k

CH9

0.01µF

THERMOCOUPLE

CH10

CH11

CH12

CH13

CH14

CH15

COM

LTC2449

1nF

–

+

50Ω

1/2

LTC6241

SDI

SCK

SDO

CS

SPI INTERFACE

BUSY

EXT

LTC6655

V

2

1

7

6

REF

+

V

REF

IN

OUT_F

–

REF

f

0.1µF

O

SHDN

GND

3,5,8

V

OUT_S

GND

4

10µF

6655 TA09

relaTeD parTs

PART NUMBER DESCRIPTION

COMMENTS

0.05% Max, 5ppm/°C Max, 1ppm (Peak-to-Peak) Noise

LT^®1236

Precision Low Drift Low Noise Reference

LT1236LS8

Precision Low Noise, Low Proﬁle Hermetic Voltage Reference

0.05% Max, 5ppm/°C Max, 0.3µV Noise, 5mm × 5mm Hermetic

P-P

Package

LT1460

Micropower Series References

0.075% Max, 10ppm/°C Max, 20mA Output Current

0.04% Max, 3ppm/°C Max, 50mA Output Current

0.05% Max, 10ppm/°C Max, 60mA Supply, SOT23 Package

0.5% Max, 5.6µA Supply, SOT23 Package

LT1461

Micropower Series Low Dropout

LT1790

Micropower Precision Series References

Micropower Reference with Buffer Ampliﬁer

Precision Low Drift Low Noise Reference

Tiny Micropower Series Reference

LT6650

LTC6652

LT6660

0.05% Max, 5ppm/°C Max, –40°C to 125°C, MSOP8

0.2% Max, 20ppm/°C Max, 20mA Output Current, 2mm × 2mm DFN

LTC6652LS8

High Precision, Buffered Voltage Reference Family in

5mm × 5mm Hermetic QFN Package

0.05% Max Initial Error, 5ppm/°C Max Drift, Shutdown Current <2µA,

–40°C to 125°C Operation

LT6654LS8

Precision, Low Noise, High Output Drive Voltage Reference

Family in 5mm × 5mm Hermetic QFN Package

1.6ppm Peak-to-Peak Noise (0.1Hz to 10Hz, Sink/Source 10mA,

5ppm/°C Max Drift, –40°C to 125°C Operation

6655fc

LT 0613 REV C • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

26

For more information www.linear.com/LTC6655

●

 LINEAR TECHNOLOGY CORPORATION 2009

(408)432-1900 FAX: (408) 434-0507 www.linear.com/LTC6655

型号:	LTC6655CHLS8-5#PBF
Brand Name：	Linear Technology
是否Rohs认证：	符合
生命周期：	Transferred
IHS 制造商：	LINEAR TECHNOLOGY CORP
零件包装代码：	LCC
包装说明：	LCC-8
针数：	8
制造商包装代码：	LS8
Reach Compliance Code：	compliant
ECCN代码：	EAR99
HTS代码：	8542.39.00.01
风险等级：	3.8
Is Samacsys：	N
模拟集成电路 - 其他类型：	THREE TERMINAL VOLTAGE REFERENCE
JESD-30 代码：	S-CQCC-N8
长度：	5 mm
功能数量：	1
输出次数：	1
端子数量：	8
最高工作温度：	125 °C
最低工作温度：	-40 °C
最大输出电压：	5.0025 V
最小输出电压：	4.9975 V
标称输出电压：	5 V
封装主体材料：	CERAMIC, METAL-SEALED COFIRED
封装代码：	HQCCN
封装等效代码：	LCC8,.2SQ
封装形状：	SQUARE
封装形式：	CHIP CARRIER, HEAT SINK/SLUG
峰值回流温度（摄氏度）：	NOT SPECIFIED
认证状态：	Not Qualified
座面最大高度：	1.55 mm
子类别：	Voltage References
最大供电电压 (Vsup)：	13.2 V
最小供电电压 (Vsup)：	5.2 V
表面贴装：	YES
技术：	CMOS
最大电压温度系数：	5 ppm/ °C
温度等级：	AUTOMOTIVE
端子形式：	NO LEAD
端子节距：	1.27 mm
端子位置：	QUAD
处于峰值回流温度下的最长时间：	NOT SPECIFIED
微调/可调输出：	NO
最大电压容差：	0.05%
宽度：	5 mm
Base Number Matches：	1

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