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  • 北京元坤伟业科技有限公司

         该会员已使用本站17年以上

  • OPA695IDBVR
  • 数量-
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  • QQ:857273081QQ:857273081 复制
    QQ:1594462451QQ:1594462451 复制
  • 010-62104931、62106431、62104891、62104791 QQ:857273081QQ:1594462451
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  • OPA695IDBVR图
  • 集好芯城

     该会员已使用本站13年以上
  • OPA695IDBVR 现货库存
  • 数量22129 
  • 厂家TI(德州仪器) 
  • 封装 
  • 批号22+ 
  • 原装原厂现货
  • QQ:3008092965QQ:3008092965 复制
    QQ:3008092965QQ:3008092965 复制
  • 0755-83239307 QQ:3008092965QQ:3008092965
  • OPA695IDBVR图
  • 深圳市华斯顿电子科技有限公司

     该会员已使用本站16年以上
  • OPA695IDBVR 现货库存
  • 数量125000 
  • 厂家TI/德州仪器 
  • 封装SOT-23-6 
  • 批号2023+ 
  • 绝对原装正品全新深圳进口现货,优质渠道供应商!
  • QQ:1002316308QQ:1002316308 复制
    QQ:515102657QQ:515102657 复制
  • 美驻深办0755-83777708“进口原装正品专供” QQ:1002316308QQ:515102657
  • OPA695IDBVR图
  • 深圳市宗天技术开发有限公司

     该会员已使用本站10年以上
  • OPA695IDBVR 现货库存
  • 数量8000 
  • 厂家TI(德州仪器) 
  • 封装SOT23-6 
  • 批号22+ 
  • 宗天技术 原装现货/假一赔十
  • QQ:444961496QQ:444961496 复制
    QQ:2824256784QQ:2824256784 复制
  • 0755-88601327 QQ:444961496QQ:2824256784
  • OPA695IDBVR图
  • 深圳市华美欧电子科技有限公司

     该会员已使用本站14年以上
  • OPA695IDBVR 现货库存
  • 数量3794 
  • 厂家德州仪器(Texas Instruments) 
  • 封装SOT23-6 
  • 批号23+ 
  • 华美欧专注原装正品 正规渠道
  • QQ:379381148QQ:379381148 复制
  • 0755-83989608 QQ:379381148
  • OPA695IDBVR图
  • 深圳市华来深电子有限公司

     该会员已使用本站13年以上
  • OPA695IDBVR 现货库存
  • 数量8560 
  • 厂家TI 
  • 封装SOT23-6 
  • 批号17+ 
  • 受权代理!全新原装现货特价热卖!
  • QQ:1258645397QQ:1258645397 复制
    QQ:876098337QQ:876098337 复制
  • 0755-83238902 QQ:1258645397QQ:876098337
  • OPA695IDBVR图
  • 深圳市芯脉实业有限公司

     该会员已使用本站11年以上
  • OPA695IDBVR 现货库存
  • 数量3000 
  • 厂家TI 
  • 封装SOT-23 (DBV) 
  • 批号新批次 
  • 新到现货、一手货源、当天发货、bom配单
  • QQ:2881512844QQ:2881512844 复制
  • 075584507705 QQ:2881512844
  • OPA695IDBVR图
  • 深圳市广百利电子有限公司

     该会员已使用本站6年以上
  • OPA695IDBVR 现货库存
  • 数量18500 
  • 厂家TI(德州仪器) 
  • 封装SOT-23-6 
  • 批号23+ 
  • ★★全网低价,原装原包★★
  • QQ:1483430049QQ:1483430049 复制
  • 0755-83235525 QQ:1483430049
  • OPA695IDBVR图
  • 深圳市拓森弘电子有限公司

     该会员已使用本站1年以上
  • OPA695IDBVR
  • 数量5300 
  • 厂家TI(德州仪器) 
  • 封装SOT-23-6 
  • 批号21+ 
  • 全新原装正品,现货库存欢迎咨询
  • QQ:1300774727QQ:1300774727 复制
  • 13714410484 QQ:1300774727
  • OPA695IDBVR图
  • 深圳市恒益昌科技有限公司

     该会员已使用本站6年以上
  • OPA695IDBVR
  • 数量5680 
  • 厂家TI 
  • 封装SOT23-6 
  • 批号23+ 
  • 原装正品长期供货
  • QQ:3336148967QQ:3336148967 复制
    QQ:974337758QQ:974337758 复制
  • 0755-82723761 QQ:3336148967QQ:974337758
  • OPA695IDBVR图
  • 深圳市恒达亿科技有限公司

     该会员已使用本站16年以上
  • OPA695IDBVR
  • 数量5680 
  • 厂家TI 
  • 封装SOT23-6 
  • 批号23+ 
  • 原装正品特价销售
  • QQ:867789136QQ:867789136 复制
    QQ:1245773710QQ:1245773710 复制
  • 0755-82723761 QQ:867789136QQ:1245773710
  • OPA695IDBVR图
  • 深圳市能元时代电子有限公司

     该会员已使用本站10年以上
  • OPA695IDBVR
  • 数量37000 
  • 厂家TEXAS 
  • 封装SOT23-6 
  • 批号24+ 
  • 公司原装现货可含税!假一罚十!
  • QQ:2885637848QQ:2885637848 复制
    QQ:2885658492QQ:2885658492 复制
  • 0755-84502810 QQ:2885637848QQ:2885658492
  • OPA695IDBVR图
  • 深圳市羿芯诚电子有限公司

     该会员已使用本站7年以上
  • OPA695IDBVR
  • 数量8500 
  • 厂家TI(德州仪器) 
  • 封装原厂封装 
  • 批号新年份 
  • 羿芯诚只做原装长期供,支持实单
  • QQ:2880123150QQ:2880123150 复制
  • 0755-82570600 QQ:2880123150
  • OPA695IDBVR图
  • 深圳市得捷芯城科技有限公司

     该会员已使用本站11年以上
  • OPA695IDBVR
  • 数量1924 
  • 厂家TI/德州仪器 
  • 封装NA/ 
  • 批号23+ 
  • 优势代理渠道,原装正品,可全系列订货开增值税票
  • QQ:3007977934QQ:3007977934 复制
    QQ:3007947087QQ:3007947087 复制
  • 0755-82546830 QQ:3007977934QQ:3007947087
  • OPA695IDBVR图
  • 深圳市晶美隆科技有限公司

     该会员已使用本站15年以上
  • OPA695IDBVR
  • 数量36500 
  • 厂家TI/德州仪器 
  • 封装SOT23-6 
  • 批号24+ 
  • 假一罚十,原装进口正品现货供应,价格优势。
  • QQ:198857245QQ:198857245 复制
  • 0755-82865294 QQ:198857245
  • OPA695IDBVR图
  • 千层芯半导体(深圳)有限公司

     该会员已使用本站9年以上
  • OPA695IDBVR
  • 数量30000 
  • 厂家TI 
  • 封装SOT23-6 
  • 批号2019+ 
  • TI一级代理专营品牌绝对进口原装假一赔十
  • QQ:2685694974QQ:2685694974 复制
    QQ:2593109009QQ:2593109009 复制
  • 0755-83978748,0755-23611964,13760152475 QQ:2685694974QQ:2593109009
  • OPA695IDBVR图
  • 集好芯城

     该会员已使用本站13年以上
  • OPA695IDBVR
  • 数量16452 
  • 厂家TI/德州仪器 
  • 封装SOT23-6 
  • 批号最新批次 
  • 原装原厂 现货现卖
  • QQ:3008092965QQ:3008092965 复制
    QQ:3008092965QQ:3008092965 复制
  • 0755-83239307 QQ:3008092965QQ:3008092965
  • OPA695IDBVR图
  • 深圳市晶美隆科技有限公司

     该会员已使用本站14年以上
  • OPA695IDBVR
  • 数量13815 
  • 厂家TI 
  • 封装SOT23-.. 
  • 批号23+ 
  • 全新原装正品现货热卖
  • QQ:2885348317QQ:2885348317 复制
    QQ:2885348339QQ:2885348339 复制
  • 0755-83209630 QQ:2885348317QQ:2885348339
  • OPA695IDBVR图
  • 深圳市晶美隆科技有限公司

     该会员已使用本站14年以上
  • OPA695IDBVR
  • 数量16815 
  • 厂家TI 
  • 封装SOT23-.. 
  • 批号23+ 
  • 全新原装正品现货热卖
  • QQ:2885348339QQ:2885348339 复制
    QQ:2885348317QQ:2885348317 复制
  • 0755-82519391 QQ:2885348339QQ:2885348317
  • OPA695IDBVR图
  • 深圳市雅维特电子有限公司

     该会员已使用本站15年以上
  • OPA695IDBVR
  • 数量5000 
  • 厂家TI 
  • 封装深圳原装现货 
  • 批号原厂原装 
  • QQ:767621813QQ:767621813 复制
    QQ:1152937841QQ:1152937841 复制
  • 0755-83975781 QQ:767621813QQ:1152937841
  • OPA695IDBVR图
  • 深圳市得捷芯城科技有限公司

     该会员已使用本站11年以上
  • OPA695IDBVR
  • 数量15198 
  • 厂家TI(德州仪器) 
  • 封装SOT23-6 
  • 批号23+ 
  • 原厂可订货,技术支持,直接渠道。可签保供合同
  • QQ:3007947087QQ:3007947087 复制
    QQ:3007947087QQ:3007947087 复制
  • 0755-83061789 QQ:3007947087QQ:3007947087
  • OPA695IDBVR图
  • 深圳市拓亿芯电子有限公司

     该会员已使用本站12年以上
  • OPA695IDBVR
  • 数量30000 
  • 厂家TI 
  • 封装SOT23-6 
  • 批号23+ 
  • 代理全新原装现货,价格优势
  • QQ:1774550803QQ:1774550803 复制
    QQ:2924695115QQ:2924695115 复制
  • 0755-82777855 QQ:1774550803QQ:2924695115
  • OPA695IDBVR图
  • 昂富(深圳)电子科技有限公司

     该会员已使用本站4年以上
  • OPA695IDBVR
  • 数量72282 
  • 厂家TI/德州仪器 
  • 封装N/A 
  • 批号23+ 
  • 一站式BOM配单,短缺料找现货,怕受骗,就找昂富电子.
  • QQ:GTY82dX7
  • 0755-23611557【陈妙华 QQ:GTY82dX7
  • OPA695IDBVR图
  • 深圳市华斯顿电子科技有限公司

     该会员已使用本站16年以上
  • OPA695IDBVR
  • 数量125000 
  • 厂家TI/德州仪器 
  • 封装SOT-23-6 
  • 批号2023+ 
  • 绝对原装正品全新深圳进口现货,优质渠道供应商!
  • QQ:364510898QQ:364510898 复制
    QQ:515102657QQ:515102657 复制
  • 0755-83777708“进口原装正品专供” QQ:364510898QQ:515102657
  • OPA695IDBVR图
  • 深圳市西源信息科技有限公司

     该会员已使用本站9年以上
  • OPA695IDBVR
  • 数量8800 
  • 厂家TI/德州仪器 
  • 封装SOT23-6 
  • 批号最新批号 
  • 原装现货零成本有接受价格就出
  • QQ:3533288158QQ:3533288158 复制
    QQ:408391813QQ:408391813 复制
  • 0755-84876394 QQ:3533288158QQ:408391813
  • OPA695IDBVR图
  • 深圳市集创讯科技有限公司

     该会员已使用本站5年以上
  • OPA695IDBVR
  • 数量9500 
  • 厂家TI/德州仪器 
  • 封装SOT-23-6 
  • 批号24+ 
  • 原装进口正品现货,假一罚十价格优势
  • QQ:2885393494QQ:2885393494 复制
    QQ:2885393495QQ:2885393495 复制
  • 0755-83244680 QQ:2885393494QQ:2885393495
  • OPA695IDBVR图
  • 深圳市宏捷佳电子科技有限公司

     该会员已使用本站12年以上
  • OPA695IDBVR
  • 数量82000 
  • 厂家TI假1赔房 
  • 封装SOT23-6 
  • 批号2023+ 
  • 原装原包现货支持实单
  • QQ:2885134554QQ:2885134554 复制
    QQ:2885134398QQ:2885134398 复制
  • 0755-22669259 QQ:2885134554QQ:2885134398
  • OPA695IDBVR图
  • 北京元坤伟业科技有限公司

     该会员已使用本站17年以上
  • OPA695IDBVR
  • 数量5000 
  • 厂家TI 
  • 封装SOT-23 
  • 批号2024+ 
  • 百分百原装正品,现货库存
  • QQ:857273081QQ:857273081 复制
    QQ:1594462451QQ:1594462451 复制
  • 010-62104931 QQ:857273081QQ:1594462451
  • OPA695IDBVR图
  • 深圳市欧立现代科技有限公司

     该会员已使用本站12年以上
  • OPA695IDBVR
  • 数量8230 
  • 厂家TI 
  • 封装SOT23-6 
  • 批号24+ 
  • 全新原装现货,欢迎询购!
  • QQ:1950791264QQ:1950791264 复制
    QQ:221698708QQ:221698708 复制
  • 0755-83222787 QQ:1950791264QQ:221698708
  • OPA695IDBVR图
  • 北京元坤伟业科技有限公司

     该会员已使用本站17年以上
  • OPA695IDBVR
  • 数量5000 
  • 厂家Texas Instruments 
  • 封装贴/插片 
  • 批号2024+ 
  • 百分百原装正品,现货库存
  • QQ:857273081QQ:857273081 复制
    QQ:1594462451QQ:1594462451 复制
  • 010-62104891 QQ:857273081QQ:1594462451
  • OPA695IDBVR图
  • 深圳市正信鑫科技有限公司

     该会员已使用本站12年以上
  • OPA695IDBVR
  • 数量7000 
  • 厂家TI 
  • 封装原厂封装 
  • 批号22+ 
  • 原装正品★真实库存★价格优势★欢迎来电洽谈
  • QQ:1686616797QQ:1686616797 复制
    QQ:2440138151QQ:2440138151 复制
  • 0755-22655674 QQ:1686616797QQ:2440138151
  • OPA695IDBVR图
  • 深圳市芯福林电子有限公司

     该会员已使用本站15年以上
  • OPA695IDBVR
  • 数量36000 
  • 厂家BB 
  • 封装SOT23-6 
  • 批号23+ 
  • 真实库存全新原装正品!代理此型号
  • QQ:2881495751QQ:2881495751 复制
  • 0755-88917743 QQ:2881495751
  • OPA695IDBVR图
  • 深圳市华芯盛世科技有限公司

     该会员已使用本站13年以上
  • OPA695IDBVR
  • 数量865000 
  • 厂家TI/德州仪器 
  • 封装20+ 
  • 批号最新批号 
  • 一级代理,原装特价现货!
  • QQ:2881475757QQ:2881475757 复制
  • 0755-83225692 QQ:2881475757
  • OPA695IDBVR图
  • 深圳市惊羽科技有限公司

     该会员已使用本站11年以上
  • OPA695IDBVR
  • 数量6328 
  • 厂家TI-德州仪器 
  • 封装SOT-23-6 
  • 批号▉▉:2年内 
  • ▉▉¥27.8元一有问必回一有长期订货一备货HK仓库
  • QQ:43871025QQ:43871025 复制
  • 131-4700-5145---Q-微-恭-候---有-问-秒-回 QQ:43871025
  • OPA695IDBVR图
  • 深圳市一呈科技有限公司

     该会员已使用本站9年以上
  • OPA695IDBVR
  • 数量
  • 厂家Texas Instruments 
  • 封装SOT-23-6 
  • 批号23+ 
  • ▉原装正品▉力挺实单全系列可订
  • QQ:3003797048QQ:3003797048 复制
    QQ:3003797050QQ:3003797050 复制
  • 0755-82779553 QQ:3003797048QQ:3003797050
  • OPA695IDBVR图
  • 深圳市三得电子有限公司

     该会员已使用本站15年以上
  • OPA695IDBVR
  • 数量91752 
  • 厂家TI/德州仪器 
  • 封装SOT23-6 
  • 批号2024 
  • 深圳原装现货库存,欢迎咨询合作
  • QQ:414322027QQ:414322027 复制
    QQ:565106636QQ:565106636 复制
  • 13509684848 QQ:414322027QQ:565106636
  • OPA695IDBVRG4图
  • 深圳市富科达科技有限公司

     该会员已使用本站13年以上
  • OPA695IDBVRG4
  • 数量9450 
  • 厂家BB 
  • 封装SOT23-6 
  • 批号2020+ 
  • 全新原装进口现货特价热卖,长期供货
  • QQ:1327510916QQ:1327510916 复制
    QQ:1220223788QQ:1220223788 复制
  • 0755-28767101 QQ:1327510916QQ:1220223788
  • OPA695IDBVR图
  • 深圳市硅诺电子科技有限公司

     该会员已使用本站8年以上
  • OPA695IDBVR
  • 数量64949 
  • 厂家TI 
  • 封装SOT23-6 
  • 批号17+ 
  • 原厂指定分销商,有意请来电或QQ洽谈
  • QQ:1091796029QQ:1091796029 复制
    QQ:916896414QQ:916896414 复制
  • 0755-82772151 QQ:1091796029QQ:916896414
  • OPA695IDBVR图
  • 深圳市英德州科技有限公司

     该会员已使用本站2年以上
  • OPA695IDBVR
  • 数量45000 
  • 厂家TI(德州仪器) 
  • 封装SOT-23-6 
  • 批号2年内 
  • 原厂渠道 正品保障 长期供应
  • QQ:2355734291QQ:2355734291 复制
  • -0755-88604592 QQ:2355734291
  • OPA695IDBVR图
  • 深圳市羿芯诚电子有限公司

     该会员已使用本站7年以上
  • OPA695IDBVR
  • 数量5600 
  • 厂家TI/德州仪器 
  • 封装原厂封装 
  • 批号新年份 
  • 羿芯诚只做原装,原厂渠道,价格优势可谈!
  • QQ:2853992132QQ:2853992132 复制
  • 0755-82570683 QQ:2853992132
  • OPA695IDBVR图
  • 深圳市芯福林电子有限公司

     该会员已使用本站15年以上
  • OPA695IDBVR
  • 数量85000 
  • 厂家TI/德州仪器 
  • 封装SOT23-6 
  • 批号23+ 
  • 真实库存全新原装正品!代理此型号
  • QQ:2881495753QQ:2881495753 复制
  • 0755-23605827 QQ:2881495753

产品型号OPA695IDBVR的概述

OPA695IDBVR 概述 OPA695IDBVR 是一款高性能运算放大器,专为高速应用而设计。该芯片在宽带信号处理、数据采集系统和其他高精度电子设备中发挥着至关重要的作用。其低失真、高速和低噪声特性使其非常适合那些对性能要求严格的应用。 芯片详细参数 OPA695IDBVR 的主要参数如下: 1. 增益带宽积 (GBW):Opa695的增益带宽积高达1.2 GHz,可以在高频应用中实现出色的性能。 2. 设置时间 (Settling Time):在0.1% 的精度范围内,其设置时间仅为 2ns,满足高速数据转换的需求。 3. 输入失调电压 (Input Offset Voltage):该芯片的输入失调电压小于 1mV,能够确保在低信号应用中的高精度。 4. 噪声 (Noise):OPA695IDBVR 的前置和后置噪声电平均较低,非常适合高动态范围的信号处理。典型噪声电平为...

产品型号OPA695IDBVR的Datasheet PDF文件预览

OPA695  
O
P
A
6
9
5
O
P
A
6
9
5
SBOS293B – DECEMBER 2003 – REVISED MARCH 2004  
Ultra-Wideband, Current-Feedback  
OPERATIONAL AMPLIFIER With Disable  
FEATURES  
APPLICATIONS  
GAIN = +2 BANDWIDTH (1400MHz)  
VERY WIDEBAND ADC DRIVER  
LOW-COST PRECISION IF AMPLIFIER  
BROADBAND VIDEO LINE DRIVER  
PORTABLE INSTRUMENTS  
ACTIVE FILTERS  
ARB WAVEFORM OUTPUT DRIVER  
OPA685 PERFORMANCE UPGRADE  
GAIN = +8 BANDWIDTH (450MHz)  
OUTPUT VOLTAGE SWING: ±4.2V  
ULTRA-HIGH SLEW RATE: 4300V/µs  
3RD-ORDER INTERCEPT: > 40dBm (f < 50MHz)  
LOW POWER: 129mW  
LOW DISABLED POWER: 0.5mW  
The OPA695’s low 12.9mA supply current is precisely  
trimmed at +25°C. This trim, along with a low temperature  
drift, gives low system power over temperature. System  
power may be further reduced using the optional disable  
control pin. Leaving this pin open, or holding it HIGH, gives  
normal operation. If pulled LOW, the OPA695 supply current  
drops to less than 170µA. This power-saving feature, along  
with exceptional single +5V operation and ultra-small  
SOT23-6 packaging, make the OPA695 ideal for portable  
applications.  
DESCRIPTION  
The OPA695 is a very high bandwidth, current-feedback op  
amp that combines exceptional 4300V/µs slew rate and low  
input voltage noise to deliver a precision low cost, high  
dynamic range Intermediate Frequency (IF) amplifier. Opti-  
mized for high gain operation, the OPA695 is ideally suited to  
buffering Surface Acoustic Wave (SAW) filters in an IF strip  
or delivering high output power at low distortion for cable  
modem upstream line drivers. Even higher bandwidth at  
lower gains gives a 1400MHz video line driver for high  
resolution RGB.  
OPA695 RELATED PRODUCTS  
SINGLES  
DUALS  
OPA658  
OPA691  
OPA692  
OPA693  
OPA2658  
OPA2691  
THS3202  
+5V  
GAIN OF +2V/V VIDEO LINE DRIVER  
PULSE RESPONSE  
1.2  
1
125MHz Input  
VIN  
75Ω  
VLOAD  
Voltage at  
Matched Load  
RG-59  
OPA695  
75Ω  
0.8  
0.6  
0.4  
0.2  
0
75Ω  
511Ω  
511Ω  
5V  
Gain 2V/V Video Line Driver  
0.2  
Time (1ns/div)  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
All trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
Copyright © 2003-2004, Texas Instruments Incorporated  
www.ti.com  
ABSOLUTE MAXIMUM RATINGS(1)  
ELECTROSTATIC  
Power Supply ............................................................................... ±6.5VDC  
Internal Power Dissipation ..................................... See Thermal Analysis  
Differential Input Voltage .................................................................. ±1.2V  
Input Common-Mode Voltage Range ................................................. ±VS  
Storage Temperature Range: D, DBV ...........................40°C to +125°C  
Lead Temperature (soldering, 10s) .............................................. +300°C  
Junction Temperature (TJ ) ........................................................... +150°C  
ESD Rating  
DISCHARGE SENSITIVITY  
This integrated circuit can be damaged by ESD. Texas Instru-  
ments recommends that all integrated circuits be handled with  
appropriate precautions. Failure to observe proper handling  
and installation procedures can cause damage.  
Human Body Model (HBM)(2) .......................................................... 1500V  
Charge Device Model (CDM) .......................................................... 1000V  
Machine Model (MM)......................................................................... 100V  
ESD damage can range from subtle performance degradation  
tocompletedevicefailure. Precisionintegratedcircuitsmaybe  
more susceptible to damage because very small parametric  
changes could cause the device not to meet its published  
specifications.  
NOTES: (1) Stresses above these ratings may cause permanent damage.  
Exposure to absolute maximum conditions for extended periods  
may degrade device reliability. These are stress ratings only, and  
functional operation of the device at these or any other conditions  
beyond those specified is not supported.  
(2) Pin 2 on SO-8 package and pin 4 on SOT23-6 package > 500V  
HBM.  
PACKAGE/ORDERING INFORMATION  
SPECIFIED  
PACKAGE  
DESIGNATOR(1)  
TEMPERATURE  
RANGE  
PACKAGE  
MARKING  
ORDERING  
NUMBER  
TRANSPORT  
MEDIA, QUANTITY  
PRODUCT  
PACKAGE-LEAD  
OPA695  
SO-8  
D
"
40°C to +85°C  
OPA695  
OPA695ID  
OPA695IDR  
Rails, 100  
"
OPA695  
"
"
"
"
A71L  
"
Tape and Reel, 2500  
Tape and Reel, 250  
Tape and Reel, 3000  
SOT23-6(2)  
DBV  
40°C to +85°C  
OPA695IDBVT  
OPA695IDBVR  
"
"
"
NOTE: (1) For the most current specifications and package information, refer to our web site at www.ti.com.  
(2) The SOT23-6 is shipped only as a lead-free and green package. Check TI web site for lead-free availability of other packages.  
PIN CONFIGURATIONS  
Top View  
SOT23-6  
Top View  
SO  
Output  
1
2
3
6
5
4
+VS  
DIS  
NC  
1
2
3
4
8
7
6
5
DIS  
VS  
Inverting Input  
Noninverting Input  
VS  
+VS  
Noninverting Input  
Inverting Input  
Output  
NC  
6
5
4
NC = No Connection  
A71L  
1
2
3
Pin Orientation/Package Marking  
OPA695  
2
SBOS293B  
www.ti.com  
ELECTRICAL CHARACTERISTICS: VS = ±5V  
Boldface limits are tested at +25°C.  
RF = 402, RL = 100, and G = +8, (see Figure 1 for AC performance only), unless otherwise noted.  
OPA695ID, IDBV  
TYP  
MIN/MAX OVER TEMPERATURE  
0
°
C to  
40  
°
C to  
MIN/  
TEST  
MAX LEVEL(3)  
PARAMETER  
CONDITIONS  
+25°C  
+25°C(1)  
70°C(2)  
+85°C(2)  
UNITS  
AC PERFORMANCE (see Figure 1)  
Small-Signal Bandwidth (VO = 0.5VPP  
)
G = +1, RF = 523Ω  
G = +2, RF = 511Ω  
G = +8, RF = 402Ω  
1700  
1400  
450  
350  
320  
4.6  
450  
4300  
2900  
0.8  
MHz  
MHz  
MHz  
MHz  
MHz  
dB  
MHz  
V/µs  
V/µs  
ns  
typ  
typ  
min  
typ  
min  
max  
typ  
min  
min  
typ  
C
C
B
C
B
B
C
B
B
C
C
C
C
400  
5.4  
380  
5.8  
350  
6.0  
G = +16, RF = 249Ω  
Bandwidth for 0.2dB Gain Flatness  
Peaking at a Gain of +1  
Large-Signal Bandwidth  
Slew Rate  
G = +2, VO = 0.5VPP, RF =523Ω  
RF = 523, VO = 0.5VPP  
G = +8, VO = 4VPP  
G = 8, VO = 4V Step  
G = +8, VO = 4V Step  
G = +8, VO = 0.5V Step  
G = +8, VO = 4V Step  
G = +8, VO = 2V Step  
G = +8, VO = 2V Step  
3700  
2600  
3600  
2500  
3500  
2400  
Rise-and-Fall Time  
1.0  
16  
10  
ns  
ns  
ns  
typ  
typ  
typ  
Settling Time to 0.02%  
0.1%  
Harmonic Distortion  
2nd-Harmonic  
G = +8, f = 10MHz, VO = 2VPP  
RL = 100Ω  
65  
78  
86  
86  
1.8  
18  
22  
0.04  
0.007  
62  
76  
84  
82  
2
60  
74  
75  
81  
2.7  
21  
59  
73  
72  
80  
2.9  
22  
dBc  
dBc  
dBc  
max  
max  
max  
max  
max  
max  
max  
typ  
B
B
B
B
B
B
B
C
C
R
L 500Ω  
RL = 100Ω  
L 500Ω  
3rd-Harmonic  
R
dBc  
Input Voltage Noise  
f > 1MHz  
f > 1MHz  
f > 1MHz  
nV/Hz  
pA/Hz  
pA/Hz  
%
Noninverting Input Current Noise  
Inverting Input Current Noise  
Differential Gain  
19  
24  
26  
27  
G = +2, NTSC, VO = 1.4Vp, RL = 150Ω  
G = +2, NTSC, VO = 1.4Vp, RL = 150Ω  
Differential Phase  
deg  
typ  
DC PERFORMANCE(4)  
Open-Loop Transimpedance Gain (ZOL  
Input Offset Voltage  
Average Offset Voltage Drift  
Noninverting Input Bias Current  
Average Noninverting Input Bias Current Drift  
Inverting Input Bias Current  
)
VO = 0V, RL = 100Ω  
85  
±0.3  
45  
±3.0  
43  
±3.5  
±10  
±37  
+150  
±66  
41  
±4.0  
±15  
±41  
+180  
±70  
kΩ  
mV  
µV/°C  
µA  
nA/°C  
µA  
nA°/C  
min  
max  
max  
max  
max  
max  
max  
A
A
B
A
B
A
B
V
CM = 0V  
VCM = 0V  
CM = 0V  
VCM = 0V  
CM = 0V  
V
+13  
±30  
±60  
V
±20  
Average Inverting Input Bias Current Drift  
VCM = 0V  
±120  
±160  
INPUT  
Common-Mode Input Range(5) (CMIR)  
Common-Mode Rejection Ratio (CMRR)  
Noninverting Input Impedance  
Inverting Input Resistance (RI)  
±3.3  
56  
280 || 1.2  
29  
±3.1  
51  
±3.0  
50  
±3.0  
50  
V
dB  
k|| pF  
min  
min  
typ  
A
A
C
C
VCM = 0V  
Open-Loop  
typ  
OUTPUT  
Voltage Output Swing  
No Load  
100Load  
±4.2  
±3.9  
+120  
120  
0.04  
±4.0  
±3.7  
+90  
90  
±3.9  
±3.7  
+80  
80  
±3.9  
±3.6  
+70  
70  
V
V
mA  
mA  
min  
min  
min  
min  
typ  
A
A
A
A
C
Current Output, Sourcing  
Current Output, Sinking  
Closed-Loop Output Impedance  
V
O = 0  
VO = 0  
G = +8, f = 100kHz  
DISABLE (Disabled LOW)  
Power-Down Supply Current (+VS)  
Disable Time  
Enable Time  
Off Isolation  
Output Capacitance in Disable  
Turn On Glitch  
Turn Off Glitch  
Enable Voltage  
Disable Voltage  
VDIS = 0  
VIN = ±0.25VDC  
IN = ±0.25VDC  
G = +8, 10MHz  
100  
1
25  
70  
4
±100  
±20  
3.3  
1.8  
75  
170  
186  
192  
µA  
µs  
ns  
dB  
pF  
mV  
mV  
V
typ  
typ  
typ  
typ  
typ  
typ  
typ  
min  
max  
max  
A
C
C
C
C
C
C
A
A
A
V
G = +2, RL = 150, VIN = 0  
G = +2, RL = 150, VIN = 0  
3.5  
1.7  
130  
3.6  
1.6  
143  
3.7  
1.5  
145  
V
µA  
Control Pin Input Bias Current (DIS)  
VDIS = 0  
POWER SUPPLY  
Specified Operating Voltage  
Maximum Operating Voltage Range  
Max Quiescent Current  
Min Quiescent Current  
Power-Supply Rejection Ratio (PSRR)  
±5  
V
V
mA  
mA  
dB  
typ  
max  
max  
min  
typ  
C
A
A
A
A
±6  
13.3  
12.6  
51  
±6  
13.7  
11.8  
48  
±6  
14.1  
11.0  
48  
V
S = ±5V  
12.9  
12.9  
55  
VS = ±5V  
Input Referred  
TEMPERATURE RANGE  
Specification: ID, IDBV  
Thermal Resistance, θJA  
40 to +85  
°C  
typ  
C
Junction-to-Ambient  
D
SO-8  
125  
150  
°C/W  
°C/W  
typ  
typ  
C
C
DBV SOT23-6  
NOTES: (1) Junction temperature = ambient for +25°C specifications.  
(2) Junction temperature = ambient at low temperature limit; junction temperature = ambient +15°C at high temperature limit for over temperature  
specifications.  
(3) Test levels: (A) 100% tested at +25°C. Over temperature limits by characterization and simulation.  
(B) Limits set by characterization and simulation. (C) Typical value only for information.  
(4) Current is considered positive out-of-node. VCM is the input common-mode voltage.  
(5) Tested < 3dB below minimum specified CMRR at ± CMIR limits.  
OPA695  
SBOS293B  
3
www.ti.com  
ELECTRICAL CHARACTERISTICS: VS = +5V  
Boldface limits are tested at +25°C.  
RF = 348, RL = 100to VS/2, and G = +8, (see Figure 3 for AC performance only), unless otherwise noted.  
OPA695ID, IDBV  
TYP  
MIN/MAX OVER TEMPERATURE  
0
°
C to  
40  
°
C to  
MIN/  
TEST  
MAX LEVEL(3)  
PARAMETER  
CONDITIONS  
+25°C  
+25°C(1)  
70°C(2)  
+85°C(2)  
UNITS  
AC PERFORMANCE (see Figure 3)  
Small-Signal Bandwidth (VO = 0.5VPP  
)
G = +1, RF = 511Ω  
G = +2, RF = 487Ω  
G = +8, RF = 348Ω  
1400  
960  
395  
235  
230  
1.0  
310  
1700  
1.0  
MHz  
MHz  
MHz  
MHz  
MHz  
dB  
MHz  
V/µs  
ns  
typ  
min  
typ  
C
C
B
C
B
B
C
B
C
C
C
C
380  
330  
300  
G = +16, RF = 162Ω  
G = +2, VO < 0.5VPP, RF = 487Ω  
RF = 511, VO < 0.5VPP  
G = +8, VO = 2VPP  
typ  
Bandwidth for 0.2dB Gain Flatness  
Peaking at a Gain of +1  
Large-Signal Bandwidth  
Slew Rate  
180  
2.0  
135  
2.5  
110  
3.0  
min  
max  
typ  
min  
typ  
typ  
typ  
typ  
G = +8, 2V Step  
1300  
1200  
1100  
Rise-and-Fall Time  
G = +8, VO = 0.5V Step  
G = +8, VO = 2V Step  
G = +8, VO = 2V Step  
G = +8, VO = 2V Step  
1.0  
16  
10  
ns  
ns  
ns  
Settling Time to 0.02%  
0.1%  
Harmonic Distortion  
2nd-Harmonic  
G = +8, f = 10MHz, VO = 2VPP  
RL = 100to VS/2  
62  
70  
66  
65  
1.8  
18  
58  
66  
64  
63  
2
58  
66  
64  
63  
2.7  
21  
57  
65  
63  
62  
2.9  
22  
dBc  
dBc  
dBc  
max  
max  
max  
max  
max  
max  
max  
B
B
B
B
B
B
B
RL 500to VS/2  
RL = 100to VS/2  
RL 500to VS/2  
f > 1MHz  
3rd-Harmonic  
dBc  
Input Voltage Noise  
Noninverting Input Current Noise  
Inverting Input Current Noise  
nV/Hz  
pA/Hz  
pA/Hz  
f > 1MHz  
f > 1MHz  
19  
24  
22  
26  
27  
DC PERFORMANCE(4)  
Open-Loop Transimpedance Gain (ZOL  
Input Offset Voltage  
Average Offset Voltage Drift  
Noninverting Input Bias Current  
Average Noninverting Input Bias Current Drift  
Inverting Input Bias Current  
)
VO = VS/2, RL = 100to VS/2  
CM = VS/2  
VCM = VS/2  
CM = VS/2  
VCM = VS/2  
CM = VS/2  
70  
±0.3  
40  
±3  
38  
±3.5  
±10  
±45  
±110  
±66  
36  
±4.0  
±15  
±50  
±170  
±70  
kΩ  
mV  
µV/°C  
µA  
nA/°C  
µA  
nA/°C  
min  
max  
max  
max  
max  
max  
max  
A
A
B
A
B
A
B
V
V
±5  
±5  
±40  
±60  
V
Average Inverting Input Bias Current Drift  
VCM = VS/2  
±120  
±160  
INPUT  
Least Positive Input Voltage(5)  
Most Positive Input Voltage(5)  
Common-Mode Rejection Ratio (CMRR)  
Noninverting Input Impedance  
Inverting Input Resistance (RI )  
1.7  
3.3  
54  
280 || 1.2  
32  
1.8  
3.2  
51  
1.9  
3.1  
50  
1.9  
3.1  
50  
V
V
dB  
k|| pF  
max  
min  
min  
typ  
A
A
A
C
C
VCM = VS/2  
Open-Loop  
typ  
OUTPUT  
Most Positive Output Voltage  
No Load  
RL = 100to VS/2  
No Load  
4.2  
4.0  
0.8  
1.0  
90  
4.0  
3.9  
1.0  
1.1  
70  
3.9  
3.8  
1.1  
1.2  
67  
3.8  
3.7  
1.2  
1.3  
66  
V
V
V
min  
min  
max  
max  
min  
min  
typ  
A
A
A
A
A
A
C
Least Positive Output Voltage  
RL = 100to VS/2  
V
Current Output, Sourcing  
Current Output, Sinking  
Closed-Loop Output Impedance  
V
O = VS/2  
mA  
mA  
VO = VS/2  
90  
0.05  
70  
67  
66  
G = +2, f = 100kHz  
DISABLE (Disabled LOW)  
Power Down Supply Current (+VS)  
Disable Time  
Enable Time  
Off Isolation  
Output Capacitance in Disable  
Turn On Glitch  
Turn Off Glitch  
Enable Voltage  
Disable Voltage  
VDIS = 0  
95  
1
25  
70  
4
±100  
±20  
3.3  
1.8  
75  
160  
175  
180  
µA  
µs  
ns  
dB  
pF  
mV  
mV  
V
typ  
typ  
typ  
typ  
typ  
typ  
typ  
min  
max  
typ  
C
C
C
C
C
C
C
A
A
C
G = +8, 10MHz  
G = +2, RL = 150, VIN = VS /2  
G = +2, RL = 150, VIN = VS /2  
3.5  
1.7  
130  
3.6  
1.6  
143  
3.7  
1.5  
149  
V
µA  
Control Pin Input Bias Current (DIS)  
VDIS = 0  
POWER SUPPLY  
Specified Single-Supply Operating Voltage  
Max Single-Supply Operating Voltage  
Max Quiescent Current  
Min Quiescent Current  
Power-Supply Rejection Ratio (PSRR)  
5
V
V
mA  
mA  
dB  
typ  
max  
max  
min  
typ  
C
A
A
A
C
12  
12.0  
10.9  
12  
12.5  
9.4  
12  
12.9  
9.1  
VS = +5V  
VS = +5V  
Input Referred  
11.4  
11.4  
56  
TEMPERATURE RANGE  
Specification: ID, IDBV  
Thermal Resistance, θJA  
40 to +85  
°C  
typ  
C
Junction-to-Ambient  
D
SO-8  
125  
150  
°C/W  
°C/W  
typ  
typ  
C
C
DBV SOT23-6  
NOTES: (1) Junction temperature = ambient for +25°C specifications.  
(2) Junction temperature = ambient at low temperature limit: junction temperature = ambient +15°C at high temperature limit for over temperature  
specifications.  
(3) Test levels: (A) 100% tested at +25°C. Over temperature limits by characterization and simulation.  
(B) Limits set by characterization and simulation. (C) Typical value only for information.  
(4) Current is considered positive out-of-node. VCM is the input common-mode voltage.  
(5) Tested < 3dB below minimum specified CMRR at ± CMIR limits.  
OPA695  
4
SBOS293B  
www.ti.com  
TYPICAL CHARACTERISTICS: VS = ±5V  
G = +8, RF = 402, RL = 100Ω, unless otherwise noted.  
NONINVERTING SMALL-SIGNAL  
FREQUENCY RESPONSE  
INVERTING SMALL-SIGNAL  
FREQUENCY RESPONSE  
6
3
6
3
VO = 500mVPP  
VO = 500mVPP  
G = +2, RF = 523Ω  
G = 2, RF = 499Ω  
G = 8, RF = 442Ω  
G = 16, RF = 806Ω  
G = 4,  
0
0
RF = 475Ω  
3  
3  
6  
6  
9  
9  
G = +4, RF = 480Ω  
G = +8, RF = 402Ω  
12  
15  
18  
21  
24  
12  
15  
18  
21  
24  
G = +16, RF = 249Ω  
See Figure 1  
See Figure 2  
0
200  
400  
600  
800  
1000  
1200  
1400  
0
200  
400  
600  
800  
1000  
1200  
1400  
Frequency (MHz)  
Frequency (MHz)  
NONINVERTING LARGE-SIGNAL  
FREQUENCY RESPONSE  
INVERTING LARGE-SIGNAL  
FREQUENCY RESPONSE  
24  
21  
18  
15  
12  
9
24  
21  
18  
15  
12  
9
G = 8, RF = 442Ω  
VO = 2VPP  
G = +8, RF = 402Ω  
VO = 1VPP  
and 2VPP  
VO = 7VPP  
VO = 4VPP  
VO = 1VPP  
6
6
VO = 4VPP  
3
3
VO = 7VPP  
0
0
3  
6  
3  
6  
See Figure 1  
See Figure 2  
0
500MHz  
1GHz  
0
500MHz  
1GHz  
Frequency (100MHz/div)  
Frequency (100MHz/div)  
NONINVERTING LARGE AND SMALL-SIGNAL  
PULSE RESPONSE  
INVERTING LARGE AND SMALL-SIGNAL  
PULSE RESPONSE  
3
2
3
2
125MHz Square Wave Input  
G = +8, RF = 402Ω  
125MHz Square Wave Input  
G = +8, RF = 402Ω  
1
1
Small-Signal ±500mV  
0
0
Small-Signal ±500mV  
1  
2  
3  
1  
2  
3  
Large-Signal ±2V  
Large-Signal ±2V  
See Figure 1  
See Figure 2  
Time (1ns/div)  
Time (1ns/div)  
OPA695  
SBOS293B  
5
www.ti.com  
TYPICAL CHARACTERISTICS: VS = ±5V  
G = +8, RF = 402, RL = 100Ω, unless otherwise noted.  
10MHz HARMONIC DISTORTION  
vs LOAD RESISTANCE  
10MHz HARMONIC DISTORTION  
vs SUPPLY VOLTAGE  
50  
60  
55  
60  
65  
70  
75  
80  
85  
90  
95  
VO = 2VPP  
G = 8V/V  
VO = 2VPP, G = 8V/V  
RL = 100Ω  
2nd-Harmonic  
2nd-Harmonic  
70  
80  
3rd-Harmonic  
3rd-Harmonic  
90  
See Figure 1  
See Figure 1  
100  
50  
100  
500  
100  
20  
2.5  
3.0  
3.5  
4.0  
4.5  
5.0  
5.5  
6.0  
Load Resistance ()  
Supply Voltage (±V)  
10MHz HARMONIC DISTORTION  
vs OUTPUT VOLTAGE  
HARMONIC DISTORTION vs FREQUENCY  
50  
60  
50  
60  
VO = 2VPP, G = +8V/V  
L = 100Ω  
G = +8V/V  
RL = 100Ω  
R
2nd-Harmonic  
70  
70  
3rd-Harmonic  
2nd-Harmonic  
80  
80  
3rd-Harmonic  
90  
90  
See Figure 1  
0.1  
See Figure 1  
100  
100  
0.5  
1
10  
Frequency (MHz)  
1
5
Output Voltage (VPP  
)
10MHz HARMONIC DISTORTION  
vs NONINVERTING GAIN  
10MHz HARMONIC DISTORTION  
vs INVERTING GAIN  
60  
65  
70  
75  
80  
85  
90  
55  
60  
65  
70  
75  
80  
85  
90  
VO = 2VPP  
RL = 100Ω  
VO = 2VPP, RL = 100Ω  
2nd-Harmonic  
2nd-Harmonic  
3rd-Harmonic  
See Figure 1  
3rd-Harmonic  
See Figure 2  
20  
2
10  
2
10  
Noninverting Gain (V/V)  
Inverting Gain (|V/V|)  
OPA695  
6
SBOS293B  
www.ti.com  
TYPICAL CHARACTERISTICS: VS = ±5V  
G = +8, RF = 402, RL = 100Ω, unless otherwise noted.  
TWO-TONE, 3rd-ORDER  
INPUT VOLTAGE AND CURRENT NOISE DENSITY  
INTERMODULATION INTERCEPT ±5V  
100  
10  
1
45  
40  
35  
30  
25  
20  
15  
Inverting  
50Ω  
G = 8  
PO  
OPA685  
50Ω  
22pA/Hz  
402Ω  
Inverting Input Current Noise  
50Ω  
Noninverting  
PI  
G = 12dB to matched load.  
Noninverting Input Current Noise 19pA/Hz  
G = +8  
PI  
50Ω  
PO  
OPA685  
402Ω  
56.2Ω  
G = 12dB to matched load.  
50Ω  
50Ω  
Input Voltage Noise  
1.7nV/Hz  
103  
104  
105  
106  
107  
108  
20 40 60 80 100 120 140 160 180 200 220 240  
Frequency (MHz)  
Frequency (Hz)  
OUTPUT RETURN LOSS vs FREQUENCY (S22  
)
INPUT RETURN LOSS vs FREQUENCY (S11  
)
0
10  
20  
30  
40  
50  
60  
0
G = ±8V/V  
Without  
Trim Cap  
G = 8  
(see Figure 2)  
10  
20  
30  
40  
50  
60  
VSWR < 1.2:1  
VSWR < 1.2:1  
With  
Trim Cap  
50Ω  
G = +8  
(see Figure 1)  
OPA695  
S
22  
2.5pF  
Trim Cap  
10M  
100M  
Frequency (Hz)  
1G  
10M  
100M  
1G  
Frequency (Hz)  
SMALL-SIGNAL FREQUENCY RESPONSE  
vs CAPACITIVE LOAD  
RS vs CAPACITIVE LOAD  
21  
18  
15  
12  
9
35  
30  
25  
20  
15  
10  
5
0.5dB Peaking  
Allowed  
CL = 10pF  
CL = 20pF  
CL = 50pF  
CL = 100pF  
+5V  
V
R
S
I
V
OPA695  
O
50Ω  
C
1kΩ  
L
402Ω  
5V  
57.4Ω  
1kload is optional  
0
10M  
100M  
Frequency (Hz)  
1G  
5
10  
100  
Capacitive Load (pF)  
OPA695  
SBOS293B  
7
www.ti.com  
TYPICAL CHARACTERISTICS: VS = ±5V  
G = +8, RF = 402, RL = 100Ω, unless otherwise noted.  
CMRR AND PSRR vs FREQUENCY  
OPEN-LOOP TRANSIMPEDANCE GAIN AND PHASE  
20 log|ZOL  
60  
55  
50  
45  
40  
35  
30  
25  
20  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
0
+PSRR  
|
20  
40  
PSRR  
60  
CMRR  
80  
100  
120  
140  
160  
180  
200  
ZOL  
103  
104  
105  
106  
107  
108  
105  
106  
107  
108  
109  
Frequency (Hz)  
Frequency (Hz)  
SUPPLY AND OUTPUT CURRENT vs TEMPERATURE  
Sourcing Output Current  
OUTPUT VOLTAGE AND CURRENT LIMITATIONS  
130  
120  
110  
14  
13  
12  
11  
10  
5
4
1 Watt  
Internal Power  
Left Scale  
3
Supply Current  
2
Sinking Output  
Right Scale  
Current  
1
50Load Line  
25Load Line  
0
Left Scale  
1  
2  
3  
4  
5  
100Load Line  
1 Watt  
Internal Power  
25  
0
25  
50  
75  
100  
125  
250 200 150 100 50  
0
50 100 150 200 250  
Ambient Temperature (°C)  
IO (mA)  
NONINVERTING OVERDRIVE RECOVERY  
INVERTING OVERDRIVE RECOVERY  
6
4
6
G = +8V/V  
G = 8V/V  
Input  
Output  
Output  
4
2
2
Input  
Linear Input Range  
0
0
Linear Input Range  
2  
4  
6  
2  
4  
6  
See Figure 1  
See Figure 2  
Time (50ns/div)  
Time (50ns/div)  
OPA695  
8
SBOS293B  
www.ti.com  
TYPICAL CHARACTERISTICS: VS = ±5V  
G = +8, RF = 402, RL = 100Ω, unless otherwise noted.  
SETTLING TIME  
DISABLED FEEDTHROUGH vs FREQUENCY  
G = +8V/V  
20  
15  
40  
50  
60  
70  
80  
90  
100  
G = +8V/V  
O = 2V Step  
V
Forward  
10  
Input  
5
0
Reverse  
5  
Output  
10  
15  
20  
See Figure 1  
Time (1ns/div)  
1
10  
Frequency (MHz)  
100  
COMMON-MODE INPUT AND OUTPUT SWING  
vs SUPPLY VOLTAGE  
TYPICAL DC DRIFT OVER TEMPERATURE  
1.0  
0.5  
20  
10  
0
6
5
4
3
2
1
0
Inverting Input Bias Current  
Right Scale  
Output Voltage Range  
Noninverting Input Bias Current  
Right Scale  
0
Input Offset Voltage  
Left Scale  
Input Voltage Range  
0.5  
1.0  
10  
20  
50  
25  
0
25  
50  
75  
100  
125  
2.0  
2.5  
3.0 3.5  
4.0  
4.5  
5.0  
5.5  
6.0 6.5  
Ambient Temperature (°C)  
Power Supplies (±) Volts  
φ
COMPOSITE VIDEO dG/d  
LARGE-SIGNAL DISABLE/ENABLE RESPONSE  
VDIS  
0.08  
0.07  
0.06  
0.05  
0.04  
0.03  
0.02  
0.01  
0
5
4
V
I
V
O
OPA695  
75Ω  
Video  
1kΩ  
Loads  
511Ω  
5V  
511Ω  
1k, optional pulldown  
3
dG  
VO  
2
1
dG, 1kPulldown  
VIN = 0.25VDC  
φ
d
0
φ
d , 1kPulldown  
See Figure 1  
1  
1
2
3
4
Time (500ns/div)  
Number of 150Loads  
OPA695  
SBOS293B  
9
www.ti.com  
TYPICAL CHARACTERISTICS: VS = ±5V Differential Operation  
GD = 10, RF = 500, RL = 800Ω, unless otherwise noted.  
DIFFERENTIAL SMALL-SIGNAL  
+5V  
FREQUENCY RESPONSE  
2
GD = 5  
VO = 2VPP  
GD = 10  
OPA695  
1
0
5V  
1  
2  
3  
4  
5  
6  
7  
8  
Z
I = RT || 2RG  
RF  
500Ω  
RG  
1:1  
VI  
GD = 20  
RL  
800Ω  
VO  
RT  
RF  
500Ω  
RG  
+5V  
VO 500Ω  
=
= GD  
VI  
RG  
OPA695  
1
10  
100  
Frequency (MHz)  
1000  
5V  
LARGE-SIGNAL BANDWIDTH  
DISTORTION vs FREQUENCY  
21.0  
20.5  
20.0  
19.5  
19.0  
18.5  
18.0  
17.5  
17.0  
16.5  
16.0  
65  
GD = 10  
VO = 2VPP  
GD = 10V/V  
O = 2VPP  
70  
75  
V
and 4VPP  
VO = 8VPP  
80  
3rd-Harmonic  
85  
90  
VO = 12VPP  
95  
2nd-Harmonic  
VO = 16VPP  
100  
105  
1
10  
100  
Frequency (MHz)  
1000  
10  
100  
Frequency (MHz)  
2-TONE, 3RD-ORDER  
INTERMODULATION INTERCEPT  
DISTORTION vs VOUT  
55  
50  
45  
40  
35  
30  
25  
65  
70  
GD = 10V/V  
F = 20MHz  
RL = 800Ω  
D = 10  
G
RL = 800Ω  
3rd-Harmonic  
2nd-Harmonic  
75  
80  
85  
90  
95  
100  
105  
0
20  
40  
60 80 100 120 140 160 180 200  
Center Frequency (MHz)  
0
2
4
6
8
10  
VO (VPP)  
OPA695  
10  
SBOS293B  
www.ti.com  
TYPICAL CHARACTERISTICS: VS = +5V  
VS = +5V, G = +8, RF = 348, RL = 100Ω, unless otherwise noted.  
NONINVERTING SMALL-SIGNAL  
FREQUENCY RESPONSE  
INVERTING SMALL-SIGNAL  
FREQUENCY RESPONSE  
6
3
6
3
G = +2, RF = 487Ω  
G = 2V/V, RF = 453Ω  
G = +4, RF = 450Ω  
0
0
G = 4, RF = 442Ω  
3  
3  
6  
6  
9  
9  
G = +8, RF = 348Ω  
12  
15  
18  
21  
24  
12  
15  
18  
21  
24  
G = 16, RF = 806Ω  
G = 50Ω  
R
G = 8, RF = 422Ω  
G = +16, RF = 162Ω  
See Figure 4  
200  
See Figure 3  
200  
0
400  
600  
800  
1GHz  
0
400  
600  
800  
1GHz  
Frequency (200MHz/div)  
Frequency (200MHz/div)  
NONINVERTING PULSE RESPONSE  
G = +8V/V  
INVERTING PULSE RESPONSE  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
G = 8V/V  
100MHz, Square Wave Input  
100MHz, Square Wave Input  
See Figure 4  
See Figure 3  
Time (1ns/div)  
Time (1ns/div)  
SMALL-SIGNAL FREQUENCY RESPONSE  
vs CAPACITIVE LOAD  
RS vs CAPACITIVE LOAD  
21  
18  
15  
12  
9
25  
0.5dB Peaking  
Allowed  
CL = 10pF  
20  
15  
10  
5
CL = 20pF  
CL = 100pF  
+5V  
CL = 50pF  
2kΩ  
DIS  
1000pF  
V
R
S
I
V
OPA695  
O
50Ω  
2kΩ  
C
1kΩ  
L
R
F
348Ω  
50Ω  
1000pF  
1kload is optional  
0
10  
100  
Frequency (MHz)  
1k  
5
10  
100  
Capacitive Load (pF)  
OPA695  
SBOS293B  
11  
www.ti.com  
TYPICAL CHARACTERISTICS: VS = +5V (Cont.)  
VS = +5V, G = +8, RF = 348, RL = 100Ω, unless otherwise noted.  
10MHz HARMONIC DISTORTION  
vs OUTPUT VOLTAGE  
HARMONIC DISTORTION vs FREQUENCY  
50  
55  
60  
65  
70  
75  
80  
85  
90  
50  
55  
60  
65  
70  
75  
80  
85  
90  
VO = 2VPP  
RL = 100Ω  
G = +8V/V  
G = +8V/V  
RL = 100Ω  
2nd-Harmonic  
2nd-Harmonic  
3rd-Harmonic  
3rd-Harmonic  
See Figure 3  
2.0 2.5  
See Figure 3  
0.5  
1
10  
100  
0
0.5  
1.0  
1.5  
Output Voltage (VPP  
)
Frequency (MHz)  
TWO-TONE, 3rd-ORDER  
INTERMODULATION INTERCEPT  
10MHz HARMONIC DISTORTION  
vs LOAD RESISTANCE  
40  
35  
30  
25  
20  
15  
50  
55  
60  
65  
70  
75  
80  
85  
90  
VO = 2VPP  
G = +8V/V  
2nd-Harmonic  
3rd-Harmonic  
See Figure 4  
See Figure 3  
See Figure 3  
50  
20 40 60 80 100 120 140 160 180 200 220 240  
Frequency (MHz)  
100  
Load Resistance ()  
500  
SMALL-SIGNAL BW vs SINGLE-SUPPLY VOLTAGE  
500  
RF = 348Ω  
480  
460  
440  
420  
400  
380  
360  
340  
320  
300  
V
O = 500mVPP  
G = +8V/V  
See Figure 3  
10 11  
4
5
6
7
8
9
12  
Single Power Supply Voltage  
OPA695  
12  
SBOS293B  
www.ti.com  
the two power supply pins. In practical PC board layouts, this  
optional added capacitor will typically improve the 2nd-  
harmonic distortion performance by 3dB to 6dB for bipolar  
supply operation.  
APPLICATIONS INFORMATION  
WIDEBAND CURRENT FEEDBACK OPERATION  
The OPA695 gives a new level of performance in wideband  
current feedback op amps. Nearly constant AC performance  
over a wide gain range, along with 4300V/µs slew rate, gives  
a lower power and cost solution for high-intercept IF amplifier  
requirements. While optimized at a gain of +8V/V (12dB to a  
matched 50load) to give 450MHz bandwidth, applications  
from gains of 1 to 40 can be supported. As a gain of +2  
video line driver, the bandwidth extends to 1.4GHz with  
a slew rate to support the highest pixel rates. At gains  
above 20, the signal bandwidth starts to decrease, but still  
exceeds 180MHz up to a gain of 40V/V (26dB to a matched  
50load). Single +5V supply operation is also supported  
with similar bandwidths but reduced output power capability.  
For lower speed (< 250MHz) requirements with higher output  
powers, consider the OPA691.  
Figure 2 shows the DC-coupled, gain of 8V/V, dual power  
supply circuit used as the basis of the Inverting Typical  
Characteristic curves. Inverting operation offers several per-  
formance benefits. Since there is no common mode signal  
across the input stage, the slew rate for inverting operation  
is higher and the distortion performance is slightly improved.  
An additional input resistor, RT, is included in Figure 2 to set  
the input impedance equal to 50. The parallel combination  
of RT and RG set the input impedance. Both the non-inverting  
and inverting applications of Figures 1 and 2 will benefit from  
optimizing the feedback resistor (RF) value for bandwidth  
(see the discussion in Setting Resistor Values to Optimize  
Bandwidth). The typical design sequence is to select the RF  
value for best bandwidth, set RG for the gain, then set RT for  
the desired input impedance. As the gain increases for the  
inverting configuration, a point will be reached where RG will  
equal 50, where RT is removed and the input match is set  
by RG only. With RG fixed to achieve an input match to 50,  
RF is simply increased, to increase gain. This will, however,  
quickly reduce the achievable bandwidth, as shown by the  
inverting gain of 16 frequency response in the Typical  
Characteristic curves. For gains > 10V/V (14dB at the matched  
load), noninverting operation is recommended to maintain  
broader bandwidth.  
Figure 1 shows the DC-coupled, gain of +8V/V, dual power  
supply circuit used as the basis of the ±5V Specifications and  
Typical Characteristic curves. For test purposes, the input  
impedance is set to 50with a resistor to ground and the  
output impedance is set to 50with a series output resistor.  
Voltage swings reported in the specifications are taken  
directly at the input and output pins while load powers (dBm)  
are defined at a matched 50load. For the circuit of Figure  
1, the total effective load will be 100|| 458= 82. The  
disable control line (DIS) is typically left open to get normal  
amplifier operation. The disable line must be asserted low to  
shut off the OPA695. One optional component is included in  
Figure 1. In addition to the usual power supply decoupling  
capacitors to ground, a 0.01µF capacitor is included between  
+5V  
+VS  
+
+5V  
0.1µF  
6.8µF  
+
6.8µF  
20Ω  
DIS  
50Ω  
0.1µF  
50Load  
VO  
OPA695  
50Source  
DIS  
50Load  
VI  
50Ω  
VO  
50Ω  
Optional  
0.01µF  
OPA695  
RF  
442Ω  
RG  
54.9Ω  
50Source  
Optional  
0.01µF  
VI  
RF  
402Ω  
RT  
562Ω  
0.1µF  
6.8µF  
+
RG  
56.2Ω  
VS  
0.1µF  
6.8µF  
5V  
+
5V  
FIGURE 1. DC-Coupled, G = +8V/V, Bipolar Supply Speci-  
fications and Test Circuit.  
FIGURE 2. DC-Coupled, G = 8V/V, Bipolar Supply Speci-  
fications and Test Circuit.  
OPA695  
SBOS293B  
13  
www.ti.com  
Figure 3 shows the AC-coupled, single +5V supply, gain of  
+8V/V circuit configuration used as a basis for the +5V only  
Specifications and Typical Characteristic curves. The key  
requirement for broadband single-supply operation is to  
maintain input and output signal swings within the useable  
voltage ranges at both the input and the output. The circuit  
of Figure 3 establishes an input midpoint bias using a simple  
resistive divider from the +5V supply (two 806resistors) to  
the noninverting input. The input signal is then AC-coupled  
into this midpoint voltage bias. The input voltage can swing  
to within 1.6V of either supply pin, giving a 1.8VPP input  
signal range centered between the supply pins. The input  
impedance matching resistor (57.6) used in Figure 3 is  
adjusted to give a 50input match when the parallel combi-  
nation of the biasing divider network is included. The gain  
resistor (RG) is AC-coupled, giving the circuit a DC gain of +1.  
This puts the input DC bias voltage (2.5V) on the output as  
well. The feedback resistor value has been adjusted from the  
bipolar supply condition to re-optimize for a flat frequency  
response in +5V only, gain of +8 operation (see Setting  
Resistor Values to Optimize Bandwidth). On a single +5V  
supply, the output voltage can swing to within 1.0V of either  
supply pin while delivering more than 90mA output current  
giving 3V output swing into 100(7dBm maximum at the  
matched load). The circuit of Figure 3 shows a blocking  
capacitor driving into a 50output resistor then into a 50Ω  
load. Alternatively, the blocking capacitor could be removed  
with the load tied to a supply midpoint or to ground if the DC  
current required by this grounded load is acceptable.  
Figure 4 shows the AC-coupled, single +5V supply, gain of  
8V/V circuit configuration used as a basis for the +5V only  
Typical Characteristic curves. In this case, the midpoint DC  
bias on the noninverting input is also de-coupled with an  
additional 0.1µF decoupling capacitor. This reduces the  
source impedance at higher frequencies for the noninverting  
input bias current noise. This 2.5V bias on the noninverting  
input pin appears on the inverting input pin and, since RG is  
DC blocked by the input capacitor, will also appear at the  
output pin. One advantage to inverting operation is that since  
there is no signal swing across the input stage, higher slew  
rates and operation to even lower supply voltages are pos-  
sible. To retain a 1VPP output capability, operation down to a  
3V supply is allowed. At a +3V supply, the input common  
mode range is 0V. However, for the inverting configuration of  
a current feedback amplifier, wideband operation is retained  
even with the input stage saturated.  
+5V  
+VS  
+
0.1µF  
6.8µF  
806Ω  
806Ω  
50Source  
0.1µF  
DIS  
50Load  
VI  
0.1µF  
50Ω  
VO  
1000pF  
OPA695  
57.6Ω  
1000pF  
RF  
348Ω  
RG  
50Ω  
1000pF  
0.1µF  
FIGURE 3. AC-Coupled, G = +8V/V, Single-Supply Specifications and Test Circuit.  
+5V  
+VS  
+
0.1µF  
6.8µF  
806Ω  
806Ω  
20Ω  
DIS  
50Load  
0.1µF  
50Ω  
VO  
1000pF  
0.1µF  
OPA695  
1000pF  
RG  
50Ω  
RF  
400Ω  
0.1µF  
VI  
1000pF  
FIGURE 4. AC-Coupled, G = 8V/V, Single-Supply Specifications and Test Circuit.  
OPA695  
14  
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The single-supply test circuits of Figures 3 and 4 show +5V  
operation. These same circuits can be used over a single-  
supply range of +5V to +12V. Operating on a single +12V  
supply, with the Absolute Maximum Supply voltage specifica-  
tion of +13V, gives adequate design margin for the typical  
±5% supply tolerance.  
Since the op amp itself shows a very low output impedance  
that increases with frequency, an improvement in the output  
match can therefore be obtained by adding a small equaliz-  
ing capacitor across this output resistor. The Typical Charac-  
teristic curves show the measured S22 with and without this  
2.5pF capacitor (across the 50output resistor). Again, a  
very good match for a fixed-gain RF amplifier would give a  
VSWR of 1.2:1 (S22 < 21dB). The Typical Characteristic  
curves show the measured S22 with and without this 2.5pF  
capacitor across the 50output resistor. The Typical Char-  
acteristic curves show that a simple 50output resistor holds  
better than 21dB to 140MHz, but up to 380MHz with the  
tuning capacitor.  
RF SPECIFICATIONS AND APPLICATIONS  
The ultra-high, full-power bandwidth and 3rd-order intercept  
of the OPA695 may be used to good advantage in IF  
amplifier applications. Additional benefits to using a wideband  
op amp such as the OPA695 include extremely good (and  
independent) I/O impedance matching as well as very high  
reverse isolation. A designer more accustomed to using  
fixed-gain RF amplifiers will get almost perfect gain accuracy,  
much higher I/O return loss, and 3rd-order intercept points  
exceeding 30dBm (up to 110MHz) using only a 13mA supply  
current for the OPA695. Using the considerable design  
freedom achieved by adjusting the external resistors, the  
OPA695 can replace a wide range of fixed-gain RF amplifiers  
with a single part. To understand (in RF amplifier terms) how  
to take advantage of this, consider first the 4-S parameters  
(this will be done using the example circuits of Figures 1 and  
2 on ±5V supplies, but similar results can be obtained on a  
single +5V to +12V supply).  
FORWARD GAIN (S21)  
In all high-speed amplifier data sheets, this is referred to as  
the small signal gain which is plotted over frequency. The  
difference between noninverting and inverting operation is  
that the phase of S21 starts out at 0° for the noninverting and  
180° for the inverting. This initial phase shift for inverting  
mode is inconsequential to most IF strip applications. The  
phase of S21 was not shown in the Typical Characteristic  
curves, but is very linear with frequency and may be accu-  
rately modeled as a constant time delay through the ampli-  
fier.  
The Typical Characteristic Curves for the OPA695 show S21  
over a range of signal gains where the external resistors  
have been adjusted to re-optimize flatness at each gain  
setting. Since this is a current feedback op amp, the signal  
bandwidth can be held relatively constant as the desired gain  
setting is changed. The plot of the noninverting bandwidth  
versus gain shows some change in bandwidth versus gain  
(due to parasitic capacitive effects on the inverting node) with  
very little change showing up for the inverting mode of  
operation.  
INPUT RETURN LOSS (S11)  
Input return loss is a measure of how nearly (over frequency)  
the input impedance matches the source impedance. This is  
relatively independent of gain setting for both the noninverting  
and inverting configurations. The Typical Characteristic curves  
show the magnitude of S11 for the circuits of Figures 1 and  
2 through 1GHz (noninverting gain of +8 and inverting gain  
of 8 operation, respectively). Noninverting operation does  
offer much better matching to higher frequencies, with the  
only deviation due to the parasitic input capacitance of the  
input pin. The noninverting input match is simply set by the  
resistor to ground on the noninverting input, since the ampli-  
fier itself shows a very high input impedance. Inverting  
operation is also very good, but rises more quickly due to  
loop gain roll-off effects appearing at the inverting node. The  
inverting mode input match is set by the parallel combination  
of RG and RT in Figure 2, since the inverting amplifier node  
may be considered a virtual ground. A good, fixed-gain, RF  
amplifier would have an input, Voltage Standing Wave Ratio  
(VSWR) < 1.2:1. This corresponds to an S11 of 21dB. The  
OPA695 exceeds this performance through 100MHz for the  
inverting mode of operation, and through 400MHz for the  
noninverting mode.  
Signal gains are most often referred to as V/V in op amp data  
sheets. This is the voltage gain from input to output and is set  
by external resistor ratios. Since the output impedance is set  
by a physical series resistor, the voltage gain to the matched  
load is cut in 1/2 by this resistor divider. The log gain to the  
matched load for the noninverting circuit of Figure 1 is:  
(1)  
RF  
1
2
G+ = 20log  
1+  
dB  
RG  
The log gain to the matched load for the inverting circuit of  
Figure 2 is:  
(2)  
RF  
1
2
G= 20log  
dB  
RG  
The specific resistor values used in Figures 1 and 2 give both  
a maximally flat bandwidth and a 12dB gain to the matched  
load. The design tables at the end of this section summarize  
the required resistor values over a range of desired gains for  
the circuits of Figures 1 and 2.  
OUTPUT RETURN LOSS (S22)  
Output return loss is a measure of how nearly (over fre-  
quency) the output impedance matches the load impedance.  
This is relatively independent of gain setting for both the  
noninverting and inverting configurations. The output match-  
ing impedance, to a first order, is, simply set by adding a  
series resistor to the low impedance output of the op amp.  
As the desired signal gain increases, the achievable band-  
widths will decrease. In the noninverting case, it decreases  
relatively quickly as shown in the Typical Characteristic  
OPA695  
SBOS293B  
15  
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curves. The inverting configuration holds almost constant  
bandwidth (with correctly selected external resistor values)  
until RG reduces to equal 50, and remains at that value to  
satisfy the input impedance matching requirement, with fur-  
ther increases in gain achieved by increasing RF in Figure 2.  
The bandwidth then decreases rapidly as shown by the gain  
of 16V/V plot in the Typical Characteristic curves.  
The maximum frequency of operation given an available  
slew rate and desired peak output swing (at the output pin for  
a sine wave) is:  
Slew Rate  
FMAX  
=
(4)  
2 π Vp(0.707)  
Putting in the 4600V/µs slew rate available in the inverting  
mode of operation and the 4.0V peak output swing at the  
output pin gives a maximum frequency of 259MHz. This is  
the maximum frequency where the 1dB compression would  
be 17dBm at the matched load. Higher useable bandwidths  
are possible at lower output powers, as shown in the Large  
Signal Bandwidth curves. As those graphs show, 7VPP out-  
puts are possible with almost perfect frequency response  
flatness through 100MHz for both non-inverting or inverting  
operation.  
REVERSE ISOLATION (S12)  
Reverse isolation is a measure of how much power injected  
into the output pin makes it back to the source. This is rarely  
specified for an op amp because it is so good. Op amps are  
very nearly uni-directional signal devices. Below 300MHz,  
the noninverting configuration of Figure 1 gives much better  
isolation than the inverting of Figure 2. Both are well below  
40dB isolation through 350MHz.  
TWO-TONE 3rd-ORDER OUTPUT  
INTERMODULATION INTERCEPT (OP3)  
LIMITS TO DYNAMIC RANGE  
The next set of considerations for RF amplifier applications  
are the defined limits to dynamic range. Typical fixed-gain RF  
amplifiers include:  
In narrowband IF strips, each amplifier typically feeds into a  
bandpass filter that attenuates most harmonic distortion  
terms. The most troublesome remaining distortion is the 3rd-  
order, two-tone intermodulations that can fall very close (in  
frequency) to the desired signals and cannot be filtered out.  
If two test frequencies are defined at FO + F and FO F,  
the 3rd-order intermodulation distortion products will fall at  
• –1dB compression (a measure of maximum output power)  
Two-tone, 3rd-order, output intermodulation intercept (a  
measure of achievable spurious-free dynamic range)  
Noise figure (a measure of degradation in signal to noise  
ratio in passing through the amplifier)  
F
O + 3F and FO 3F. If the two test power levels (PT) are  
equal, the OPA695 will produce 3rd-order spurious terms  
(PS) that are at these frequencies and at a power level below  
the test power levels given by:  
1dB COMPRESSION  
The definition for 1dB compression power is that output  
power where the actual power is 1dB less than the input  
power plus the log gain. In classic RF amplifiers, this is  
typically 10dB less than the 3rd-order intercept. That relation-  
ship does not hold for op amps since their intercept is  
considerably improved by loop gain to be far more than 10dB  
higher than the 1dB compression. A simple estimate for  
1dB compression for the OPA695 is the maximum non-slew  
limited output voltage swing available at the matched load  
converted into a power with 1dB added to satisfy the defini-  
tion. For the OPA695 on ±5V supplies, its output will deliver  
approximately ±4.0V at the output pin or ±2.0V at the matched  
load. The conversion from VPP to power (for a sine wave) is:  
P P = 2 OP P  
T
(5)  
(
)
T
S
3
The 3rd-order intercept plot shown in the Typical Character-  
istic curves shows a very high intercept at low frequencies  
that decreases with increasing frequency. This intercept is  
defined at the matched load to allow direct comparison with  
fixed-gain RF amplifiers. To produce a 2VPP total two-tone  
envelope at the matched load, each power level must be  
4dBm at the matched load (1VPP). Using Equation 5, and the  
performance curve for inverting operation, at 50MHz (41.5dBm  
intercept) the 3rd-order spurious will be 2 (41.5 4) = 75dB  
below these 4dBm test tones. This is an exceptionally low  
distortion for an amplifier that only uses 13mA supply current.  
Considerable improvement from this level of performance is  
also possible if the output drives directly into the lighter load  
of an ADC input (see High SFDR Differential ADC driver  
section).  
(3)  
2
VPP  
2 2  
PO dBm = 10log  
(
)
0.001 50Ω  
(
)
This very high intercept versus quiescent power is achieved  
by the high loop gain of the OPA695. This loop gain does,  
however, decrease with frequency, giving the decreasing  
OP3 performance shown in the Typical Characteristics. Ap-  
plication as an IF amplifier through 200MHz is possible with  
output intercepts exceeding 21dBm at 200MHz. Intercept  
performance will vary slightly with gain setting decreasing at  
higher gains (that is, gains greater than the 8V/V, or 12dB,  
gain used in the Typical Characteristic curves) and increas-  
ing at lower gains.  
Converting this 4.0VPP swing at the load to dBm gives  
16dBm; adding 1dB to this (to satisfy the definition) gives a  
1dB compression of 17dBm for the OPA695 operating on  
±5V supplies. This will be a good estimate for frequencies  
that require less than the full slew rate of the OPA695.  
OPA695  
16  
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NOISE FIGURE  
In all cases, exact computed values for resistors are shown—  
in application, pick standard resistor values that are closest  
to those in the tables.  
All fixed-gain RF amplifiers show a very good noise figure  
(typically < 5dB). For broadband amplifiers, this is achieved  
by a low-noise input transistor and an input match set by  
feedback. This feedback greatly reduces the noise figure for  
fixed-gain RF amplifiers, but also makes the input match  
dependent on the load and the output match dependent on  
the source impedance at the input.  
GAIN TO LOAD  
(dB)  
RF  
()  
RG  
()  
NOISE  
FIGURE  
6
478  
468  
458  
446  
433  
419  
402  
384  
363  
340  
314  
284  
252  
215  
174  
159  
134  
113  
96  
81  
68  
57  
48  
40  
33  
27  
21  
16  
12  
9
17.20  
16.55  
15.95  
15.40  
14.91  
14.47  
14.09  
13.76  
13.23  
13.23  
13.03  
12.86  
12.72  
12.60  
12.51  
7
8
The noise figure for an op amp is always higher than for  
fixed-gain RF amplifiers due to the more complex internal  
circuits of an op amp (giving higher input noise voltage and  
current terms). Also, for simple circuits, the input match is set  
resistively. What is gained is an almost perfect I/O imped-  
ance match, much better load isolation, and very high 3rd-  
order intercepts versus quiescent power. These higher noise  
figures can be acceptable if the OPA695 has enough gain  
preceding it in the IF chain.  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
Op amp noise figure equations include at least six terms (see  
the Noise Performance section), due to the external resis-  
tors. As a point of reference, the circuit of Figure 1 has an  
input noise figure of 14dB while the inverting configuration of  
Figure 2 has an input noise figure of 11dB. At higher gains,  
it is typical for the inverting noise figure to be slightly better  
than for an equivalent gain, noninverting configuration. One  
easy way to improve the noise figure for the noninverting  
configuration of the OPA695 is to include a step-up, 1:2 turns  
ratio transformer at the input. This configuration is shown in  
Figure 5.  
TABLE I. Noninverting Wideband Op Amp (Figure 1).  
GAIN TO LOAD  
(dB)  
RF  
()  
RG  
()  
NOISE  
FIGURE  
6
516  
511  
506  
500  
493  
486  
478  
469  
458  
447  
434  
419  
403  
384  
364  
518  
412  
334  
275  
228  
190  
160  
135  
114  
96  
16.34  
15.54  
14.78  
14.07  
13.40  
12.78  
12.21  
11.70  
11.25  
10.85  
10.15  
10.21  
9.96  
7
8
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
Supply decoupling  
not shown.  
+5V  
50Source  
1:2  
DIS  
50Load  
VI  
81  
50Ω  
69  
VO  
OPA695  
200Ω  
58  
48  
9.74  
40  
9.57  
RF  
TABLE II. Noninverting with a 1:2 Input Step-Up Trans-  
former (Figure 5).  
5V  
RG  
GAIN TO LOAD  
(dB)  
OPTIMUM  
RF ()  
RG  
()  
INPUT  
MATCH RT  
NOISE  
FIGURE  
FIGURE 5. IF Amplifier with Improved Noise Figure.  
6
463.27  
454.61  
444.91  
434.07  
421.95  
408.42  
398.11  
446.68  
501.19  
562.34  
630.96  
707.95  
794.33  
891.25  
1000.00  
116  
101  
88  
77  
66  
57  
50  
50  
50  
50  
50  
50  
50  
50  
50  
87  
16.94  
16.06  
15.16  
14.23  
13.24  
12.16  
11.03  
10.92  
10.83  
10.75  
10.67  
10.61  
10.55  
10.49  
10.45  
7
98  
The transformer provides a noiseless voltage gain at the  
expense of higher source impedance for the OPA695  
noninverting input current noise. The input impedance is still  
set to 50by the 200resistor on the transformer second-  
ary. A 1:2 turns ratio transformer will reflect the 200to the  
input side as a 50impedance over the bandwidth of the  
transformer. Using a 1:2 step-up transformer will also reduce  
the required amplifier gain by 1/2 for any particular desired  
overall gain.  
8
114  
9
142  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
199  
380  
Infinite  
Infinite  
Infinite  
Infinite  
Infinite  
Infinite  
Infinite  
Infinite  
Infinite  
Tables I - III summarize the recommended resistor values  
and resulting noise figures over the desired gain setting for  
three circuit options for the OPA695 operated as a precision  
IF amplifier. In each case, RF and RG are adjusted for both  
best bandwidth and to achieve the required gain.  
TABLE III. Inverting Wideband RF Amplifier (Figure 2).  
OPA695  
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SAW FILTER BUFFER  
One common requirement in an IF strip is to buffer the output  
of a mixer with enough gain to recover the insertion loss of  
a narrowband SAW filter. Figure 6 shows one possible  
configuration driving a SAW filter. Figure 7 shows the inter-  
cept at the 50load. Operating in the inverting mode at a  
voltage gain of 8V/V, this circuit provides a 50input match  
using the gain set resistor, has the feedback optimized for  
maximum bandwidth (700MHz in this case), and drives  
through a 50output resistor into the matching network at  
the input of the SAW filter. If the SAW filter gives a 12dB  
insertion loss, a net gain of 0dB to the 50load at the output  
of the SAW (which could be the input impedance of the next  
IF amplifier or mixer) will be delivered in the passband of the  
SAW filter. Using the OPA695 in this application will isolate  
the first mixer from the impedance of the SAW filter and  
provide very low two-tone, 3rd-order spurious levels in the  
SAW filter bandwidth. Inverting operation will give the broad-  
est bandwidth up to a gain of 12V/V (15.6dB). Noninverting  
operation will give higher bandwidth at gain settings higher  
than this, but will also give a slight reduction in intercept and  
Noise Figure performance.  
50  
40  
30  
20  
10  
0
50  
100  
150  
200  
250  
Center Frequency (MHz)  
FIGURE 7. 2-Tone, 3rd-Order Intermodulation Intercept.  
LO BUFFER AMPLIFIER  
The OPA695 may also be used to buffer the Local Oscillator  
(LO) from the mixer(s). Operating at a voltage gain of +2, the  
OPA695 will provide almost perfect load isolation for the LO  
with a net gain of 0dB to the mixer. Applications through  
1.4GHz LOs may be considered, but best operation would be  
for LOs < 1.0GHz at a gain of +2. Gain could also be easily  
provided by the OPA695 to drive higher power levels into the  
mixer. One unique option in using the OPA695 as an LO  
buffer is shown in Figure 8. Since the OPA695 can drive  
multiple output loads, two identical LO signals may be  
delivered to the mixers in a diversity receiver simply by  
tapping the output off through two series 50output resis-  
tors. This circuit is set up for a voltage gain of +2V/V to the  
output pin for a gain of +1V/V (0dB) to the mixers, but could  
easily be adjusted to deliver higher gains as well.  
+12V  
5kΩ  
50Ω  
PO  
Matching  
Network  
OPA695  
5kΩ  
1000pF  
0.1µF  
50Ω  
SAW  
Filter  
50Ω  
Source  
1000pF  
50Ω  
400Ω  
PO  
= 12dB (SAW Loss)  
PI  
PI  
FIGURE 6. IF Amplifier Driving SAW Filter.  
Antenna  
LNA  
IF1  
Diversity Receiver  
Antenna  
Bandpass  
Filter  
LNA  
+5V  
IF2  
50Ω  
50Ω  
Bandpass  
Filter  
DIS  
OPA695  
LO  
50Ω  
RF  
511Ω  
5V  
RG  
511Ω  
Power supply decoupling not shown.  
FIGURE 8. Dual Output LO Buffer.  
18  
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An alternative to this circuit, giving even lower distortion, is a  
differential driver using two OPA695s driving into an output  
transformer. This can be used either to double the available  
line power, or to improve distortion by cutting the required  
output swing in half for each stage. The channel disable  
required by the MCNS specification should be implemented  
by using the PGA disable feature. The MCNS disable speci-  
fication requires that an output impedance match be main-  
tained with the signal channel shut off. The disable feature of  
the OPA695 is intended principally for power savings and  
puts the output and inverting input pins into a high imped-  
ance mode. This will not maintain the required output imped-  
ance matching. Turning off the signal at the input of Figure  
9, while keeping the OPA695 active, will maintain the imped-  
ance matching while putting very little noise on the line. The  
line noise in disable for the circuit of Figure 9 (with the PGA  
source turned off, but still presenting a 75source imped-  
ance) will be a very low 4nV/Hz (157dBm/Hz) due to the  
low input noise of the OPA695.  
WIDEBAND CABLE DRIVING  
APPLICATIONS  
The high slew rate and bandwidth of the OPA695 can be  
used to meet the most demanding cable driving applications.  
CABLE MODEM RETURN PATH DRIVER  
The standard cable modem upstream driver is typically  
required to drive high power over a 5MHz to 65MHz band-  
width while delivering < 50dBc distortion. Highly-integrated  
solutions (including programmable gain stages) often fall  
short of this target due to high losses from the amplifier  
output to the line. The higher gain operating capability of the  
OPA695, along with its very high slew rate, provides a low-  
cost solution for delivering this signal with the required  
spurious-free dynamic range. Figure 9 shows one example  
of using the OPA695 as an upstream driver for a cable  
modem return path. In this case, the input impedance of the  
driver is set to 75by the gain resistor (RG). The required  
input level from the adjustable gain stage is significantly  
reduced by the 15.5dB gain provided by the OPA695. In this  
example, the physical 75output matching resistor, along  
with the 3dB loss in the diplexer, will attenuate the output  
swing by 9dB on the line. In this example, a single +12V  
supply was used to achieve the lowest harmonic distortion  
for the 6VPP output pin voltage through 65MHz. Measured  
performance for this example gave 600MHz small-signal  
bandwidth and < 54dBc distortion through 65MHz for a  
6VPP output pin voltage swing.  
RGB VIDEO LINE DRIVER  
The extremely high bandwidth of the OPA695 operating at a  
gain of +2 will support the fastest RAMDAC outputs for  
applications such as auxiliary monitor driving. The front page  
of this data sheet shows measured performance for a  
0 +1V input square wave at 125MHz. As a general rule,  
the required full-power bandwidth for the amplifier must be at  
least one-half the pixel rate. With its noninverting gain of +2,  
slew rate of 2900V/µs, and a 1.4VPP output pin voltage swing  
for standard RGB video levels, the OPA695 will give a  
Receive Channel  
+12V  
58dBmV  
Supply decoupling  
not shown  
Diplexer  
67dBmV  
DIS  
3dB  
6kΩ  
75Ω  
0.01µF  
75Ω  
20Ω  
OPA695  
6kΩ  
1000pF  
0.1µF  
1000pF  
RG  
75Ω  
RF  
450Ω  
PGA Output  
51.5dBmV  
0.1µF  
1000pF  
FIGURE 9. Cable Modem Upstream Driver.  
OPA695  
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bandwidth of 600MHz, which will then support up to 1.26GHz  
pixel rates. Figure 10 shows an example where three  
OPA695s provide an auxiliary monitor output for a high-  
resolution RGB RAMDAC.  
tary output that is typically discarded into a matching resistor.  
The complementary current output can be used as an aux-  
iliary output if it is inverted, as shown in Figure 11.  
In the circuit of Figure 11, the complementary current output  
is terminated by an equivalent 75impedance (the parallel  
combination of RT and RG) that also provides a current  
division to reduce the signal current through the feedback  
resistor, RF. This allows RF to be increased to a value which  
will hold a flat frequency response. Since the complementary  
current output is essentially an inverted video signal, this  
circuit sets up a white video level at the output of the OPA695  
for zero DAC output current (using the 0.77V DC bias on the  
An alternative circuit that will take advantage of the higher  
inverting slew rate of the OPA695 (4300V/µs) takes the  
complementary current output from the RAMDAC and con-  
verts it to positive video to give a very high, full-power  
bandwidth RGB line driver. This will give sharper pixel edges  
than the circuit of Figure 10. Most high-speed DACs are  
current-steering designs where there is both an output  
current signal that is used for the video, and a complemen-  
Red  
75Ω  
RAMDAC  
Green  
75Ω  
Power supply decoupling not shown.  
+5V  
Blue  
DIS  
75Ω  
20Ω  
75Ω  
OPA695  
RF  
511Ω  
5V  
Addtional  
OPA695  
Stages  
511Ω  
FIGURE 10. Gain of +2, High-Resolution RGB Monitor Output.  
+5V  
Power supply decoupling not shown.  
4.22kΩ  
20Ω  
DIS  
0.77V  
75Ω  
OPA695  
768Ω  
0.1µF  
5V  
RAMDAC  
IO  
RG  
536Ω  
RF  
500Ω  
RT  
86.6Ω  
FIGURE 11. High-Resolution RGB Driver Using DAC Complementary Output Current.  
OPA695  
20  
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noninverting input), then inverts the complementary output  
current to produce a signal that ranges from this 1.4V at zero  
output current down to 0V at maximum output current level  
(assuming a 20mA maximum output current). This will give a  
very wideband (> 800MHz) video signal capability.  
For a 20mA peak output current DAC, the mid-scale current  
of 10mA will give a 2V DC output common-mode operating  
voltage due to the 200resistor to ground at the outputs.  
The total AC impedance at each output is 50, giving a  
±0.5V swing around this 2V common-mode voltage for the  
DAC. These resistors also act as a current divider, sending  
75% of the DAC output current through the feedback resistor  
(464). The blocking capacitor references the OPA695 out-  
put voltage to ground, and turns the unipolar DAC output  
current into a bipolar swing of 0.75 20mA 464= 7VPP at  
each amplifier output. Each output is exactly 180° out-of-  
phase from the other, producing double 7VPP into the match-  
ing resistors. To limit the peak output current and improve  
distortion, the circuit of Figure 12 is set up with a 1.4:1 step-  
down transformer. This reflects the 50load to be 100at  
the primary side of the transformer. For the maximum 14VPP  
swing across the outputs of the two amplifiers, the matching  
resistors will drop this to 7VPP at the input of the transformer,  
then down to 5VPP maximum at the 50load at the output of  
the transformer. This step-down approach reduces the peak  
output current to 14VP/(200) = 70mA.  
ARBITRARY WAVEFORM DRIVER  
The OPA695 may be used as the output stage for moderate  
output power Arbitrary Waveform Driver applications. Driving  
out through a series 50matching resistor into a 50Ω  
matched load will allow up to a 4.0VPP swing at the matched  
load (15dBm) when operating the OPA695 on a ±5V power  
supply. This level of power is available for gains of either ±8  
with a flat response through 100MHz. When interfacing  
directly from a complementary current output DAC, consider  
the circuit of Figure 11, modified for the peak output currents  
of the particular DAC being considered. Where purely  
AC-coupled output signals are required from a complemen-  
tary current output DAC, consider a push-pull output stage  
using the circuit of Figure 12. The resistor values here have  
been calculated for a 20mA peak output current DAC which  
produces up to a 5VPP swing at the matched load (18dBm).  
This approach will give higher power at the load with much  
lower 2nd-harmonic distortion.  
+5V  
Power supply decoupling not shown.  
DIS  
20Ω  
±3.5V  
OPA695  
50Source  
0.01µF  
66.5Ω  
66.5Ω  
464Ω  
50Ω  
1.4:1  
IO  
200Ω  
5V  
DAC  
Differential  
Filter  
+5V  
0.01µF  
464Ω  
50Ω  
IO  
200Ω  
±3.5V  
OPA695  
20Ω  
20mA Peak Output  
DIS  
5V  
FIGURE 12. High Power, Wideband AC-Coupled Arbitrary Waveform Driver.  
OPA695  
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applications to include a blocking capacitor in series with RG.  
This reduces the gain to 1 at low frequency, rising to the AD  
expression shown above at higher frequencies. The  
noninverting input approach of Figure 13 can be used for  
higher gains than the inverting input approach. It will, how-  
ever, have a reduced full-power bandwidth due to the lower  
slew rate of the OPA695 running noninverting vs inverting  
input mode of operation.  
DIFFERENTIAL I/O  
APPLICATIONS  
The OPA695 offers very low 3rd-order distortion terms with  
a dominant 2nd-order distortion for the single amplifier op-  
eration. For the lowest distortion, particularly where differen-  
tial outputs are needed, operating two OPA695s in a differ-  
ential I/O design will suppress these even-order terms, deliv-  
ering extremely low harmonic distortion through high fre-  
quencies and powers. Differential outputs are often preferred  
for high performance ADCs, twisted-pair driving, and mixer  
interfaces. Two basic approaches to differential I/Os are the  
noninverting or inverting configurations. Since the output is  
differential, the signal polarity is somewhat meaningless—  
the noninverting and inverting terminology applies here to  
where the input is brought into the two OPA695s. Each  
approach has its advantages and disadvantages. Figure 13  
shows a basic starting point for non-inverting differential I/O  
applications.  
Various combinations of single-supply or AC-coupled gain  
can also be delivered using the basic circuit of Figure 13.  
Common-mode bias voltages on the two noninverting inputs  
pass on to the output with a gain of 1, since an equal DC  
voltage at each inverting node creates no current through  
RG. This circuit does show a common-mode gain of 1 from  
input to output. The source connection should either remove  
this common-mode signal if undesired (using an input trans-  
former can provide this function), or the common-mode  
voltage at the inputs can be used to set the output common-  
mode bias. If the low common-mode rejection of this circuit  
is a problem, the output interface may also be used to reject  
that common-mode. For instance, most modern differential  
input ADCs reject common-mode signals very well, while a  
line driver application through a transformer will also remove  
the common-mode signal at the secondary of the trans-  
former.  
+VCC  
OPA695  
Figure 14 shows a differential I/O stage configured as an  
inverting amplifier. In this case, the gain resistors (RG)  
become part of the input resistance for the source. This  
provides a better noise performance than the non-inverting  
configuration, but does limit the flexibility in setting the input  
impedance separately from the gain.  
RF  
500Ω  
VCC  
RF  
500Ω  
VI  
VO  
RG  
+VCC  
+VCC  
VCM  
OPA695  
OPA695  
VCC  
RF  
RG  
RG  
500Ω  
VCC  
FIGURE 13. Noninverting Input Differential I/O Amplifier.  
RF  
500Ω  
VI  
VO  
This approach allows for a source termination impedance  
that is independent of the signal gain. For instance, simple  
differential filters may be included in the signal path right up  
to the non-inverting inputs without interacting with the  
gain setting. The differential signal gain for the circuit of  
Figure 13 is:  
OPA695  
VCM  
AD = 1 + 2 RF /RG  
(6)  
VCC  
Since the OPA695 is a current feedback amplifier, its band-  
width is principally controlled with the feedback resistor  
valueFigure 13 shows a typical value of 500. However,  
the differential gain may be adjusted with considerable free-  
dom using just the RG resistor. In fact, RG may be a reactive  
network providing a very isolated shaping to the differen-  
tial frequency response. It is common for AC-coupled  
FIGURE 14. Inverting Input Differential I/O Amplifier.  
The two noninverting inputs provide an easy common-mode  
control input. This is particularly easy if the source is AC-  
coupled through either blocking caps or a transformer. In  
either case, the common-mode input voltages on the two  
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noninverting inputs again have a gain of 1 to the output pins,  
giving particularly easy common-mode control for single-  
supply operation. The OPA695 used in this configuration  
does constrain the feedback to the 500region for best  
frequency response. With RF fixed, the input resistors may be  
adjusted to the desired gain, but will also be changing the  
input impedance as well. The high-frequency common-mode  
gain for this circuit from input to output will be the same as  
for the signal gain. Again, if the source might include an  
undesired common-mode signal, that could be rejected at  
the input using blocking caps (for low-frequency and DC  
common-mode) or a transformer coupling. The differential  
performance plots shown in the Typical Characteristics used  
the configuration of Figure 14 and an input 1:1 transformer.  
The differential signal gain in the circuit of Figure 14 is:  
DESIGN-IN TOOLS  
DEMONSTRATION BOARDS  
Two PC boards are available to assist in the initial evaluation  
of circuit performance using the OPA695 in its two package  
styles. Both of these are available free, as unpopulated PC  
boards delivered with descriptive documentation. The sum-  
mary information for these boards is shown below.  
BOARD  
PART  
LITERATURE  
REQUEST  
NUMBER  
PRODUCT  
PACKAGE  
NUMBER  
OPA695ID  
OPA691IDBV  
SO-8  
SOT23-6  
DEM-OPA68xU  
DEM-OPA6xxN  
MKT-351  
MKT-348  
The board can be requested through the Texas Instruments  
web site (www.ti.com).  
AD = RF /RG  
(7)  
Using this configuration suppresses the 2nd-harmonics, leav-  
ing only 3rd-harmonic terms as the limit to output SFDR. The  
much higher slew rate of the inverting configuration also  
extends the full-power bandwidth and the range of very low  
intermodulation distortion over the performance bandwidth  
available from the circuit of Figure 13. The Typical Charac-  
teristics show that the circuit of Figure 14 operating at an  
AD = 10 can deliver a 16VPP signal with over 500MHz 3dB  
bandwidth. Using Equation 4, this implies a differential output  
slew of 18000V/µsec, or 9000V/µsec at each output. This  
output slew rate is far higher than specified, and probably  
due to the lighter load used in the differential tests.  
OPERATING SUGGESTIONS  
SETTING RESISTOR VALUES TO OPTIMIZE  
BANDWIDTH  
A current-feedback op amp such as the OPA695 can hold an  
almost constant bandwidth over signal gain settings with the  
proper adjustment of the external resistor values. This is  
shown in the Typical Characteristic curves. The small-signal  
bandwidth decreases only slightly with increasing gain. These  
curves also show that the feedback resistor has been changed  
for each gain setting. The resistor values on the inverting  
side of the circuit for a current-feedback op amp can be  
treated as frequency response compensation elements while  
their ratios set the signal gain. Figure 15 shows the analysis  
circuit for the OPA695 small-signal frequency response.  
This inverting input differential configuration is particularly  
suited to very high SFDR converter interfacesspecifically  
narrowband IF channels. The Typical Characteristics show  
the 2-tone, 3rd-order intermodulation intercept exceeding  
45dBm through 90MHz. Although this data was taken with an  
800load, the intercept model appears to work for this  
circuit, simply treating the power level as if it were into 50.  
For example, at 70MHz, the differential Typical Characteristic  
plots show a 48dBm intercept. To predict the 2-tone  
intermodulation SFDR, assuming a 1dB below full-scale  
envelope to a 2VPP maximum differential input converter, the  
test power level would be 9dBm 6dBm = 3dBm for each  
tone. Putting this into the intercept equation, gives:  
The key elements of this current feedback op amp model are:  
α
Buffer gain from the noninverting input to the invert-  
ing input  
RI  
Buffer output impedance  
Feedback error current signal  
iERR  
Z(s) Frequency-dependent, open-loop transimpedance  
gain from iERR to VO  
dBc = 2 (48 3) = 90dBc  
(8)  
VI  
The single-tone distortion data shows approximately 72dB  
SFDR at 70MHz for a 2VPP output into this light 800load.  
A modest post filter after the amplifier can reduce these  
harmonics (2nd at 140MHz, 3rd at 210MHz) to the point  
where the full SFDR to a converter can be in the 85dB range  
for a 70MHz IF operation.  
α
VO  
RI  
Z(S) iERR  
iERR  
RF  
RG  
FIGURE 15. Current-Feedback Transfer Function Analysis  
Circuit.  
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The buffer gain is typically very close to 1.00 and is normally  
neglected from signal gain considerations. It will, however,  
set the CMRR for a single op amp differential amplifier  
configuration. For the buffer gain α < 1.0, the CMRR =  
20 log (1 α).  
the total can be held constant by adjusting RF. Equation 11  
gives an approximate equation for optimum RF over signal  
gain:  
(11)  
RF = 663NGRI  
As the desired signal gain increases, this equation will  
eventually predict a negative RF. A somewhat subjective limit  
to this adjustment can also be set by holding RG to a  
minimum value of 10. Lower values will load both the buffer  
stage at the input and the output stage if RF gets too low,  
actually decreasing the bandwidth. Figure 16 shows the  
recommended RF versus NG for both ±5V and a single +5V  
operation. The optimum target feedback impedance for +5V  
operation used in Equation 8 is 663, while the typical buffer  
output impedance is 32. The values for RF versus gain  
shown here are approximately equal to the values used to  
generate the Typical Characteristic curves. In some cases,  
the values used differ slightly from that shown here, in that  
the values used in the Typical Characteristics are also  
correcting for board parasitics not considered in the simpli-  
fied analysis leading to Equation 11. The values shown in  
Figure 16 give a good starting point for designs where  
bandwidth optimization is desired and a flat frequency re-  
sponse is needed.  
RI, the buffer output impedance, is a critical portion of the  
bandwidth control equation. For the OPA695, it is typically  
about 28for ±5V operation and 31for single +5V opera-  
tion.  
A current-feedback op amp senses an error current in the  
inverting node (as opposed to a differential input error volt-  
age for a voltage-feedback op amp) and passes this on to the  
output through an internal frequency-dependent  
transimpedance gain. The Typical Characteristic curves show  
this open-loop transimpedance response. This is analogous  
to the open-loop voltage gain curve for a voltage-feedback  
op amp. Developing the transfer function for the circuit of  
Figure 18 gives Equation 9:  
(9)  
RF  
α 1+  
RG  
RF + RI 1+  
Z(S)  
VO  
α • NG  
RF + RI NG  
=
=
V
RF  
I
1+  
Z(S)  
RG  
1+  
600  
500  
Where  
RF  
NC = 1+  
RG  
= Noise Gain  
VS = ±5V  
400  
This is written in a loop gain analysis format, where the errors  
arising from a non-infinite open-loop gain are shown in the  
denominator. If Z(s) were infinite over all frequencies, the  
denominator of Equation 9 would reduce to 1, and the ideal  
desired signal gain shown in the numerator would be achieved.  
The fraction in the denominator of Equation 9 determines the  
frequency response. Equation 10 shows this as the loop gain  
equation:  
VS = +5V  
300  
200  
100  
0
0
2
4
6
8
10  
12  
14 16  
18  
20  
Noise Gain (V/V)  
Z(S)  
= Loop Gain  
(10)  
RF + RI NG  
FIGURE 16. Recommended Feedback Resistor vs Noise  
Gain.  
If 20 log (RF + NG RI) were superimposed on the open-  
loop transimpedance plot, the difference between the two  
would be the loop gain at a given frequency. Eventually, Z(s)  
rolls off to equal the denominator of Equation 10, at which  
point the loop gain has reduced to 1 (and the curves have  
intersected). This point of equality is where the amplifier  
closed-loop frequency response given by Equation 9 will  
start to roll off, and is exactly analogous to the frequency at  
which the noise gain equals the open-loop voltage gain for a  
voltage-feedback op amp. The difference here is that the  
total impedance in the denominator of Equation 10 may be  
controlled separately from the desired signal gain (or NG).  
The total impedance presented to the inverting input may be  
used to adjust the closed-loop signal bandwidth. Inserting a  
series resistor between the inverting input and the summing  
junction will increase the feedback impedance (denominator  
of Equation 10), decreasing the bandwidth. The internal  
buffer output impedance for the OPA695 is slightly influ-  
enced by the source impedance looking out of the non-  
inverting input terminal. High source resistors will have the  
effect of increasing RI, decreasing the bandwidth. For those  
single-supply applications which develop a midpoint bias at  
the non-inverting input through high-valued resistors, the  
decoupling capacitor is essential for power-supply ripple  
rejection, non-inverting input noise current shunting, and  
minimizing the high-frequency value for RI in Figure 15.  
The OPA695 is internally compensated to give a maximally  
flat frequency response for RF = 402at NG = 8 on ±5V  
supplies. Evaluating the denominator of Equation 7 (which is  
the feedback transimpedance) gives an optimal target of  
663. As the signal gain changes, the contribution of the  
NG RI term in the feedback transimpedance will change, but  
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Inverting feedback optimization is somewhat complicated by  
the impedance matching requirement at the input, as shown  
in Figure 2. The resistor values shown in Table III should be  
used in this case.  
DRIVING CAPACITIVE LOADS  
One of the most demanding, and yet very common, load  
conditions for an op amp is capacitive loading. Often, the  
capacitive load is the input of an A/D converterincluding  
additional external capacitance which may be recommended  
to improve A/D linearity. A high-speed, high open-loop gain  
amplifier like the OPA695 can be very susceptible to de-  
creased stability and closed-loop response peaking when a  
capacitive load is placed directly on the output pin. When the  
amplifiers open-loop output resistance is considered, this  
capacitive load introduces an additional pole in the signal  
path that can decrease the phase margin. Several external  
solutions to this problem have been suggested. When the  
primary considerations are frequency response flatness, pulse  
response fidelity and/or distortion, the simplest and most  
effective solution is to isolate the capacitive load from the  
feedback loop by inserting a series isolation resistor between  
the amplifier output and the capacitive load. This does not  
eliminate the pole from the loop response, but rather shifts it  
and adds a zero at a higher frequency. The additional zero  
acts to cancel the phase lag from the capacitive load pole,  
thus increasing the phase margin and improving stability.  
OUTPUT CURRENT AND VOLTAGE  
The OPA695 provides output voltage and current capabilities  
that are consistent with driving doubly-terminated 50lines.  
For a 100load at a gain of +8 (see Figure 1), the total load  
is the parallel combination of the 100load and the 456Ω  
total feedback network impedance. This 82load will require  
no more than 45mA output current to support the ±3.7V  
minimum output voltage swing specified for 100loads. This  
is well below the minimum ±90mA specifications.  
The specifications described above, though familiar in the  
industry, consider voltage and current limits separately. In  
many applications, it is the voltage current, or V-I, product  
which is more relevant to circuit operation. Refer to the  
Output Voltage and Current Limitations plot in the Typical  
Characteristic curves. The X and Y axes of this graph show  
the zero-voltage output current limit and the zero-current  
output voltage limit, respectively. The four quadrants provide  
a more detailed view of the OPA695 output drive capabilities.  
Superimposing resistor load lines onto the plot shows the  
available output voltage and current for specific loads.  
The Typical Characteristics show the recommended RS ver-  
sus capacitive load and the resulting frequency response at  
the load. Parasitic capacitive loads greater than 2pF can  
begin to degrade the performance of the OPA695. Long PC  
board traces, unmatched cables, and connections to multiple  
devices can easily cause this value to be exceeded. Always  
consider this effect carefully and add the recommended  
series resistor as close as possible to the OPA695 output pin  
(see Board Layout Guidelines).  
The minimum specified output voltage and current over-  
temperature are set by worst-case simulations at the cold  
temperature extreme. Only at cold startup will the output  
current and voltage decrease to the numbers shown in the  
specification tables. As the output transistors deliver power,  
the junction temperatures will increase, decreasing the VBEs  
(increasing the available output voltage swing) and increas-  
ing the current gains (increasing the available output cur-  
rent). In steady-state operation, the available output voltage  
and current will always be greater than that shown in the  
over-temperature specifications, since the output stage junc-  
tion temperatures will be higher than the minimum specified  
operating ambient.  
DISTORTION PERFORMANCE  
The OPA695 provides good distortion performance into a  
100load on ±5V supplies. Relative to alternative solutions,  
the OPA695 holds much lower distortion at higher frequen-  
cies (> 20MHz). Generally, until the fundamental signal  
reaches very high frequency or power levels, the 2nd-  
harmonic will dominate the distortion with a negligible 3rd-  
harmonic component. Focusing then on the 2nd-harmonic,  
increasing the load impedance improves distortion directly.  
Remember, the total load includes the feedback network. In  
the non-inverting configuration (Figure 1), this is the sum of  
RF + RG, while in the inverting configuration, it is just RF. Also,  
providing an additional supply decoupling capacitor (0.01µF)  
between the supply pins (for bipolar operation) improves the  
2nd-order distortion slightly (3dB to 6dB).  
To maintain maximum output stage linearity, no output short-  
circuit protection is provided. This will not normally be a  
problem, since most applications include a series-matching  
resistor at the output that will limit the internal power dissipa-  
tion if the output side of this resistor is shorted to ground.  
However, shorting the output pin directly to the adjacent  
positive power supply pin will, in most cases, destroy the  
amplifier. If additional short-circuit protection is required,  
consider a small series resistor in the power-supply leads.  
Under heavy output loads, this will reduce the available  
output voltage swing. A 5series resistor in each power-  
supply lead will limit the internal power dissipation to less  
than 1W for an output short circuit while decreasing the  
available output voltage swing only 0.25V for up to 50mA  
desired load currents. Always place the 0.1µF power supply  
decoupling capacitors directly on the supply pins after these  
supply current-limiting resistors.  
In most op amps, increasing the output voltage swing in-  
creases harmonic distortion directly. The Typical Perfor-  
mance Curves show the 2nd-harmonic increasing at a little  
less than the expected 2x rate, while the 3rd-harmonic  
increases at a little less than the expected 3x rate. Where the  
test power doubles, the difference between it and the 2nd  
harmonic decreases less than the expected 6dB, while the  
difference between it and the 3rd decreases by less than the  
expected 12dB.  
OPA695  
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The OPA695 has extremely low 3rd-order harmonic distor-  
tion. This also gives a high 2-tone, 3rd-order intermodulation  
intercept, as shown in the Typical Characteristic curves. This  
intercept curve is defined at the 50load when driven  
through a 50matching resistor to allow direct comparisons  
to RF MMIC devices and is shown for both gains of ±8. There  
is a slight improvement in intercept by operating the OPA695  
in the inverting mode. The output matching resistor attenu-  
ates the voltage swing from the output pin to the load by 6dB.  
If the OPA695 drives directly into the input of a high imped-  
ance device, such as an ADC, this 6dB attenuation is not  
taken. Under these conditions, the intercept will increase by  
a minimum 6dBm.  
ENI  
EO  
OPA695  
RS  
IBN  
ERS  
RF  
4kTRS  
4kTRF  
IBI  
RG  
4kT  
RG  
4kT = 1.6E 20J  
at 290°K  
The intercept is used to predict the intermodulation products  
for two closely-spaced frequencies. If the two test frequen-  
cies, F1 and F2, are specified in terms of average and delta  
frequency, FO = (F1 + F2)/2 and F = |F2 F1|/2, the two 3rd-  
order, close-in spurious tones will appear at FO ±3 F. The  
difference between two equal test-tone power levels and  
these intermodulation spurious power levels is given by  
dBc = 2 (OP3 PO), where OP3 is the intercept taken from  
the Typical Characteristic curve and PO is the power level in  
dBm at the 50load for one of the two closely-spaced test  
frequencies. For example, at 50MHz, gain of 8, the OPA695  
has an intercept of 42dBm at a matched 50load. If the full  
envelope of the two frequencies needs to be 2VPP, this  
requires each tone to be 4dBm. The 3rd-order intermodulation  
spurious tones will then be 2 (42 4) = 76dBc below the  
test-tone power level (72dBm). If this same 2VPP 2-tone  
envelope were delivered directly into the input of an ADC  
without the matching loss or the loading of the 50network,  
the intercept would increase to at least 48dBm. With the  
same signal and gain conditions, but now driving directly into  
a light load, the 3rd-order spurious tones will then be at least  
2 (48 4) = 88dBc below the 4dBm test-tone power levels  
centered on 50MHz. Tests have shown that, in reality, the  
3rd-order spurious levels are much lower due to the lighter  
loading presented by most ADCs.  
FIGURE 17. Op Amp Noise Figure Analysis Model.  
The total output spot-noise voltage can be computed as the  
square root of the sum of all squared output noise voltage  
contributors. Equation 12 shows the general form for the  
output noise voltage using the terms shown in Figure 13.  
(12)  
2
2
2
2
EO  
=
ENI + IBNRS + 4kTRS GN + I R  
+ 4kTRFGN  
(
)
(
)
BI  
F
Dividing this expression by the noise gain (NG = (1+RF/RG))  
will give the equivalent input referred spot-noise voltage at  
the noninverting input as shown in Equation 13:  
(13)  
2
IBIRF  
NG  
4kTRF  
NG  
2
2
EN  
=
ENI + IBNRS + 4kTRS  
+
+
(
)
Evaluating these two equations for the OPA695 circuit and  
component values shown in Figure 1 will give a total output  
spot-noise voltage of 18.7nV/Hz and a total equivalent input  
spot-noise voltage of 2.3nV/Hz. This total input referred  
spot-noise voltage is higher than the 1.8nV/Hz specification  
for the op amp voltage noise alone. This reflects the noise  
added to the output by the inverting current noise times the  
feedback resistor. If the feedback resistor is reduced in high-  
gain configurations (as suggested previously), the total input  
referred voltage noise given by Equation 13 will just ap-  
proach the 1.8nV/Hz of the op amp itself. For example,  
going to a gain of +20 (using RF = 200) will give a total input  
NOISE PERFORMANCE  
The OPA695 offers an excellent balance between voltage  
and current noise terms to achieve low output noise. The  
inverting current noise (22pA/Hz) is lower than most other  
current-feedback op amps while the input voltage noise  
(1.8nV/Hz) is lower than any unity-gain stable, wideband,  
voltage-feedback op amp. This low-input voltage noise was  
achieved at the price of a higher noninverting input current  
noise (18pA/Hz). As long as the AC source impedance  
looking out of the noninverting node is less than 50, this  
current noise will not contribute significantly to the total  
output noise. The op amp input voltage noise and the two  
input current noise terms combine to give low output noise  
under a wide variety of operating conditions. Figure 17  
shows the op amp noise analysis model with all the noise  
terms included. In this model, all noise terms are taken to  
be noise voltage or current density terms in either nV/Hz or  
referred noise of 2.0nV/Hz  
.
For a more complete discussion of op amp noise calculation,  
see TI Application Note, SBOA066, Noise Analysis for High  
Speed Op Amps, available through the TI web site.  
DC ACCURACY AND OFFSET CONTROL  
A current-feedback op amp like the OPA695 provides excep-  
tional bandwidth in high gains, giving fast pulse settling but  
only moderate DC accuracy. The typical specifications show  
an input offset voltage comparable to high-speed voltage-  
feedback amplifiers; however, the two input bias currents are  
pA/Hz  
.
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somewhat higher and are unmatched. Although bias current  
cancellation techniques are very effective with most voltage-  
feedback op amps, they do not generally reduce the output  
DC offset for wideband current-feedback op amps. Since the  
two input bias currents are unrelated in both magnitude and  
polarity, matching the source impedance looking out of each  
input to reduce their error contribution to the output is  
ineffective. Evaluating the configuration of Figure 1, using a  
worst-case +25°C input offset voltage and the two input bias  
currents, gives a worst-case output offset range equal to:  
In normal operation, base current to Q1 is provided through  
the 120kresistor, while the emitter current through the 8kΩ  
resistor sets up a voltage drop that is inadequate to turn on  
the two diodes in Q1s emitter. As VDIS is pulled low,  
additional current is pulled through the 8kresistor, eventu-  
ally turning on these two diodes (180µA). At this point, any  
further current pulled out of VDIS goes through those diodes  
holding the emitter-base voltage of Q1 at approximately 0V.  
This shuts off the collector current out of Q1, turning the  
amplifier off. The supply current in the shutdown mode is only  
that required to operate the circuit of Figure 18.  
±(NG VOS) + (IBN RS/2 NG) ±(IBI RF)  
where NG = non-inverting signal gain  
= ±(8 3.0mV) ± (30µA 258) ±(40260µA)  
= ±24mV ± 1.6mV ±24mV  
When disabled, the output and input nodes go to a high  
impedance state. If the OPA695 is operating in a gain of +1,  
this will show a very high impedance (3pF || 1M) at the  
output and exceptional signal isolation. If operating at a gain  
greater than +1, the total feedback network resistance (RF +  
RG) will appear as the impedance looking back into the  
output, but the circuit will still show very high forward and  
reverse isolation. If configured as an inverting amplifier, the  
input and output will be connected through the feedback  
network resistance (RF + RG), giving relatively poor input to  
output isolation.  
= ±54mV  
A fine-scale output offset null, or DC operating point adjust-  
ment, is often required. Numerous techniques are available  
for introducing DC offset control into an op amp circuit. Most  
simple adjustment techniques do not correct for temperature  
drift.  
POWER SHUTDOWN OPERATION  
THERMAL ANALYSIS  
The OPA695 provides an optional power shutdown feature  
that can be used to reduce system power. If the VDIS control  
pin is left unconnected, the OPA695 operates normally. This  
shutdown is intended only as a power-saving feature. For-  
ward path isolation is very good for small signals. Large  
signal isolation is not ensured. Using this feature to multiplex  
two or more outputs together is not recommended. Large  
signals applied to the shutdown output stages can turn on  
parasitic devices, degrading signal linearity for the desired  
channel.  
The OPA695 does not require external heatsinking for most  
applications. Maximum desired junction temperature will set