PCA9532PW应用文章市场行情现货热卖使用介绍供应商报价-中国IC网-芯三七

Philips Semiconductors

Product data

16-bit I²C LED dimmer

PCA9532

DESCRIPTION

The PCA9532 is a 16-bit I C-bus and SMBus I/O expander

optimized for dimming LEDs in 256 discrete steps for

2

Red/Green/Blue (RGB) color mixing and back light applications.

The PCA9532 contains an internal oscillator with two user

programmable blink rates and duty cycles coupled to the output

PWM. The LED brightness is controlled by setting the blink rate high

enough (> 100 Hz) that the blinking cannot be seen and then using

the duty cycle to vary the amount of time the LED is on and thus the

average current through the LED.

FEATURES

The initial set-up sequence programs the two blink rates/duty cycles

for each individual PWM. From then on, only one command from the

bus master is required to turn individual LEDs ON, OFF, BLINK

RATE 1 or BLINK RATE 2. Based on the programmed frequency

and duty cycle, BLINK RATE 1 and BLINK RATE 2 will cause the

LEDs to appear at a different brightness or blink at periods up to

1.6 seconds. The open drain outputs directly drive the LEDs with

maximum output sink current of 25 mA per bit and 200 mA per

package (100 mA per octal).

• 16 LED drivers (on, off, flashing at a programmable rate)

• 2 selectable, fully programmable blink rates (frequency and duty

cycle) between 0.625 and 160 Hz (6.4 seconds and

6.25 milliseconds)

• 256 brightness steps

• Input/outputs not used as LED drivers can be used as regular

GPIOs

• Internal oscillator requires no external components

• I C-bus interface logic compatible with SMBus

• Internal power-on reset

• Noise filter on SCL/SDA inputs

• Active-LOW reset input

• 16 open drain outputs directly drive LEDs to 25 mA

• Controlled edge rates to minimize ground bounce

• No glitch on power-up

• Supports hot insertion

• Low stand-by current

To blink LEDs at periods greater than 1.6 seconds the bus master

(MCU, MPU, DSP, chipset, etc.) must send repeated commands to

turn the LED on and off as is currently done when using normal I/O

Expanders like the Philips PCF8575 or PCA9555. Any bits not used

for controlling the LEDs can be used for General Purpose Parallel

Input/Output (GPIO) expansion which provides a simple solution

when additional I/O is needed for ACPI power switches, sensors,

pushbuttons, alarm monitoring, fans, etc.

2

The active-LOW hardware reset pin (RESET) and Power-On Reset

(POR) initializes the registers to their default state, all zeroes,

causing the bits to be set HIGH (LED off).

Three hardware address pins on the PCA9532 allow eight devices

to operate on the same bus.

• Operating power supply voltage range of 2.3 V to 5.5 V

• 0 to 400 kHz clock frequency

• ESD protection exceeds 2000 V HBM per JESD22-A114,

150 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101

• Latch-up testing is done to JEDEC Standard JESD78 which

exceeds 100 mA

• Packages offered: SO24, TSSOP24, HVQFN24

ORDERING INFORMATION

PACKAGES

TEMPERATURE RANGE

ORDER CODE

TOPSIDE MARK

DRAWING NUMBER

24-pin plastic SO

24-pin plastic TSSOP

24-pin plastic HVQFN

-40 to +85 °C

PCA9532D

PCA9532PW

PCA9532BS

PCA9532D

PCA9532

9532

SOT137-1

SOT355-1

SOT616-1

Standard packing quantities and other packaging data is available at www.philipslogic.com/packaging.

2

I C is a trademark of Philips Semiconductors Corporation.

2

2003 May 02

Philips Semiconductors

Product data

16-bit I²C LED dimmer

PCA9532

PIN CONFIGURATION — SO, TSSOP

PIN CONFIGURATION — HVQFN

V

1

2

24

23

22

21

20

19

18

17

16

15

14

13

DD

A0

A1

SDA

LED0

18 RESET

1

2

3

4

5

6

3

A2

SCL

LED15

LED14

LED13

LED12

17

16

15

14

13

LED1

LED2

LED3

LED4

4

LED0

LED1

LED2

LED3

LED4

LED5

LED6

LED7

RESET

LED15

LED14

LED13

LED12

5

6

7

8

LED5

LED11

9

LED11

LED10

10

11

12

LED9

LED8

V

SS

TOP VIEW

Figure 2. Pin configuration — HVQFN

SW00931

su01668

Figure 1. Pin configuration — SO, TSSOP

PIN DESCRIPTION

SO, TSSOP

NUMBER

HVQFN

NUMBER

SYMBOL

FUNCTION

Address input 0

1

2

3

22

23

24

A0

A1

A2

Address input 1

Address input 2

4, 5, 6, 7, 8, 9,

10, 11

1, 2, 3, 4, 5, 6,

7, 8

LED0-7

LED driver 0-7

Supply ground

LED driver 8-15

12

9

V

SS

13, 14, 15, 16,

17, 18, 19, 20

10, 11, 12, 13,

14, 15, 16, 17

LED8-15

21

22

23

24

18

19

20

21

RESET

SCL

Active-LOW reset input

Serial clock line

Serial data line

SDA

V

DD

Supply voltage

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2003 May 02

Philips Semiconductors

Product data

16-bit I²C LED dimmer

PCA9532

BLOCK DIAGRAM

A2 A1 A0

PCA9532

INPUT

REGISTER

SCL

SDA

2

INPUT

FILTERS

I C-BUS

LED SELECT (LSx)

REGISTER

CONTROL

0

1

LEDx

POWER-ON

RESET

V

DD

BLINK0

BLINK1

PWM0

REGISTER

PRESCALER 0

REGISTER

RESET

PWM1

REGISTER

PRESCALER 1

REGISTER

OSCILLATOR

V

SS

NOTE: ONLY ONE I/O SHOWN FOR CLARITY

SW02045

Figure 3. Block diagram

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2003 May 02

Philips Semiconductors

Product data

16-bit I²C LED dimmer

PCA9532

If the auto-increment flag (AI) is set, the four low order bits of the

Control Register are automatically incremented after a read or write.

This allows the user to program the registers sequentially. The

contents of these bits will rollover to ‘0000’ after the last register is

accessed.

DEVICE ADDRESSING

Following a START condition the bus master must output the

address of the slave it is accessing. The address of the PCA9532 is

shown in Figure 4. To conserve power, no internal pull-up resistors

are incorporated on the hardware selectable address pins and they

must be pulled HIGH or LOW.

When auto-increment flag is set (AI = 1) and a read sequence is

initiated, the sequence must start by reading a register different from

‘0’ (B3 B2 B1 B0 0 0 0 0 0)

SLAVE ADDRESS

Only the 4 least significant bits are affected by the AI flag.

1

0

A2 A1 A0 R/W

Unused bits must be programmed with zeroes.

FIXED

HARDWARE SELECTABLE

INPUT0 — INPUT REGISTER 1

su01420

bit

I7

0

I6

0

I5

0

I4

0

I3

0

I2

0

I1

0

I0

0

Figure 4. Slave address

The last bit of the address byte defines the operation to be

performed. When set to logic 1 a read is selected while a logic 0

selects a write operation.

default

The INPUT register 1 reflects the state of the device pins (inputs 0

to 7). Writes to this register will be acknowledged but will have no

effect.

INPUT1 — INPUT REGISTER 2

CONTROL REGISTER

bit

I15

0

I14

0

I13

0

I12

0

I11

0

I10

0

I9

0

I8

0

Following the successful acknowledgement of the slave address,

the bus master will send a byte to the PCA9532 which will be stored

in the Control Register. This register can be read and written via the

default

The INPUT register 1 reflects the state of the device pins (inputs 8

to 15). Writes to this register will be acknowledged but will have no

effect.

2

I C-bus.

PSC0 — FREQUENCY PRESCALER 0

0

AI

B3 B2 B1 B0

bit

7

0

6

0

5

0

4

0

3

0

2

0

1

0

REGISTER ADDRESS

default

AUTO-INCREMENT FLAG

RESET STATE: 00h

PSC0 is used to program the period of the PWM output.

SW00898

(PSC0 ) 1)

The period of BLINK0 +

152

Figure 5. Control register

PWM0 — PWM REGISTER 0

CONTROL REGISTER DEFINITION

bit

7

1

6

0

5

0

4

0

3

0

2

0

1

0

REGISTER

NAME

REGISTER

FUNCTION

B3

B2

B1

B0

TYPE

default

INPUT

REGISTER 0

The PWM0 register determines the duty cycle of BLINK0. The

0

INPUT0

READ

outputs are LOW (LED on) when the count is less than the value in

PWM0 and HIGH (LED off) when it is greater. If PWM0 is

programmed with 00h, then the PWM0 output is always HIGH

(LED off).

INPUT

REGISTER 1

0

1

INPUT1

PSC0

PWM0

PSC1

PWM1

LS0

READ

READ/

FREQUENCY

WRITE PRESCALER 0

0

1

0

PWM0

The duty cycle of BLINK0 is:

256

READ/

WRITE

PWM

REGISTER 0

PSC1 — FREQUENCY PRESCALER 1

0

1

bit

7

0

6

0

5

0

4

0

3

0

2

0

1

0

READ/

FREQUENCY

WRITE PRESCALER 1

0

1

0

default

PSC1 is used to program the period of PWM output.

READ/

WRITE

PWM

REGISTER 1

0

1

0

1

(PSC1 ) 1)

The period of BLINK1 +

152

READ/

WRITE

LED 0-3

SELECTOR

0

1

0

PWM1 — PWM REGISTER 1

READ/

WRITE

LED 4-7

SELECTOR

bit

7

1

6

0

5

0

4

0

3

0

2

0

1

0

1

LS1

default

READ/

WRITE

LED 8-11

SELECTOR

1

0

LS2

The PWM1 register determines the duty cycle of BLINK1. The

outputs are LOW (LED on) when the count is less than the value in

PWM1 and HIGH (LED off) when it is greater. If PWM1 is

programmed with 00h, then the PWM1 output is always HIGH

(LED off).

READ/

WRITE

LED 12-15

SELECTOR

1

0

1

LS3

REGISTER DESCRIPTION

PWM1

The duty cycle of BLINK1 is:

256

The lowest 3 bits are used as a pointer to determine which register

will be accessed.

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2003 May 02

Philips Semiconductors

Product data

16-bit I²C LED dimmer

PCA9532

LS0 — LED 0-3 SELECTOR

LS2 — LED 8-11 SELECTOR

LED 11 LED 10

LED 3

LED 2

LED 1

LED 0

LED 9

LED 8

bit

7

6

0

5

4

0

3

2

0

1

0

bit

7

6

0

5

0

4

0

3

0

2

0

1

0

default

0

default

0

LS1 — LED 4-7 SELECTOR

LED 7 LED 6

LS3 — LED 12-15 SELECTOR

LED 15 LED 14

LED 5

LED 4

LED 13

LED 12

bit

7

6

0

5

0

4

0

3

0

2

0

1

0

bit

7

6

0

5

0

4

0

3

0

2

0

1

0

default

0

default

0

The LSx LED select registers determine the source of the LED data.

00 = Output is set Hi-Z (LED off - default)

01 = Output is set LOW (LED on)

10 = Output blinks at PWM0 rate

11 = Output blinks at PWM1 rate

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2003 May 02

Philips Semiconductors

Product data

16-bit I²C LED dimmer

PCA9532

POWER-ON RESET

Start and stop conditions

When power is applied to V , an internal Power-On Reset holds

Both data and clock lines remain HIGH when the bus is not busy. A

HIGH-to-LOW transition of the data line, while the clock is HIGH is

defined as the start condition (S). A LOW-to-HIGH transition of the

data line while the clock is HIGH is defined as the stop condition (P)

(see Figure 7).

DD

the PCA9532 in a reset state until V has reached V

point, the reset condition is released and the PCA9532 registers are

initialized to their default states, all the outputs in the off state.

. At this

DD

POR

EXTERNAL RESET

A reset can be accomplished by holding the RESET pin LOW for a

System configuration

2

minimum of t . The PCA9532 registers and I C state machine will

W

A device generating a message is a transmitter: a device receiving

is the receiver. The device that controls the message is the master

and the devices which are controlled by the master are the slaves

(see Figure 8).

be held in their default state until the RESET input is once again

HIGH.

This input requires a pull-up resistor to V

.

DD

2

CHARACTERISTICS OF THE I C-BUS

2

The I C-bus is for 2-way, 2-line communication between different ICs

or modules. The two lines are a serial data line (SDA) and a serial

clock line (SCL). Both lines must be connected to a positive supply

via a pull-up resistor when connected to the output stages of a device.

Data transfer may be initiated only when the bus is not busy.

Bit transfer

One data bit is transferred during each clock pulse. The data on the

SDA line must remain stable during the HIGH period of the clock

pulse as changes in the data line at this time will be interpreted as

control signals (see Figure 6).

SDA

SCL

data line

stable;

data valid

change

of data

allowed

SW00363

Figure 6. Bit transfer

SDA

SCL

S

P

START condition

STOP condition

SW00365

Figure 7. Definition of start and stop conditions

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2003 May 02

Philips Semiconductors

Product data

16-bit I²C LED dimmer

PCA9532

SDA

SCL

MASTER

SLAVE

TRANSMITTER/

RECEIVER

MASTER

TRANSMITTER/

RECEIVER

2

I C

MULTIPLEXER

MASTER

TRANSMITTER

TRANSMITTER/

RECEIVER

SLAVE

SW00366

Figure 8. System configuration

Acknowledge

The number of data bytes transferred between the start and the stop conditions from transmitter to receiver is not limited. Each byte of eight bits

is followed by one acknowledge bit. The acknowledge bit is a HIGH-level put on the bus by the transmitter whereas the master generates an

extra acknowledge related clock pulse.

A slave receiver which is addressed must generate an acknowledge after the reception of each byte. Also a master must generate an

acknowledge after the reception of each byte that has been clocked out of the slave transmitter. The device that acknowledges has to pull down

the SDA line during the acknowledge clock pulse, so that the SDA line is stable LOW during the HIGH period of the acknowledge related clock

pulse, set-up and hold times must be taken into account.

A master receiver must signal an end of data to the transmitter by not generating an acknowledge on the last byte that has been clocked out of

the slave. In this event, the transmitter must leave the data line HIGH to enable the master to generate a stop condition.

DATA OUTPUT

BY TRANSMITTER

not acknowledge

DATA OUTPUT

BY RECEIVER

acknowledge

SCL FROM

MASTER

1

2

8

9

S

clock pulse for

acknowledgement

START condition

SW00368

2

Figure 9. Acknowledgement on the I C-bus

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2003 May 02

Philips Semiconductors

Product data

16-bit I²C LED dimmer

PCA9532

Bus transactions

1

2

3

4

5

6

7

8

0

9

SCL

slave address

command byte

data to register

DATA 1

SDA

1

0

A2 A1 A0

S

A

0

AI B3 B2 B1 B0

A

start condition

R/W acknowledge

from slave

acknowledge

from slave

acknowledge

from slave

WRITE TO

REGISTER

DATA OUT

FROM PORT

DATA 1 VALID

t

pv

SW02000

Figure 10. WRITE to register

acknowledge

from slave

acknowledge

from slave

acknowledge

from slave

acknowledge

from master

slave address

data from register

0

A2 A1

0

A2 A1

A0

1

0

A0

1

0

1

DATA

S

0

A

0

AI B3 B2 B1 B0

A

S

A

first byte

R/W

auto-increment

register address

if AI = 1

at this moment master-transmitter

becomes master-receiver and

slave-receiver becomes

slave-transmitter

no acknowledge

from master

data from register

NA

P

DATA

last byte

SW01099

Figure 11. READ from register

slave address

data from port

SDA

DATA 1

A

DATA 4

1

0

A2 A1 A0

S

1

A

NA

P

start condition

R/W acknowledge

from slave

acknowledge

from master

no acknowledge

from master

stop

condition

READ FROM

PORT

DATA INTO

PORT

DATA 1

DATA 2

DATA 3

DATA 4

t

ph

t

ps

SW01096

NOTE:

1. This figure assumes the command byte has previously been programmed with 00h.

Figure 12. READ input port register

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2003 May 02

Philips Semiconductors

Product data

16-bit I²C LED dimmer

PCA9532

APPLICATION DATA

5 V

V

LED0

LED1

DD

SDA

SCL

SDA

LED2

LED3

LED4

SCL

RESET

LED5

LED6

LED7

LED8

LED9

2

I C/SMBus MASTER

A2

A1

LED10

LED11

LED12

A0

V

SS

LED13

LED14

LED15

GPIOs

Note: LED0 to LED12 are used as LED drivers

LED13 to LED15 are used as regular GPIOs.

PCA9532

SW02044

Figure 13. Typical application

Minimizing I when the I/O is used to control LEDs

DD

When the I/Os are used to control LEDs, they are normally connected to V through a resistor as shown in Figure 13. Since the LED acts as a

DD

diode, when the LED is off the I/O V is about 1.2 V less than V . The supply current, I , increases as V becomes lower than V and is

IN

DD

IN

DD

specified as ∆I in the DC characteristics table.

DD

Designs needing to minimize current consumption, such as battery power applications, should consider maintaining the I/O pins greater than or

equal to V when the LED is off. Figure 14 shows a high value resistor in parallel with the LED. Figure 15 shows V less than the LED supply

DD

voltage by at least 1.2 V. Both of these methods maintain the I/O V at or above V and prevents additional supply current consumption when

IN

DD

the LED is off.

V

3.3 V

DD

5 V

100 kΩ

LED

V

LED

DD

V

DD

LEDx

SW02087

SW02086

Figure 14. High value resistor in parallel with the LED

Figure 15. Device supplied by a lower voltage

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2003 May 02

Philips Semiconductors

Product data

16-bit I²C LED dimmer

PCA9532

Programming example

The following example will show how to set LED0 to LED3 on. It will

then set LED4 and LED5 to blink at 1 Hz at a 50% duty cycle. LED6

and LED7 will be set to be dimmed at 25% of their brightness (duty

cycle = 25%). LED8 to LED15 will be set to off.

Table 1.

2

I C-bus

Start

S

PCA9532 address with A0-A2 = LOW

PSC0 subaddress + auto-increment

Set prescaler PSC0 to achieve a period of 1 second:

C0h

12h

97h

PSC0 ) 1

Blink period + 1 +

152

PSC0 = 151

Set PWM0 duty cycle to 50%:

80h

00h

40h

PWM0

+ 0.5

256

PWM0 = 128

Set prescaler PCS1 to dim at maximum frequency

Blink period + maximum

PSC1 = 0

Set PWM1 output duty cycle to 25%:

PWM1

256

+ 0.25

PWM1 = 64

Set LED0 to LED3 on

55h

FAh

00h

P

Set LED4 and 5 to PWM0, and LED6 or 7 to PWM1

Set LED8 to LED11 off

Set LED12 to LED15 off

Stop

11

2003 May 02

Philips Semiconductors

Product data

16-bit I²C LED dimmer

PCA9532

ABSOLUTE MAXIMUM RATINGS

In accordance with the Absolute Maximum Rating System (IEC 134)

SYMBOL

PARAMETER

CONDITIONS

MIN

MAX

UNIT

V

DD

Supply voltage

-0.5

6.0

5.5

V

DC voltage on an I/O

V

- 0.5

V

I/O

SS

I

DC output current on an I/O

Supply current

—

25

mA

mW

°C

200

400

+150

+85

P

T

Total power dissipation

Storage temperature range

Operating ambient temperature

—

tot

-65

-40

stg

T

amb

°C

HANDLING

Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is desirable to take

precautions appropriate to handling MOS devices. Advice can be found in Data Handbook IC24 under ”Handling MOS devices”.

DC CHARACTERISTICS

V

= 2.3 to 5.5 V; V = 0 V; T

= -40 to +85 °C; unless otherwise specified. TYP at 3.3 V and 25 °C.

DD

SS

amb

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNIT

Supplies

V

Supply voltage

Supply current

2.3

—

5.5

V

DD

Operating mode; V = 5.5 V; no load;

DD

I

—

350

550

µA

DD

V = V or V ; f = 100 kHz

I

DD

SS SCL

Standby mode; V = 5.5 V; no load;

DD

I

stb

Standby current

—

2.1

5.0

µA

V = V or V ; f = 0 kHz

I

DD

SS SCL

Standby mode; V = 5.5 V; Every

DD

∆I

Additional standby current

Power-on reset voltage

—

2

mA

V

DD

LED I/O at V = 4.3 V; f

= 0 kHz

IN

SCL

V

POR

V

DD

= 3.3 V; no load; V = V or V

SS

1.7

2.2

I

DD

Input SCL; input/output SDA

V

LOW-level input voltage

HIGH-level input voltage

LOW-level output current

Leakage current

-0.5

—

0.3 V

V

IL

IH

DD

V

0.7 V

3

5.5

—

+1

5

DD

I

OL

V

= 0.4V

6.5

—

mA

µA

pF

OL

I

L

V = V = V

I

-1

DD

SS

C

Input capacitance

V = V

I

—

4.4

I

I/Os

V

LOW-level input voltage

HIGH-level input voltage

-0.5

2.0

9

—

2.6

0.8

5.5

—

1

V

IL

V

IH

V

OL

V

OL

V

OL

V

OL

V

OL

V

OL

V

DD

= 0.4 V; V = 2.3 V; Note 1

mA

µA

pF

DD

= 0.4 V; V = 3.0 V; Note 1

12

15

20

25

-1

DD

= 0.4 V; V = 5.0 V; Note 1

DD

I

OL

LOW-level output current

= 0.7 V; V = 2.3 V; Note 1

DD

= 0.7 V; V = 3.0 V; Note 1

DD

= 0.7 V; V = 5.0 V; Note 1

DD

I

L

Input leakage current

= 3.6 V; V = 0 or V

DD

I

C

Input/output capacitance

—

5

IO

Select Inputs A0, A1, A2 / RESET

V

LOW-level input voltage

HIGH-level input voltage

Input leakage current

Input capacitance

-0.5

2.0

-1

—

0.8

5.5

1

V

IL

V

I

IH

—

µA

pF

LI

C

V = V

I SS

—

2.3

5

I

NOTE:

1. Each I/O must be externally limited to a maximum of 25 mA and each octal (LED0-LED7 and LED8-LED15) must be limited to a maximum

current of 100 mA for a device total of 200 mA.

12

2003 May 02

Philips Semiconductors

Product data

16-bit I²C LED dimmer

PCA9532

AC SPECIFICATIONS

STANDARD MODE

FAST MODE

I C-BUS

2

I C-BUS

SYMBOL

PARAMETER

UNITS

MIN

0

MAX

100

—

MIN

MAX

f

t

Operating frequency

0

400

—

kHz

µs

ns

µs

ns

SCL

Bus free time between STOP and START conditions

Hold time after (repeated) START condition

Repeated START condition set-up time

Setup time for STOP condition

4.7

4.0

4.7

4.0

0

1.3

BUF

t

—

0.6

—

HD;STA

t

—

0.6

—

SU;STA

—

0.6

—

SU;STO

t

Data in hold time

—

0

—

HD;DAT

VD;ACK

2

t

Valid time for ACK condition

—

600

1500

—

600

—

3

t

(L)

Data out valid time

—

VD;DAT

3

t

(H)

Data out valid time

—

VD;DAT

t

Data set-up time

250

4.7

4.0

—

100

SU;DAT

t

Clock LOW period

Clock HIGH period

Clock/Data fall time

Clock/Data rise time

—

1.3

—

LOW

t

—

0.6

—

HIGH

1

t

F

300

1000

50

20 + 0.1 C

—

300

50

b

t

R

—

b

t

Pulse width of spikes that must be suppressed by the

input filters

—

SP

Port Timing

t

Output data valid

—

100

1

200

—

100

1

200

—

ns

µs

PV

PS

Input data set-up time

Input data hold time

—

PH

Reset

t

Reset pulse width

Reset recovery time

Time to reset

10

0

—

10

0

—

ns

W

t

REC

4,5

RESET

t

400

NOTES:

1. C = total capacitance of one bus line in pF.

b

2. t

= time for Acknowledgement signal from SCL LOW to SDA (out) LOW.

VD;ACK

3. t

= minimum time for SDA data out to be valid following SCL LOW.

VD;DAT

4. Resetting the device while actively communicating on the bus may cause glitches or errant STOP conditions.

5. Upon reset, the full delay will be the sum of t and the RC time constant of the SDA bus.

RESET

13

2003 May 02

Philips Semiconductors

Product data

16-bit I²C LED dimmer

PCA9532

+20%

+10%

MAX

0%

PERCENT

VARIATION

AVG

-10%

-20%

-30%

-40%

MIN

-40

0

+25

+70

+85

TEMPERATURE

(°C)

SW01085

Figure 16. Typical frequency variation over process at V = 2.3 V to 3.0 V

DD

+20%

+10%

MAX

0%

PERCENT

VARIATION

AVG

MIN

-10%

-20%

-30%

-40%

-40

0

+25

+70

+85

TEMPERATURE

(°C)

SW01086

Figure 17. Typical frequency variation over process at V = 3.0 V to 5.5 V

DD

14

2003 May 02

Philips Semiconductors

Product data

16-bit I²C LED dimmer

PCA9532

START

ACK OR READ CYCLE

SCL

SDA

30%

t

REC

RESET

50%

t

REC

t

W

t

REC

50%

LEDx

LED OFF

SW01087

Figure 18. Definition of RESET timing

SDA

t

R

t

F

t

SP

HD;STA

t

LOW

BUF

SCL

t

SU;STO

HD;STA

SU;STA

t

SU;DAT

HD;DAT

HIGH

P

S

Sr

P

SU00645

Figure 19. Definition of timing

15

2003 May 02

Philips Semiconductors

Product data

16-bit I²C LED dimmer

PCA9532

SO24: plastic small outline package; 24 leads; body width 7.5 mm

SOT137-1

16

2003 May 02

Philips Semiconductors

Product data

16-bit I²C LED dimmer

PCA9532

TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm

SOT355-1

17

2003 May 02

Philips Semiconductors

Product data

16-bit I²C LED dimmer

PCA9532

HVQFN24: plastic thermal enhanced very thin quad flat package; no leads; 24 terminals;

body 4 x 4 x 0.85 mm

SOT616-1

18

2003 May 02

Philips Semiconductors

Product data

16-bit I²C LED dimmer

PCA9532

REVISION HISTORY

Rev

Date

Description

_2

20030502

Product data (9397 750 11459); ECN 853-2398 29860 dated 24 April 2003.

Supersedes data of 26 February 2003 (9397 750 10874).

Modifications:

• Correction to voltage in typical application drawing

• Update note on maximum current per bit and per device

• Adjust minimum and maximum curves to 15% on frequency variation graphs.

Product data (9397 750 10874); ECN 853-2398 29297 of 12 December 2002.

_1

20030226

19

2003 May 02

Philips Semiconductors

Product data

16-bit I²C LED dimmer

PCA9532

2

Purchase of Philips I C components conveys a license under the Philips’ I C patent

2

to use the components in the I C system provided the system conforms to the

I C specifications defined by Philips. This specification can be ordered using the

2

code 9398 393 40011.

Data sheet status

Product

status

Definitions

[1]

Level

Data sheet status

[2] [3]

I

Objective data

Development

This data sheet contains data from the objective specification for product development.

Philips Semiconductors reserves the right to change the specification in any manner without notice.

II

Preliminary data

Qualification

Production

This data sheet contains data from the preliminary specification. Supplementary data will be published

at a later date. Philips Semiconductors reserves the right to change the specification without notice, in

order to improve the design and supply the best possible product.

III

Product data

This data sheet contains data from the product specification. Philips Semiconductors reserves the

right to make changes at any time in order to improve the design, manufacturing and supply. Relevant

changes will be communicated via a Customer Product/Process Change Notification (CPCN).

[1] Please consult the most recently issued data sheet before initiating or completing a design.

[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL

http://www.semiconductors.philips.com.

[3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.

Definitions

Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see

the relevant data sheet or data handbook.

Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting

values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given

in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no

representation or warranty that such applications will be suitable for the specified use without further testing or modification.

Disclaimers

Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be

expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree

to fully indemnify Philips Semiconductors for any damages resulting from such application.

Right to make changes — Philips Semiconductors reserves the right to make changes in the products—including circuits, standard cells, and/or software—described

or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated

via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys

no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent,

copyright, or mask work right infringement, unless otherwise specified.

 Koninklijke Philips Electronics N.V. 2003

Contact information

For additional information please visit

http://www.semiconductors.philips.com.

Fax: +31 40 27 24825

Date of release: 05-03

For sales offices addresses send e-mail to:

sales.addresses@www.semiconductors.philips.com.

Document order number:

9397 750 11459

Philips

Semiconductors

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2003 May 02

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