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  • 北京元坤伟业科技有限公司

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  • 新到现货、一手货源、当天发货、价格低于市场
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产品型号UCC2808AQDR-2Q1的概述

UCC2808AQDR-2Q1芯片概述 UCC2808AQDR-2Q1是一款高性能的双相升压(Boost)和降压(Buck)控制器,广泛应用于各种电源管理设计中,尤其是在多输出电源中。该芯片设计用于满足现代电力转换的高效率、低待机功耗和高密度的需求。它集成了两个控制环路,既能够处理电压模式控制,也能处理电流模式控制,使其在不同的应用情境中具有出色的适应性。 UCC2808AQDR-2Q1支持宽输入电压范围,从18V到100V,并且其输出电压可以通过外部元件进行灵活调整。这使得它在多种应用中都显示出极大的灵活性,比如电机驱动、电源适配器、电池管理系统等。此外,该芯片具有自恢复功能,可以在发生过载或短路时自动调整自身工作状态。 UCC2808AQDR-2Q1详细参数 1. 工作电压范围:输入电压范围为18V至100V;输出电压可调。 2. 工作频率:典型工作频率在250kHz至500kHz...

产品型号UCC2808AQDR-2Q1的Datasheet PDF文件预览

ꢀꢁꢁ ꢂ ꢃꢄ ꢃ ꢅ ꢆꢇꢈ ꢇ ꢉ ꢀꢁꢁ ꢂ ꢃꢄ ꢃꢅ ꢆꢂ ꢈ ꢇ  
ꢊ ꢋ ꢌ ꢍꢋ ꢌ ꢎꢏ ꢁꢀꢏ ꢏꢎꢐꢑ ꢒ ꢋꢓ ꢎ ꢍꢀꢔ ꢕꢆꢍ ꢀꢊ ꢊ ꢍ ꢌꢒ  
SGLS183 − AUGUST 2003  
D
Qualification in Accordance With  
AEC-Q100  
D
On-Chip Error Amplifier With 2-MHz Gain  
Bandwidth Product  
D
Qualified for Automotive Applications  
D
On Chip VDD Clamping  
D
Customer-Specific Configuration Control  
Can Be Supported Along With  
Major-Change Approval  
D
Output Drive Stages Capable of 500-mA  
Peak-Source Current, 1-A Peak-Sink  
Current  
D PACKAGE  
(TOP VIEW)  
D
ESD Protection Exceeds 1500 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
1
2
3
4
8
7
6
5
VDD  
COMP  
FB  
D
D
Dual Output Drive Stages in Push-Pull  
Configuration  
OUTA  
OUTB  
GND  
CS  
RC  
Current Sense Discharge Transistor to  
Improve Dynamic Response  
D
D
D
D
130-µA Typical Starting Current  
1-mA Typical Run Current  
Operation to 1 MHz  
PW PACKAGE  
(TOP VIEW)  
1
8
7
6
5
OUTA  
VDD  
COMP  
FB  
OUTB  
GND  
RC  
Internal Soft Start  
2
3
4
Contact factory for details. Q100 qualification data available on  
request.  
CS  
description  
The UCC2808A is a family of BiCMOS push-pull, high-speed, low-power, pulse-width modulators. The  
UCC2808A contains all of the control and drive circuitry required for off-line or dc-to-dc fixed frequency  
current-mode switching power supplies with minimal external parts count.  
The UCC2808A dual output drive stages are arranged in a push-pull configuration. Both outputs switch at half  
the oscillator frequency using a toggle flip-flop. The dead time between the two outputs is typically 60 ns to  
200 ns depending on the values of the timing capacitor and resistors, thus limiting each output stage duty cycle  
to less than 50%.  
The UCC2808A family offers a variety of package options and choice of undervoltage lockout levels. The family  
has UVLO thresholds and hysteresis options for off-line and battery powered systems. Thresholds are shown  
in the ordering information table.  
The UCC2808A is an enhanced version of the UCC2808 family. The significant difference is that the A versions  
feature an internal discharge transistor from the CS pin to ground, which is activated each clock cycle during  
the oscillator dead time. The feature discharges any filter capacitance on the CS pin during each cycle and helps  
minimize filter capacitor values and current sense delay.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
ꢍꢏ ꢋ ꢓꢀ ꢁ ꢑꢖ ꢋ ꢐ ꢓ ꢅꢑꢅ ꢗꢘ ꢙ ꢚꢛ ꢜ ꢝꢞ ꢗꢚꢘ ꢗꢟ ꢠꢡ ꢛ ꢛ ꢢꢘꢞ ꢝꢟ ꢚꢙ ꢣꢡꢤ ꢥꢗꢠ ꢝꢞ ꢗꢚꢘ ꢦꢝ ꢞꢢ ꢧ  
ꢍꢛ ꢚ ꢦꢡꢠ ꢞ ꢟ ꢠ ꢚꢘ ꢙꢚ ꢛ ꢜ ꢞ ꢚ ꢟ ꢣꢢ ꢠ ꢗꢙ ꢗꢠꢝ ꢞꢗ ꢚꢘꢟ ꢣꢢ ꢛ ꢞꢨ ꢢ ꢞꢢ ꢛ ꢜꢟ ꢚꢙ ꢑꢢꢩ ꢝꢟ ꢖꢘꢟ ꢞꢛ ꢡꢜ ꢢꢘꢞ ꢟ  
ꢟ ꢞ ꢝ ꢘꢦ ꢝ ꢛꢦ ꢪ ꢝ ꢛꢛ ꢝ ꢘ ꢞꢫꢧ ꢍꢛ ꢚ ꢦꢡꢠ ꢞꢗꢚꢘ ꢣꢛ ꢚꢠ ꢢꢟ ꢟꢗ ꢘꢬ ꢦꢚꢢ ꢟ ꢘꢚꢞ ꢘꢢ ꢠꢢ ꢟꢟ ꢝꢛ ꢗꢥ ꢫ ꢗꢘꢠ ꢥꢡꢦ ꢢ  
ꢞ ꢢ ꢟ ꢞꢗ ꢘꢬ ꢚꢙ ꢝ ꢥꢥ ꢣꢝ ꢛ ꢝ ꢜ ꢢ ꢞ ꢢ ꢛ ꢟ ꢧ  
Copyright 2003 Texas Instruments Incorporated  
1
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ꢊ ꢋꢌ ꢍꢋꢌ ꢎꢏ ꢁ ꢀꢏ ꢏꢎ ꢐꢑ ꢒꢋ ꢓꢎ ꢍ ꢀꢔ ꢕꢆꢍꢀ ꢊꢊ ꢍꢌ ꢒ  
SGLS183 − AUGUST 2003  
ORDERING INFORMATION  
UVLO  
Option  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
T
A
PACKAGE  
SOIC (D)  
Tape and reel  
Tape and reel  
Tape and reel  
Tape and reel  
UCC2808AQDR−1Q1  
UCC2808AD-1Q1  
2808A1  
−40°C to 125°C  
12.5 V/8.3 V  
4.3 V/4.1 V  
TSSOP (PW)  
SOIC (D)  
UCC2808AQPWR−1Q1  
UCC2808AQDR−2Q1  
UCC2808AD-2Q1  
2808A2  
−40°C to 125°C  
UCC2808AQPWR−2Q1  
TSSOP (PW)  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available  
at www.ti.com/sc/package.  
Product Preview.  
block diagram  
FB  
2
COMP  
1
CS  
3
8
7
VDD  
OVERCURRENT  
COMPARATOR  
22 k  
PEAK CURRENT  
COMPARATOR  
14 V  
0.75 V  
2.0 V  
0.5 V  
2.2 V  
S
OUTA  
VDD OK  
OSCILLATOR  
Q
Q
PWM  
LATCH  
R
S
R
1.2R  
Q
Q
S
Q
R
VDD−1 V  
T
PWM  
COMPARATOR  
VDD  
0.5 V  
R
SOFT START  
6
5
OUTB  
GND  
VOLTAGE  
REFERENCE  
SLOPE = 1 V/ms  
4
Note: Pinout shown is for SOIC package. TSSOP pinout is different.  
RC  
UDG-00097  
2
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ꢊ ꢋ ꢌ ꢍꢋ ꢌ ꢎꢏ ꢁꢀꢏ ꢏꢎꢐꢑ ꢒ ꢋꢓ ꢎ ꢍꢀꢔ ꢕꢆꢍ ꢀꢊ ꢊ ꢍ ꢌꢒ  
SGLS183 − AUGUST 2003  
}  
absolute maximum ratings over operating free-air temperature (unless otherwise noted)  
Supply voltage (IDD 10 mA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 V  
Supply current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA  
OUTA/OUTB source current (peak) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 A  
OUTA/OUTB sink current (peak) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.0 A  
Analog inputs (FB, CS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to VDD 0.3 V, not to exceed 6 V  
Power dissipation at T = 25°C (D package) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 650 mW  
A
Power dissipation at T = 25°C (PW package) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400 mW  
A
stg  
Storage temperature, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to150°C  
Junction temperature, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −55°C to 150°C  
Lead temperature (soldering, 10 sec.) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300°C  
J
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
Currents are positive into, negative out of the specified terminal. Consult Packaging Section of the Power Supply Control Data Book (TI Literature  
Number SLUD003) for thermal limitations and considerations of packages.  
electrical characteristics, T = −40°C to 125°C for the UCC2808AQ-x, VDD = 10 V (see Note 6), 1-µF  
A
capacitor from VDD to GND, R = 22 k, C = 330 pF T = T , (unless otherwise noted)  
A
J
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX UNITS  
Oscillator Section  
Oscillator frequency  
175  
194  
0.5  
213  
kHz  
V/V  
Oscillator amplitude/VDD  
See Note 1  
0.44  
0.56  
NOTES: 1. Measured at RC. Signal amplitude tracks VDD.  
6. For UCCx808A−1, set VDD above the start threshold before setting at 10 V.  
3
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ꢊ ꢋꢌ ꢍꢋꢌ ꢎꢏ ꢁ ꢀꢏ ꢏꢎ ꢐꢑ ꢒꢋ ꢓꢎ ꢍ ꢀꢔ ꢕꢆꢍꢀ ꢊꢊ ꢍꢌ ꢒ  
SGLS183 − AUGUST 2003  
electrical characteristics, T = −40°C to 125°C for the UCC2808AQ-x, VDD = 10 V (see Note 6), 1-µF  
A
capacitor from VDD to GND, R = 22 k, C = 330 pF T = T , (unless otherwise noted)  
A
J
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX UNITS  
Error Amplifier Section  
Input voltage  
COMP = 2 V  
1.95  
–1  
2
2.05  
1
V
Input bias current  
Open loop voltage gain  
COMP sink current  
COMP source current  
PWM Section  
µA  
dB  
mA  
mA  
60  
80  
2.5  
FB = 2.2 V,  
FB = 1.3 V,  
COMP = 1 V  
0.3  
–0.2  
COMP = 3.5 V  
–0.5  
Maximum duty cycle  
Minimum duty cycle  
Current Sense Section  
Gain  
Measured at OUTA or OUTB  
COMP = 0 V  
48  
49  
50  
0
%
%
See Note 2  
1.9  
2.2  
0.5  
2.5  
0.55  
200  
V/V  
V
Maximum input signal  
CS to output delay  
CS source current  
CS sink current  
COMP = 5 V  
See Note 3  
CS from 0 mV to 600 mV  
0.45  
COMP = 3.5 V,  
100  
ns  
nA  
mA  
V
−200  
4
CS = 0.5 V,  
CS = 0 V  
RC = 5.5 V  
See Note 7  
10  
0.75  
0.8  
Over current threshold  
COMP to CS offset  
Output Section  
OUT low level  
0.65  
0.35  
0.85  
1.2  
V
I = 100 mA  
I = −50 mA,  
0.5  
0.5  
25  
1.1  
1
V
V
OUT high level  
VDD – OUT  
See Note 6  
Rise time  
C
C
= 1 nF  
= 1 nF  
60  
60  
ns  
ns  
L
L
Fall time  
25  
Undervoltage Lockout Section  
UCCx808A−1  
UCCx808A−2  
UCCx808A−1  
UCCx808A−2  
UCCx808A−1  
UCCx808A−2  
11.5  
4.1  
7.6  
3.9  
3.5  
0.1  
12.5  
4.3  
8.3  
4.1  
4.2  
0.2  
13.5  
4.5  
9
V
V
V
V
V
V
Start threshold  
Minimum operating voltage after start  
Hysteresis  
4.3  
5.1  
0.3  
Soft Start Section  
COMP rise time  
FB = 1.8 V,  
Rise from 0.5 V to 4 V  
3.5  
20  
ms  
Overall Section  
Startup current  
VDD < start threshold  
130  
1
260  
2
µA  
mA  
V
Operating supply current  
VDD zener shunt voltage  
FB = 0 V,  
IDD = 10 mA  
COMP  
CS = 0 V  
See Note 4  
See Note 5 and 6  
13  
14  
15  
DV  
NOTES: 2. Gain is defined by: A +  
,
0 V 0.4 V.  
CS  
DV  
CS  
3. Parameter measured at trip point of latch with FB at 0 V.  
4. Start threshold and zener shunt threshold track one another.  
5. Does not include current in the external oscillator network.  
6. For UCC2808A−1, set VDD above the start threshold before setting at 10 V.  
7. The internal current sink on the CS pin is designed to discharge an external filter capacitor. It is not intended to be a dc sink path.  
4
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ꢊ ꢋ ꢌ ꢍꢋ ꢌ ꢎꢏ ꢁꢀꢏ ꢏꢎꢐꢑ ꢒ ꢋꢓ ꢎ ꢍꢀꢔ ꢕꢆꢍ ꢀꢊ ꢊ ꢍ ꢌꢒ  
SGLS183 − AUGUST 2003  
pin assignments  
COMP: COMP is the output of the error amplifier and the input of the PWM comparator. The error amplifier in  
the UCC2808A is a true low-output impedance, 2-MHz operational amplifier. As such, the COMP pin can both  
source and sink current. However, the error amplifier is internally current limited, so that zero duty cycle can be  
externally forced by pulling COMP to GND.  
The UCC2808A family features built-in full-cycle soft start. Soft start is implemented as a clamp on the maximum  
COMP voltage.  
CS: The input to the PWM, peak current, and overcurrent comparators. The overcurrent comparator is only  
intended for fault sensing. Exceeding the overcurrent threshold will cause a soft start cycle. An internal MOSFET  
discharges the current sense filter capacitor to improve dynamic performance of the power converter.  
FB: The inverting input to the error amplifier. For best stability, keep FB lead length as short as possible and  
FB stray capacitance as small as possible.  
GND: Reference ground and power ground for all functions. Due to high currents, and high frequency operation  
of the UCC2808A, a low impedance circuit board ground plane is highly recommended.  
OUTA and OUTB: Alternating high current output stages. Both stages are capable of driving the gate of a power  
MOSFET. Each stage is capable of 500-mA peak-source current, and 1-A peak-sink current.  
The output stages switch at half the oscillator frequency, in a push-pull configuration. When the voltage on the  
RC pin is rising, one of the two outputs is high, but during fall time, both outputs are off. This dead time between  
the two outputs, along with a slower output rise time than fall time, insures that the two outputs can not be on  
at the same time. This dead time is typically 60 ns to 200 ns and depends upon the values of the timing capacitor  
and resistor.  
The high-current-output drivers consist of MOSFET output devices, which switch from VDD to GND. Each  
output stage also provides a very low impedance to overshoot and undershoot. This means that in many cases,  
external-schottky-clamp diodes are not required.  
RC: The oscillator programming pin. The UCC2808A’s oscillator tracks VDD and GND internally, so that  
variations in power supply rails minimally affect frequency stability. Figure 1 shows the oscillator block diagram.  
Only two components are required to program the oscillator: a resistor (tied to the VDD and RC), and a capacitor  
(tied to the RC and GND). The approximate oscillator frequency is determined by the simple formula:  
1.41  
RC  
f
+
OSCILLATOR  
where frequency is in Hz, resistance in Ohms, and capacitance in Farads. The recommended range of timing  
resistors is between 10 kand 200 kand range of timing capacitors is between 100 pF and 1000 pF. Timing  
resistors less than 10 kshould be avoided.  
For best performance, keep the timing capacitor lead to GND as short as possible, the timing resistor lead from  
VDD as short as possible, and the leads between timing components and RC as short as possible. Separate  
ground and VDD traces to the external timing network are encouraged.  
5
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ꢊꢊ  
SGLS183 − AUGUST 2003  
pin assignments (continued)  
RC  
4
1.41  
RC  
FREQUENCY =  
VDD  
2
(APPROXIMATE  
FREQUENCY)  
S
R
Q
OSCILLATOR  
OUTPUT  
0.2 V  
UDG-00095  
Figure 1. Block Diagram for Oscillator  
NOTE A: The oscillator generates a sawtooth waveform on RC. During the RC rise time, the output stages alternate on time, but both stages are  
off during the RC fall time. The output stages switch a 1/2 the oscillator frequency, with ensured duty cycle of < 50% for both outputs.  
VDD: The power input connection for this device. Although quiescent VDD current is very low, total supply  
current will be higher, depending on OUTA and OUTB current, and the programmed oscillator frequency. Total  
VDD current is the sum of quiescent VDD current and the average OUT current. Knowing the operating  
frequency and the MOSFET gate charge (Qg), average OUT current can be calculated from:  
I
+ Q   F, where F is frequency  
g
OUT  
To prevent noise problems, bypass VDD to GND with a ceramic capacitor as close to the chip as possible along  
with an electrolytic capacitor. A 1-µF decoupling capacitor is recommended.  
APPLICATION INFORMATION  
A 200-kHz push-pull application circuit with a full-wave rectifier is shown in Figure 2. The output, V , provides  
O
5 V at 50 W maximum and is electrically isolated from the input. Since the UCC2808A is a peak-current-mode  
controller the 2N2907 emitter following amplifier (buffers the CT waveform) provides slope compensation which  
is necessary for duty ratios greater than 50%. Capacitor decoupling is very important with a single ground IC  
controller, and a 1 µF is suggested as close to the IC as possible. The controller supply is a series RC for start-up,  
paralleled with a bias winding on the output inductor used in steady state operation.  
Isolation is provided by an optocoupler with regulation done on the secondary side using the TL431 adjustable  
precision shunt regulator. Small signal compensation with tight voltage regulation is achieved using this part  
on the secondary side. Many choices exist for the output inductor depending on cost, volume, and mechanicall  
strength. Several design options are iron powder, molypermalloy (MPP), or a ferrite core with an air gap as  
shown here. The main power transformer has a Magnetics Inc. ER28 size core made of P material for efficient  
operation at this frequency and temperature. The input voltage may range from 36 V dc to 72 V dc.  
6
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ꢊ ꢋ ꢌ ꢍꢋ ꢌ ꢎꢏ ꢁꢀꢏ ꢏꢎꢐꢑ ꢒ ꢋꢓ ꢎ ꢍꢀꢔ ꢕꢆꢍ ꢀꢊ ꢊ ꢍ ꢌꢒ  
SGLS183 − AUGUST 2003  
APPLICATION INFORMATION  
UDG-00096  
Figure 2. Typical Application Diagram: 48-V In, 5-V, 50-W Output  
7
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ꢊ ꢋꢌ ꢍꢋꢌ ꢎꢏ ꢁ ꢀꢏ ꢏꢎ ꢐꢑ ꢒꢋ ꢓꢎ ꢍ ꢀꢔ ꢕꢆꢍꢀ ꢊꢊ ꢍꢌ ꢒ  
SGLS183 − AUGUST 2003  
TYPICAL CHARACTERISTICS  
IDD  
OSCILLATOR FREQUENCY  
vs  
EXTERNAL RC VALUES  
COMP TO CS OFFSET  
vs  
TEMPERATURE  
vs  
OSCILLATOR FREQUENCY  
14  
1000  
100  
1.2  
1.0  
C = 100 pF  
12  
5
VDD = 10 V, t = 25  
C
IDD  
with 1 nF load  
C = 220 pF  
10  
C = 330 pF  
0.8  
8
6
0.6  
0.4  
C = 1000 pF  
10  
C = 820 pF  
4
C = 560 pF  
IDD  
0.2  
0
without load  
2
0
1
−55 −35 −15  
5
25  
45  
65  
85 105 125  
0
0
200  
400  
600  
800  
1000  
1200  
50  
100  
150  
200  
- °C  
Temperature  
RT − Timing Resistor − k  
Oscillator Frequency − kHz  
Figure 3  
Figure 4  
Figure 5  
ERROR AMPLIFIER GAIN AND PHASE  
OUTPUT DEAD TIME  
vs  
EXTERNAL RC VALUES  
DEAD TIME  
vs  
TEMPERATURE  
RESPONSE  
vs  
FREQUENCY  
300  
250  
400  
350  
300  
250  
200  
150  
100  
50  
90  
80  
70  
60  
50  
40  
180  
C = 1000 pF  
160  
140  
120  
100  
80  
VDD = 5 V  
VDD = 7.5 V  
C = 560 pF  
C = 820 pF  
C = 330 pF  
200  
150  
Phase  
VDD = 10 V  
C = 220 pF  
30  
20  
10  
60  
40  
20  
100  
50  
Gain  
C = 100 pF  
0
0
0
−100  
−50  
0
50  
100  
150  
1
100  
10000  
1000000  
50  
100  
150  
200  
250  
Temperature - °C  
RT − Timing Resistor − k Ω  
Frequency − Hz  
Figure 6  
Figure 7  
Figure 8  
CS R  
DS(on)  
RC R  
DS(on)  
vs  
TEMPERATURE  
vs  
TEMPERATURE  
120  
300  
100  
250  
VDD = 5 V  
VDD = 5 V  
80  
60  
40  
200  
150  
100  
VDD = 7.5 V  
VDD = 7.5 V  
VDD = 10 V  
VDD = 10 V  
20  
0
50  
0
−100  
−50  
0
50  
100  
150  
−100  
−50  
0
50  
100  
150  
Temperature - °C  
Temperature - °C  
Figure 9  
Figure 10  
8
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PACKAGE OPTION ADDENDUM  
www.ti.com  
30-Mar-2005  
PACKAGING INFORMATION  
Orderable Device  
Status (1)  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
SOIC  
SOIC  
Drawing  
UCC2808AQDR-1Q1  
UCC2808AQDR-2Q1  
ACTIVE  
ACTIVE  
D
D
8
8
2500  
2500  
TBD  
TBD  
Call TI  
Call TI  
Level-1-220C-UNLIM  
Level-1-220C-UNLIM  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan  
-
The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS  
&
no Sb/Br)  
-
please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
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incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
Addendum-Page 1  
IMPORTANT NOTICE  
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配单直通车
UCC2808AQDR-2Q1产品参数
型号:UCC2808AQDR-2Q1
Brand Name:Texas Instruments
是否无铅:不含铅
是否Rohs认证:符合
生命周期:Active
IHS 制造商:TEXAS INSTRUMENTS INC
零件包装代码:SOIC
包装说明:GREEN, PLASTIC, MS-012AA, SOIC-8
针数:8
Reach Compliance Code:compliant
ECCN代码:EAR99
HTS代码:8542.39.00.01
Factory Lead Time:6 weeks
风险等级:1.68
Is Samacsys:N
模拟集成电路 - 其他类型:SWITCHING CONTROLLER
控制模式:CURRENT-MODE
控制技术:PULSE WIDTH MODULATION
最大输入电压:15 V
最小输入电压:4.3 V
标称输入电压:10 V
JESD-30 代码:R-PDSO-G8
JESD-609代码:e4
长度:4.9 mm
湿度敏感等级:1
功能数量:1
端子数量:8
最高工作温度:125 °C
最低工作温度:-40 °C
最大输出电流:1 A
封装主体材料:PLASTIC/EPOXY
封装代码:SOP
封装等效代码:SOP8,.25
封装形状:RECTANGULAR
封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260
认证状态:Not Qualified
筛选级别:AEC-Q100
座面最大高度:1.75 mm
子类别:Switching Regulator or Controllers
表面贴装:YES
切换器配置:PUSH-PULL
最大切换频率:213 kHz
技术:BICMOS
温度等级:AUTOMOTIVE
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING
端子节距:1.27 mm
端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.9 mm
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