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产品型号USB3318的Datasheet PDF文件预览

USB3318

Hi-Speed USB Transceiver

with 1.8V-3.3V ULPI Interface -

13MHz Reference Clock

Data Brief

PRODUCT FEATURES

USB-IF “Hi-Speed” compliant to the Universal Serial

Bus Specification Rev 2.0

Carkit UART mode for non-USB serial data transfers

Industrial Operating Temperature -40°C to +85°C

Packaging Options

Interface compliant with the ULPI Specification

revision 1.1 as a Single Data Rate (SDR) PHY

—

24 pin QFN lead-free RoHS compliant package

(4 x 4 x 0.90 mm height)

1.8V to 3.3V IO Voltage (+/- 10%)

SMSC flexPWR^TMTechnology

—

Low current design ideal for battery powered

applications

Applications

—

“Sleep” mode tri-states all ULPI pins and places the

part in a low current state

The USB3318 is targeted for any application where a Hi-

Speed USB connection is desired and when board

space, power, and interface pins must be minimized.

Supports FS pre-amble for FS hubs with a LS device

attached (UTMI+ Level 3)

Supports HS SOF and LS keep-alive pulse

The USB3318 is well suited for:

Includes full support for the optional On-The-Go

(OTG) protocol detailed in the On-The-Go

Supplement Revision 1.0a specification

Cell Phones

PDAs

MP3 Players

Supports the OTG Host Negotiation Protocol (HNP)

and Session Request Protocol (SRP)

GPS Personal Navigation

Scanners

Allows host to turn VBUS off to conserve battery

power in OTG applications

External Hard Drives

Digital Still and Video Cameras

Portable Media Players

Entertainment Devices

Printers

Support OTG monitoring of VBUS levels with internal

comparators

“Wrapper-less” design for optimal timing performance

and design ease

—

Low Latency Hi-Speed Receiver (43 Hi-Speed clocks

Max) allows use of legacy UTMI Links with a ULPI

bridge

Set Top Boxes

Video Record/Playback Systems

IP and Video Phones

Gaming Consoles

POS Terminals

Internal 5V cable short-circuit protection of ID, DP

and DM lines to VBUS or ground

13MHz Reference Clock operation

—

0 to 3.6V input drive tolerant

—

Able to accept “noisy” clock sources

Internal low jitter PLL for 480MHz Hi-Speed USB

operation

Internal detection of the value of resistance to ground

on the ID pin

Integrated battery to 3.3V LDO regulator

—

2.2uF bypass capacitor

—

100mV dropout voltage

Integrated ESD protection circuits

—

Up to +-15kV without any external devices

SMSC USB3318

PRODUCT PREVIEW

Revision 1.3 (11-02-07)

Hi-Speed USB Transceiver with 1.8V-3.3V ULPI Interface - 13MHz Reference Clock

Order Number(s):

USB3318-CP-TR FOR 24 PIN, QFN LEAD-FREE ROHS COMPLIANT PACKAGE (TAPE AND REEL)

REEL SIZE IS 4000 PIECES.

80 ARKAY DRIVE, HAUPPAUGE, NY 11788 (631) 435-6000, FAX (631) 273-3123

Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete information sufficient for

construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no responsibility is assumed for inaccuracies. SMSC

reserves the right to make changes to specifications and product descriptions at any time without notice. Contact your local SMSC sales office to obtain the latest specifications

before placing your product order. The provision of this information does not convey to the purchaser of the described semiconductor devices any licenses under any patent

rights or other intellectual property rights of SMSC or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently dated

version of SMSC's standard Terms of Sale Agreement dated before the date of your order (the "Terms of Sale Agreement"). The product may contain design defects or errors

known as anomalies which may cause the product's functions to deviate from published specifications. Anomaly sheets are available upon request. SMSC products are not

designed, intended, authorized or warranted for use in any life support or other application where product failure could cause or contribute to personal injury or severe property

damage. Any and all such uses without prior written approval of an Officer of SMSC and further testing and/or modification will be fully at the risk of the customer. Copies of

this document or other SMSC literature, as well as the Terms of Sale Agreement, may be obtained by visiting SMSC’s website at http://www.smsc.com. SMSC is a registered

trademark of Standard Microsystems Corporation (“SMSC”). Product names and company names are the trademarks of their respective holders.

SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES, INCLUDING WITHOUT LIMITATION ANY AND ALL IMPLIED WARRANTIES OF MERCHANTABILITY,

FITNESS FOR A PARTICULAR PURPOSE, TITLE, AND AGAINST INFRINGEMENT AND THE LIKE, AND ANY AND ALL WARRANTIES ARISING FROM ANY COURSE

OF DEALING OR USAGE OF TRADE. IN NO EVENT SHALL SMSC BE LIABLE FOR ANY DIRECT, INCIDENTAL, INDIRECT, SPECIAL, PUNITIVE, OR CONSEQUENTIAL

DAMAGES; OR FOR LOST DATA, PROFITS, SAVINGS OR REVENUES OF ANY KIND; REGARDLESS OF THE FORM OF ACTION, WHETHER BASED ON CONTRACT;

TORT; NEGLIGENCE OF SMSC OR OTHERS; STRICT LIABILITY; BREACH OF WARRANTY; OR OTHERWISE; WHETHER OR NOT ANY REMEDY OF BUYER IS HELD

TO HAVE FAILED OF ITS ESSENTIAL PURPOSE, AND WHETHER OR NOT SMSC HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.

Revision 1.3 (11-02-07)

SMSC USB3318

PRODUCT PREVIEW

Hi-Speed USB Transceiver with 1.8V-3.3V ULPI Interface - 13MHz Reference Clock

General Description

The USB3318 is a highly integrated Hi-Speed USB 2.0 Transceiver (PHY) that supports systems

architectures based on a 13MHz reference clock. It is designed to be used in both commercial and

industrial temperature applications.

The USB3318 meets all of the electrical requirements to be used as a Hi-Speed USB Host, Device,

or an On-the-Go (OTG) device. In addition to the supporting USB signaling the USB3318 also provides

USB UART mode

USB3318 uses the industry standard UTMI+ Low Pin Interface (ULPI) to connect the USB PHY to the

Link. The industry standard ULPI interface uses a method of in-band signaling and status byte transfers

between the Link and PHY, to facilitate a USB session. By using in-band signaling and status byte

transfers the ULPI interface requires only 12 pins.

The USB3318 uses SMSC’s “wrapper-less” technology to implement the ULPI interface. This “wrapper-

less” technology allows the PHY to achieve a low latency transmit and receive time. SMSC’s low

latency transceiver allows an existing UTMI Link to be reused by adding a UTMI to ULPI bridge. By

adding a bridge to the ASIC the existing and proven UTMI Link IP can be reused.

REFCLK

CPEN

VBUS

Low Jitter

Integrated

PLL

OTG

RBIAS

BIAS

RESETB

VBAT

VDD33

VDD18

Integrated

Power

Management

Hi-Speed

USB

Transceiver

ULPI

VDDIO

Registers

and State

Machine

STP

NXT

DIR

CLKOUT

ULPI Interface

DATA[7:0]

Carkit

Figure 1 USB3318 Block Diagram

The USB3318 is designed to run with a 13MHz reference clock. By using a reference clock from the

Link the USB3318 is able to remove the cost of a crystal reference from the design.

The USB3318 includes a integrated 3.3V LDO regulator to generate its own supply from power applied

at the VBAT pin. The voltage on the VBAT pin can range from 3.1 to 5.5V. The regulator dropout

voltage is less than 100mV which allows the PHY to continue USB signaling when the voltage on

VBAT drops to 3.1V. The USB transceiver will continue to operate at lower voltages, although some

parameters may be outside the limits of the USB specifications. If the user would like to provide a 3.3V

supply to the USB3318, the VBAT and VDD3.3 pins should be connected together.

The USB3318 also includes integrated pull-up resistors that can be used for detecting the attachment

of a USB Charger. By sensing the attachment to a USB Charger, a product using the USB3318 can

charge its battery at more than the 500mA allowed when charging from a USB Host.

SMSC USB3318

Revision 1.3 (11-02-07)

PRODUCT PREVIEW

Hi-Speed USB Transceiver with 1.8V-3.3V ULPI Interface - 13MHz Reference Clock

USB3318 Pin Locations and Descriptions

Package Diagram with Pin Locations

The pinout below is viewed from the top of the package.

VBUS

VBAT

VDD3.3

NXT

VDDIO

DATA0

DATA1

DATA2

DATA3

24Pin QFN

4x4mm

Figure 2 USB3318 QFN Pinout - Top View

Pin Definitions

The following table details the pin definitions for the figure above.

Table 1 USB3318 Pin Description

DIRECTION/ ACTIVE

NAME

TYPE

LEVEL

DESCRIPTION

Input,

Analog

N/A

ID pin of the USB cable. For non-OTG

applications this pin can be floated. For

an A-Device ID is grounded. For a B-

Device ID is floated.

I/O,

Analog

N/A

VBUS pin of the USB cable. This pin is

used for the Vbus comparator inputs and

for Vbus pulsing during session request

protocol.

VBUS

Revision 1.3 (11-02-07)

SMSC USB3318

PRODUCT PREVIEW

Hi-Speed USB Transceiver with 1.8V-3.3V ULPI Interface - 13MHz Reference Clock

Table 1 USB3318 Pin Description (continued)

Power

N/A

Regulator input. The regulator supply can

be from 5.5V to 3.1V.

VBAT

Power

N/A

3.3V Regulator Output. A 2.2uF (<1 ohm

ESR) bypass capacitor to ground is

required for regulator stability. The

bypass capacitor should be placed as

close as possible to the USB3318.

VDD3.3

I/O,

N/A

D- pin of the USB cable.

Analog

I/O,

Analog

D+ pin of the USB cable.

Output,

CMOS

High

External 5 volt supply enable. This pin is

used to enable the external Vbus power

supply. The CPEN pin is low on POR.

This pad uses VDD3.3 logic level.

CPEN

I/O,

N/A

ULPI bi-directional data bus. DATA[7] is

the MSB.

CMOS

DATA[7]

DATA[6]

DATA[5

DATA[4]

I/O,

CMOS

ULPI bi-directional data bus.

I/O,

CMOS

I/O,

CMOS

Output,

CMOS

60MHz reference clock output. All ULPI

signals are driven synchronous to the

rising edge of this clock.

CLKOUT

DATA[3]

DATA[2]

DATA[1]

DATA[0]

I/O,

CMOS

N/A

ULPI bi-directional data bus.

I/O,

CMOS

I/O,

CMOS

I/O,

CMOS

ULPI bi-directional data bus. DATA[0] is

the LSB.

Power

1.8V to 3.3V ULPI interface supply

voltage. This voltage sets the value of

V_OHfor the ULPI interface.

VDDIO

Output,

CMOS

High

The PHY asserts NXT to throttle the data.

When the Link is sending data to the

PHY, NXT indicates when the current

byte has been accepted by the PHY. The

Link places the next byte on the data bus

in the following clock cycle.

NXT

SMSC USB3318

Revision 1.3 (11-02-07)

PRODUCT PREVIEW

Hi-Speed USB Transceiver with 1.8V-3.3V ULPI Interface - 13MHz Reference Clock

Table 1 USB3318 Pin Description (continued)

Output,

CMOS

N/A

Controls the direction of the data bus.

When the PHY has data to transfer to the

Link, it drives DIR high to take ownership

of the bus. When the PHY has no data to

transfer it drives DIR low and monitors

the bus for commands from the Link.

DIR

Input,

CMOS

High

The Link asserts STP for one clock cycle

to stop the data stream currently on the

bus. If the Link is sending data to the

PHY, STP indicates the last byte of data

was on the bus in the previous cycle.

STP

Power

N/A

External 1.8V Supply input pin. This pad

needs to be bypassed with a 0.1uF

capacitor to ground, placed as close as

possible to the USB3318.

VDD1.8

Input,

CMOS,

When low, the part is suspended with all

of the I/O tri-stated. When high the

USB3318 will operate as a normal ULPI

device.

RESETB

REFCLK

Input,

CMOS

N/A

13MHz Reference Clock input.

Analog,

CMOS

Rbias pin. This pin requires an 8.06kΩ

(±1%) resistor to ground, placed as close

as possible to the USB3318.

RBIAS

GND

Ground

N/A

Ground.

QFN only: The flag should be connected

to the ground plane with a via array

under the exposed flag. This is the main

ground for the IC.

FLAG

Revision 1.3 (11-02-07)

SMSC USB3318

PRODUCT PREVIEW

Hi-Speed USB Transceiver with 1.8V-3.3V ULPI Interface - 13MHz Reference Clock

Application Diagram

1.8V

Reference Clock

Supply

RESETB

ULPI Interface

3.1-5.5V

Battery /

Supply

VDDIO

1.8-3.3V

NXT

Note:

IO Supply

VBUS

VDDIO

DATA0

DATA1

DATA2

DATA3

VDDIO can

be connected

to the 1.8V

supply for

1.8V IO

VBAT

24Pin

QFN

4 x 4 mm

VDD3.3

USB

Connector

C_VBUS

5 Volt

Supply

Host/OTG Only

C_VBUS

Min

120uF

1uF

Max

REFCLK and CLKOUT should be

isolated with a ground line on both

sides.

Host

QFN

Ground Flag

Device

OTG Device

10uF

1uF

6.5uF

Figure 3 USB3318 QFN Application Diagram

SMSC USB3318

Revision 1.3 (11-02-07)

PRODUCT PREVIEW

Package Outline

Figure 4 24-pin QFN, 4x4mm Body, 0.5mm Pitch

USB3318相关文章

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USB3318-CP产品参数

型号:	USB3318-CP
是否无铅：	不含铅
生命周期：	Active
包装说明：	HVQCCN,
Reach Compliance Code：	compliant
Factory Lead Time：	18 weeks
风险等级：	2.2
JESD-30 代码：	S-XQCC-N24
长度：	4 mm
功能数量：	1
端子数量：	24
最高工作温度：	85 °C
最低工作温度：	-40 °C
封装主体材料：	UNSPECIFIED
封装代码：	HVQCCN
封装形状：	SQUARE
封装形式：	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
筛选级别：	TS 16949
座面最大高度：	1 mm
标称供电电压：	1.8 V
表面贴装：	YES
电信集成电路类型：	INTERFACE CIRCUIT
温度等级：	INDUSTRIAL
端子形式：	NO LEAD
端子节距：	0.5 mm
端子位置：	QUAD
宽度：	4 mm
Base Number Matches：	1

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