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产品型号VNI4140K-32的概述

芯片VNI4140K-32的概述 VNI4140K-32是一款由国际知名半导体制造商意法半导体(STMicroelectronics)推出的高侧驱动器芯片。该芯片属于VNI系列,是专门设计用于功率管理应用,尤其适用于汽车电子、电机驱动以及工业控制领域。VNI4140K-32芯片的设计旨在提供高效的电源控制和可靠的操作性能,并且它集成了多种保护功能,极大地提高了系统的安全性和稳定性。 VNI4140K-32能够支持高达40W的输出功率,是一种放置方便且易于使用的解决方案,特别适合需要高侧开关的应用。其内置的结构使得用户在设计电路时,不必额外外加驱动器,从而降低了系统复杂性和成本。 芯片的详细参数 VNI4140K-32芯片的主要参数如下: - 工作电压范围:4.5V至36V - 最大输出电流:3A - 开启电阻(Rds(on)):最低电平为0.07Ω - 工作温度范围:-40°C至+15...

产品型号VNI4140K-32的Datasheet PDF文件预览

VNI4140K-32  
Quad high side smart power solid state relay  
Datasheet production data  
Features  
(1)  
(1)  
(1)  
PowerSSO-24  
Type  
Vdemag  
RDSon  
Iout  
VCC  
VNI4140K-32 VCC-41 V  
1. Per channel  
0.08 Ω  
1 A  
41 V  
Description  
Output current: 1 A per channel  
Shorted load protections  
The VNI4140K-32 is a monolithic device made  
using STMicroelectronics VIPower technology,  
intended for driving four independent resistive,  
capacitive or inductive loads with one side  
connected to ground. Active current limitation  
avoids the system power supply dropping in the  
case of shorted load. Built-in thermal shutdown  
protects the chip from overtemperature and short-  
circuit. In overload condition, the channel turns  
OFF and back ON automatically so as to maintain  
junction temperature between TTSD and TR. If this  
condition causes case temperature to reach  
Junction overtemperature protection  
Case overtemperature protection for thermal  
independence of the channels  
Thermal case shutdown restart not  
simultaneous for the various channels  
Protection against loss of ground  
Current limitation  
Undervoltage shutdown  
T
CSD, the overloaded channel is turned OFF and  
Open drain diagnostic outputs  
3.3 V CMOS/TTL compatible inputs  
Fast demagnetization of inductive loads  
Conforms to IEC 61131-2  
restarts only when case temperature has  
decreased down to TCR. In the case of more than  
one channel in overload, re-start of the  
overloaded channels is not simultaneous, in order  
to avoid high peak current from the supply. Non-  
overloaded channels continue to operate  
normally. The open drain diagnostic outputs  
indicate overtemperature conditions.  
ESD according to IEC 61000-4-2 up to +/-  
25 KV  
Figure 1.  
Block diagram  
March 2012  
Doc ID022576 Rev 3  
1/26  
This is information on a product in full production.  
www.st.com  
26  
Contents  
VNI4140K-32  
Contents  
1
2
Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
2.1  
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
3
4
5
6
7
8
9
Recommended . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
Thermal management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Switching waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
9.1  
VNI4140K-32 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
10  
11  
12  
13  
Reverse polarity protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17  
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18  
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24  
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25  
2/26  
Doc ID022576 Rev 3  
VNI4140K-32  
Pin connection  
1
Pin connection  
Figure 2. Pin connection (top view)  
V
OUT1  
OUT1  
OUT1  
OUT2  
OUT2  
OUT2  
OUT3  
OUT3  
OUT3  
OUT4  
OUT4  
OUT4  
CC  
IN1  
STAT1  
IN2  
STAT2  
GND  
STAT3  
IN3  
STAT4  
IN4  
NC  
NC  
Table 1.  
Pin  
Pin description  
Name  
TAB  
Description  
Tab  
1
Exposed tab internally connected to Vcc  
Supply voltage  
Vcc  
IN1  
2
Channel 1 input 3.3 V CMOS/TTL compatible  
Channel 1 status in open drain configuration  
Channel 2 input 3.3 V CMOS/TTL compatible  
Channel 2 status in open drain configuration  
Device ground connection  
3
STAT1  
IN2  
4
5
STA2  
GND  
STAT3  
IN3  
6
7
Channel 3 status in open drain configuration  
Channel 3 input 3.3 V CMOS/TTL compatible  
Channel 4 status in open drain configuration  
Channel 4 input 3.3 V CMOS/TTL compatible  
8
9
STAT4  
IN4  
10  
11  
12  
13  
14  
15  
16  
17  
NC  
NC  
OUT4  
OUT4  
OUT4  
OUT3  
OUT3  
Channel 4 power stage output, internally protected  
Channel 4 power stage output, internally protected  
Channel 4 power stage output, internally protected  
Channel 3 power stage output, internally protected  
Channel 3 power stage output, internally protected  
Doc ID022576 Rev 3  
3/26  
Pin connection  
Table 1.  
VNI4140K-32  
Pin description (continued)  
Name  
Pin  
Description  
18  
19  
20  
21  
22  
23  
24  
OUT3  
OUT2  
OUT2  
OUT2  
OUT1  
OUT1  
OUT1  
Channel 3 power stage output, internally protected  
Channel 2 power stage output, internally protected  
Channel 2 power stage output, internally protected  
Channel 2 power stage output, internally protected  
Channel 1 power stage output, internally protected  
Channel 1 power stage output, internally protected  
Channel 1 power stage output, internally protected  
4/26  
Doc ID022576 Rev 3  
VNI4140K-32  
Maximum ratings  
2
Maximum ratings  
Table 2.  
Symbol  
Absolute maximum rating  
Parameter  
Value  
Unit  
VCC  
-VCC  
IGND  
IOUT  
IR  
Power supply voltage  
41  
V
V
Reverse supply voltage  
DC ground reverse current  
Output current (continuos)  
Reverse output current (per channel)  
Input current (per channel)  
Input voltage  
-0.3  
-250  
mA  
A
Internally limited  
-5  
10  
A
IIN  
mA  
V
VIN  
+VCC  
+VCC  
10  
VSTAT Status pin voltage  
V
ISTAT  
VESD  
Status pin current  
mA  
V
Electrostatic discharge (R = 1.5 k; C = 100 pF)  
2000  
Single pulse avalanche energy per channel not  
simultaneous  
EAS  
300  
mJ  
PTOT  
TJ  
Power dissipation at Tc = 25 °C  
Junction operating temperature  
Storage temperature  
Internally limited  
Internally limited  
-55 to 150  
W
°C  
°C  
TSTG  
2.1  
Thermal data  
Table 3.  
Symbol  
Thermal data  
Parameter  
Value  
Unit  
Rth(JC) Thermal resistance junction-case (1)  
Rth(JA) Thermal resistance junction-ambient  
1. Per channel.  
Max.  
Max.  
2
°C/W  
°C/W  
see Figure 11  
3
Recommended  
Table 4.  
Symbol  
Input switching limits  
Parameter  
Value  
Unit  
fVin MAX Maximum input switching frequency  
10  
kHz  
Doc ID022576 Rev 3  
5/26  
Electrical characteristics  
VNI4140K-32  
4
Electrical characteristics  
10.5 V < VCC < 36 V; -40 °C < TJ < 125 °C; unless otherwise specified.  
Table 5.  
Symbol  
Power section  
Parameter  
Test condition  
Min.  
Typ.  
Max. Unit  
Vcc  
Supply voltage  
10.5  
36  
V
IOUT = 0.7 A at TJ = 25 °C  
IOUT = 0.7 A  
0.080  
0.140  
RDS(ON) ON state resistance  
Vclamp  
Is = 20 mA  
41  
45  
52  
V
250  
2.4  
µA  
All channels in OFF state,  
ON state with VIN = 5 V  
IS  
Supply current  
4
mA  
OFF state output  
voltage  
VOUT(OFF)  
IOUT(OFF)  
ILGND  
VIN = 0 V and IOUT = 0 A  
VIN = VOUT = 0 V  
1
5
V
OFF state output  
current  
0
µA  
µA  
kHz  
Vcc= VIN = GND = 24 V;  
TJ = 125 °C  
Output current in  
ground disconnection  
500  
Charge pump  
frequency  
FCP  
Channel in ON state (1)  
1450  
1. To cover EN55022 class A and class B normative.  
VCC = 24 V; -25 °C < TJ < 125 °C, RL = 48 , input rise time < 0.1 µs)  
Table 6.  
Symbol  
Switching  
Parameter  
Test condition  
Min.  
Typ.  
Max. Unit  
td  
Turn ON delay  
Rise time  
6
5
µS  
µS  
(ON)  
tr  
td  
Turn OFF  
12  
5
µS  
(OFF)  
tf  
Fall time  
µS  
dV/dt  
Turn ON voltage slope  
4
V/µS  
(ON)  
Turn OFF voltage  
slope  
dV/dt(off)  
4
V/µS  
6/26  
Doc ID022576 Rev 3  
 
VNI4140K-32  
Figure 3. Switching parameter conventions  
Electrical characteristics  
6OUT  
D ꢀD  
6 4  
n
T
ꢁ T  
RISE  
FALL  
ꢈꢅꢆ  
ꢇꢅꢆ  
ꢄꢅꢆ  
T
TR  
TF  
T
D
/.  
ꢁ T  
D
/&&  
6IN  
ꢉꢅꢆ  
T
6OUT  
ꢈꢅꢆ  
ꢄꢅꢆ  
T
TD/.  
TD/&&  
Doc ID022576 Rev 3  
7/26  
Electrical characteristics  
VNI4140K-32  
Max. Unit  
Table 7.  
Symbol  
Logical input  
Parameter  
Test conditions  
Min.  
Typ.  
VIL  
VIH  
Input low level voltage  
Input high level voltage  
0.8  
V
V
2.20  
Input hysteresis  
voltage  
VI(HYST)  
0.15  
V
V
IN = 15 V  
10  
IIN  
Input current  
µΑ  
VIN = 36 V  
210  
Table 8.  
Symbol  
Protection and diagnostic  
Parameter  
Test conditions  
Min.  
Typ.  
Max.  
Unit  
Status voltage  
output low  
vSTAT  
VUSD  
VUSDHYS  
ISTAT = 1.6 mA  
0.6  
V
Undervoltage  
protection  
7
10.5  
2.6  
V
V
A
Undervoltage  
hysteresis  
0.4  
1.01  
0.5  
DC short-circuit  
current  
ILIM  
VCC = 24 V; RLOAD < 10 mΩ  
Maximum DC output  
current  
IPEAK  
ILSTAT  
TTSD  
Dynamic load  
1.6  
30  
A
Status leakage current VCC = VSTAT = 36 V  
µΑ  
°C  
Junction shutdown  
temperature  
150  
135  
7
170  
190  
135  
Junction reset  
temperature  
TR  
°C  
°C  
Junction thermal  
hysteresis  
THIST  
TCSD  
15  
Case shutdown  
temperature  
125  
110  
130  
°C  
°C  
Case reset  
temperature  
TCR  
Case thermal  
hysteresis  
TCHYST  
Vdemag  
7
15  
°C  
V
Output voltage at  
turn-OFF  
VCC  
41  
-
VCC  
45  
-
VCC  
52  
-
I
OUT = 0.5 A; LLOAD >= 1 mH  
8/26  
Doc ID022576 Rev 3  
 
VNI4140K-32  
Figure 4. Current and voltage conventions  
Electrical characteristics  
Doc ID022576 Rev 3  
9/26  
Truth table  
VNI4140K-32  
5
Truth table  
Table 9.  
Truth table  
Conditions  
INPUTn  
OUTPUTn  
STATUSn  
L
L
H
H
Normal operation  
H
H
L
L
L
H
L
Overtemperature  
H
L
L
L
X
X
Undervoltage  
Shorted load  
H
L
L
H
H
(Current limitation before thermal shutdown)  
H
X
10/26  
Doc ID022576 Rev 3  
VNI4140K-32  
Thermal management  
6
Thermal management  
The power dissipation in the IC is the main factor that sets the safe operating condition of  
the device in the application. Therefore, it must be very carefully considered. Furthermore,  
the available space on the PCB should be chosen considering the power dissipation.  
Heatsinking can be achieved using copper on the PCB with proper area and thickness. Two  
different protections have been implemented to guarantee safety of the device if it overheats  
due to an overloaded condition or high environment temperature. The following flowchart  
explains in detail this protection functionality.  
Figure 5. Thermal behavior  
Vi n(i ) = H  
OUT(i) On  
STAT(i) Off (H)  
NO  
YES  
Tj( i) > Tt s d  
OUT(i) Off  
STAT(i) On (L)  
YES  
NO  
Tc > Tcs d  
NO  
YES  
Tc > Tcr  
NO  
YES  
Tj(i) >Tjr  
Doc ID022576 Rev 3  
11/26  
Switching waveforms  
VNI4140K-32  
7
Switching waveforms  
Figure 6. Switching waveforms  
12/26  
Doc ID022576 Rev 3  
VNI4140K-32  
Pin functions  
8
Pin functions  
Figure 7. Input circuit  
Figure 8. Status circuit  
Doc ID022576 Rev 3  
13/26  
Pin functions  
Figure 9. Charge pump switching frequency (typical) vs. temperature  
VNI4140K-32  
Freq_CP  
2000  
1800  
1600  
1400  
1200  
1000  
800  
Freq_CP  
-50  
0
50  
100  
150  
200  
temperature("C)  
14/26  
Doc ID022576 Rev 3  
VNI4140K-32  
Package and PCB thermal data  
9
Package and PCB thermal data  
9.1  
VNI4140K-32 thermal data  
Figure 10. VNI4140K-32 PCB  
Note:  
Layout condition of Rth and Zth measurements (PCB: Double layer, Thermal Vias,  
FR4 area = 77 mm x 86 mm, PCB thickness=1.6 mm, Cu thickness = 70 mm (front and back  
side), Copper areas: from minimum pad layout to 8 cm2).  
Figure 11. RthJA vs. PCB copper area in open box free air condition (one channel ON)  
Doc ID022576 Rev 3  
15/26  
Package and PCB thermal data  
VNI4140K-32  
Figure 12. VNI4140K-32 thermal impedance junction ambient single pulse  
(one channel ON)  
16/26  
Doc ID022576 Rev 3  
VNI4140K-32  
Reverse polarity protection  
10  
Reverse polarity protection  
This schematic can be used with any type of load.  
The following is an indication on how to dimension the RGND resistor.  
GND = (-VCC) / (-IGND  
R
)
where -IGND is the DC reverse ground pin current and can be found in the absolute  
maximum rating section of the device datasheet.  
Power dissipation in RGND (when VCC < 0: during reverse polarity situations) is:  
PD = (-VCC)2/RGND  
Note:  
In normal conditions (no reverse polarity) due to the diode there is a voltage drop between  
GND of the device and GND of the system.  
Figure 13. Reverse polarity protection  
+ Vcc  
Inputi  
Outputi  
Statusi  
GND  
Load  
RGND  
Diode  
Doc ID022576 Rev 3  
17/26  
Package mechanical data  
VNI4140K-32  
11  
Package mechanical data  
In order to meet environmental requirements, ST offers these devices in different grades of  
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®  
specifications, grade definitions and product status are available at:www.st.com.  
ECOPACK® is an ST trademark.  
18/26  
Doc ID022576 Rev 3  
VNI4140K-32  
Package mechanical data  
Table 10. PowerSSO-24 mechanical data  
mm  
Symbol  
Min.  
Typ.  
Max.  
A
A2  
a1  
b
2.15  
2.15  
0
2.47  
2.40  
0.075  
0.51  
0.32  
10.50  
7.6  
0.33  
0.23  
10.10  
7.4  
c
D
E
e
0.8  
8.8  
e3  
G
G1  
H
h
0.1  
0.06  
10.5  
0.4  
10.1  
0.55  
L
0.85  
10deg  
4.7  
N
X
4.1  
6.5  
Y
7.1  
Figure 14. PowerSSO-24 package dimensions  
Doc ID022576 Rev 3  
19/26  
Package mechanical data  
Figure 15. PowerSSO-24 tube shipment (no suffix)  
VNI4140K-32  
Table 11. PowerSSO-24 tube shipment  
Base Q.ty  
49  
1225  
532  
3.5  
Bulk Q.ty  
Tube length ( 0.5)  
A
B
13.8  
0.6  
C ( 0.1)  
Note:  
All dimensions are in mm.  
20/26  
Doc ID022576 Rev 3  
VNI4140K-32  
Figure 16. PowerSSO-24 reel shipment (suffix “TR”)  
Package mechanical data  
Table 12. PowerSSO-24 reel dimensions  
Base Q.ty  
1000  
1000  
330  
1.5  
Bulk Q.ty  
A (max.)  
B (min.)  
C ( 0.2)  
F
13  
20.2  
24.4  
100  
30.4  
G (2 0)  
N (min.)  
T (max.)  
Doc ID022576 Rev 3  
21/26  
Package mechanical data  
Figure 17. PowerSSO-24 tape dimensions  
VNI4140K-32  
Table 13. PowerSSO-24 tape dimensions  
Tape width  
W
24  
Tape Hole Spacing  
Component Spacing  
Hole Diameter  
P0 ( 0.1)  
P
4
12  
D ( 0.05)  
D1 (min)  
F ( 0.1)  
K (max)  
P1 ( 0.1)  
1.55  
1.5  
11.5  
2.85  
2
Hole Diameter  
Hole Position  
Compartment Depth  
Hole Spacing  
Note:  
According to the electronic industries association (EIA) standard 481 rev. A, Feb 1986.  
22/26  
Doc ID022576 Rev 3  
VNI4140K-32  
Figure 18. VNI4140K-32 suggested footprint  
Package mechanical data  
ꢄꢄꢊꢉꢋꢉ  
ꢅꢊꢇ n ꢅꢊꢈ  
2 ꢅꢊꢎ  
ꢄꢊꢉ  
ꢉꢊꢌ  
ꢄꢊꢏ  
3OLDER -ASK /PENING  
Note:  
STMicroelectronics is not responsible for any PCB related issues. The footprint shown in the  
above figure is a suggestion which might not be in line to the customer PCB supplier design  
rules.  
All dimensions are in mm.  
Doc ID022576 Rev 3  
23/26  
Ordering information  
VNI4140K-32  
12  
Ordering information  
Table 14. Ordering information  
Order codes  
Package  
Packaging  
VNI4140K-32  
PowerSSO-24  
PowerSSO-24  
Tube  
VNI4140KTR-32  
Tape and reel  
24/26  
Doc ID022576 Rev 3  
VNI4140K-32  
Revision history  
13  
Revision history  
Table 15. Document revision history  
Date  
Revision  
Changes  
12-Dec-2011  
1
Initial release.  
Updated Ilim minimum value in Table 8: Protection and  
diagnostic.  
06-Feb-2012  
07-Mar-2012  
2
3
Inserted new feature: ESD according to IEC 61000-4-2 up  
to +/-25 KV, in cover page.  
Suggested footprint inserted.  
In Table 5. parameter ILGND has been added.  
Doc ID022576 Rev 3  
25/26  
VNI4140K-32  
Please Read Carefully:  
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the  
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any  
time, without notice.  
All ST products are sold pursuant to ST’s terms and conditions of sale.  
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no  
liability whatsoever relating to the choice, selection or use of the ST products and services described herein.  
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this  
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any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any  
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ST and the ST logo are trademarks or registered trademarks of ST in various countries.  
Information in this document supersedes and replaces all information previously supplied.  
The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.  
© 2012 STMicroelectronics - All rights reserved  
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26/26  
Doc ID022576 Rev 3  
配单直通车
VNI4140K-32产品参数
型号:VNI4140K-32
Brand Name:STMicroelectronics
是否Rohs认证: 符合
生命周期:Active
IHS 制造商:STMICROELECTRONICS
包装说明:SSOP, SOP24,.4,32
Reach Compliance Code:not_compliant
ECCN代码:EAR99
Factory Lead Time:14 weeks
风险等级:1.62
Samacsys Confidence:3
Samacsys Status:Released
Samacsys PartID:425325
Samacsys Pin Count:25
Samacsys Part Category:Integrated Circuit
Samacsys Package Category:Small Outline Packages
Samacsys Footprint Name:VNI4140K-32
Samacsys Released Date:2019-01-08 15:57:17
Is Samacsys:N
驱动器位数:4
接口集成电路类型:BUFFER OR INVERTER BASED PERIPHERAL DRIVER
JESD-30 代码:R-PDSO-G24
JESD-609代码:e3
湿度敏感等级:3
端子数量:24
封装主体材料:PLASTIC/EPOXY
封装代码:SSOP
封装等效代码:SOP24,.4,32
封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH
峰值回流温度(摄氏度):NOT SPECIFIED
电源:24 V
认证状态:Not Qualified
子类别:Peripheral Drivers
标称供电电压:24 V
表面贴装:YES
端子面层:Matte Tin (Sn) - annealed
端子形式:GULL WING
端子节距:0.8 mm
端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED
Base Number Matches:1
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