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A54SX08APQ208I 参数 Datasheet PDF下载

A54SX08APQ208I图片预览
型号: A54SX08APQ208I
PDF下载: 下载PDF文件 查看货源
内容描述: SX -A系列FPGA [SX-A Family FPGAs]
分类和应用:
文件页数/大小: 108 页 / 828 K
品牌: ACTEL [ Actel Corporation ]
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SX-A Family FPGAs
Power-Up/Down and Hot Swapping
SX-A I/Os are configured to be hot-swappable, with the
exception of 3.3 V PCI. During power-up/down (or partial
up/down), all I/Os are tristated. V
CCA
and V
CCI
do not
have to be stable during power-up/down, and can be
powered up/down in any order. When the SX-A device is
plugged into an electrically active system, the device will
not degrade the reliability of or cause damage to the
host system. The device’s output pins are driven to a high
impedance state until normal chip operating conditions
Table 1-2 •
I/O Features
Function
Input Buffer Threshold Selections
Description
5 V: PCI, TTL
3.3 V: PCI, LVTTL
2.5 V: LVCMOS2 (commercial only)
5 V: PCI, TTL
3.3 V: PCI, LVTTL
2.5 V: LVCMOS2 (commercial only)
are reached.
summarizes the V
CCA
voltage at
which the I/Os behave according to the user’s design for
an SX-A device at room temperature for various ramp-up
rates. The data reported assumes a linear ramp-up
profile to 2.5 V. For more information on power-up and
hot-swapping, refer to the application note,
Flexible Output Driver
Output Buffer
“Hot-Swap” Capability (3.3 V PCI is not hot swappable)
• I/O on an unpowered device does not sink current
• Can be used for “cold-sparing”
Selectable on an individual I/O basis
Individually selectable slew rate; high slew or low slew (The default is high slew rate).
The slew is only affected on the falling edge of an output. Rising edges of outputs are
not affected.
Individually selectable pull-ups and pull-downs during power-up (default is to power-up
in tristate)
Enables deterministic power-up of device
V
CCA
and V
CCI
can be powered in any order
Power-Up
Table 1-3 •
I/O Characteristics for All I/O Configurations
Hot Swappable
TTL, LVTTL, LVCMOS2
3.3 V PCI
5 V PCI
Yes
No
Yes
Slew Rate Control
Yes. Only affects falling edges of outputs
No. High slew rate only
No. High slew rate only
Power-Up Resistor
Pull-up or pull-down
Pull-up or pull-down
Pull-up or pull-down
Table 1-4 •
Power-Up Time at which I/Os Become Active
Supply Ramp Rate
Units
A54SX08A
A54SX16A
A54SX32A
A54SX72A
0.25 V/μs
μs
10
10
10
10
0.025 V/μs
μs
96
100
100
100
5 V/ms
ms
0.34
0.36
0.46
0.41
2.5 V/ms
ms
0.65
0.62
0.74
0.67
0.5 V/ms
ms
2.7
2.5
2.8
2.6
0.25 V/ms
ms
5.4
4.7
5.2
5.0
0.1 V/ms
ms
12.9
11.0
12.1
12.1
0.025 V/ms
ms
50.8
41.6
47.2
47.2
1 -8
v5.3