ProASIC
PLUS
Flash Family FPGAs
Output Buffer Delays
A
A
OBx
PAD
35 pF
50% 50%
V
OH
50%
PAD
50%
V
OL
t
DLH
t
DHL
Figure 2-24 •
Output Buffer Delays
Table 2-31 •
Worst-Case Commercial Conditions
V
DDP
= 3.0 V, V
DD
= 2.3 V, 35 pF load, T
J
= 70°C
Max. t
DLH1
Macro Type
OB33PH
OB33PN
OB33PL
OB33LH
OB33LN
OB33LL
Notes:
1. t
DLH
= Data-to-Pad High
2. t
DHL
= Data-to-Pad Low
Table 2-32 •
Worst-Case Commercial Conditions
V
DDP
= 2.3 V, V
DD
= 2.3 V, 35 pF load, T
J
= 70°C
Max. t
DLH1
Macro Type
OB25LPHH
OB25LPHN
OB25LPHL
OB25LPLH
OB25LPLN
OB25LPLL
Notes:
1. t
DLH
= Data-to-Pad High
2. t
DHL
= Data-to-Pad Low
3. Low-power I/Os work with V
DDP
= 2.5 V ±10% only. V
DDP
= 2.3 V for delays.
Table 2-33 •
Worst-Case Military Conditions
V
DDP
= 3.0V, V
DD
= 2.3V, 35 pF load, T
J
= 125°C for Military/MIL-STD-883
Max.
t
DLH1
Macro Type
OB33PH
OB33PN
Description
3.3V, PCI Output Current, High Slew Rate
3.3V, High Output Current, Nominal Slew Rate
Std.
2.1
2.5
Max.
t
DHL2
Std.
2.3
3.2
Units
ns
ns
Description
2.5 V, Low Power, High Output Current, High Slew Rate
3
2.5 V, Low Power, High Output Current, Nominal Slew Rate
3
2.5 V, Low Power, High Output Current, Low Slew Rate
3
2.5 V, Low Power, Low Output Current, High Slew Rate
3
2.5 V, Low Power, Low Output Current, Nominal Slew Rate
3
2.5 V, Low Power, Low Output Current, Low Slew Rate
3
Std.
2.0
2.4
2.9
2.7
3.5
4.0
Max. t
DHL2
Std.
2.1
3.0
3.2
4.6
4.2
5.3
Units
ns
ns
ns
ns
ns
ns
Description
3.3 V, PCI Output Current, High Slew Rate
3.3 V, High Output Current, Nominal Slew Rate
3.3 V, High Output Current, Low Slew Rate
3.3 V, Low Output Current, High Slew Rate
3.3 V, Low Output Current, Nominal Slew Rate
3.3 V, Low Output Current, Low Slew Rate
Std.
2.0
2.2
2.5
2.6
2.9
3.0
Max. t
DHL2
Std.
2.2
2.9
3.2
4.0
4.3
5.6
Units
ns
ns
ns
ns
ns
ns
2 -4 4
v5.9
ACTEL [ Actel Corporation ]
