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AD7886JD 参数 Datasheet PDF下载

AD7886JD图片预览
型号: AD7886JD
PDF下载: 下载PDF文件 查看货源
内容描述: LC2MOS 12位, 750千赫/ 1 MHz时,采样ADC [LC2MOS 12-Bit, 750 kHz/1 MHz, Sampling ADC]
分类和应用:
文件页数/大小: 16 页 / 402 K
品牌: ADI [ ADI ]
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(VDD = +5 V ؎ 5%, VSS = –5 V ؎ 5%, A6ND = DGND = O V, VREF = –3.5 V, connected  
as shown in Figure 2. All Specifications TMIN to TMAX unless otherwise noted. Specifications apply for 750 kHz version.)  
AD7886–SPECIFICATIONS  
Parameter  
J Version1  
K, B Versions1 T Version1 Units  
Test Conditions/Comments  
DYNAMIC PERFORMANCE2  
Signal-to-Noise Ratio3 (SNR)  
Total Harmonic Distortion (THD)  
Peak Harmonic or Spurious Noise  
Intermodulation Distortion (IMD)  
Second Order Terms  
65  
–75  
–77  
67  
–75  
–77  
65  
–75  
–77  
dB min  
dB typ  
dB typ  
VIN = 100 kHz Sine Wave, fSAMPLE = 750 kHz  
VIN = 100 kHz Sine Wave, fSAMPLE = 750 kHz  
VIN = 100 kHz Sine Wave, fSAMPLE = 750 kHz  
–80  
–80  
–80  
–80  
–80  
–80  
dB typ  
dB typ  
f = 96 kHz, f = 103 kHz, fSAMPLE = 750 kHz  
a b  
Third Order Terms  
ACCURACY  
Resolution  
12  
12  
12  
Bits  
Integral Linearity TMIN to TMAX  
Minimum Resolution for Which  
No Missing Codes Are Guaranteed  
Unipolar Offset Error @ +25°C  
TMIN to TMAX  
Bipolar Offset Error @ +25°C  
TMIN to TMAX  
Unipolar Gain Error @ +25°C  
TMIN to TMAX  
±2  
±2  
LSB max  
12  
±5  
±5  
±5  
±5  
±5  
±5  
±5  
±5  
12  
±5  
±5  
±5  
±5  
±5  
±5  
±5  
+5  
12  
±5  
±5  
±5  
±5  
±5  
±5  
±5  
±5  
Bits  
LSB max  
LSB max  
LSB max  
LSB max  
LSB max  
LSB max  
LSB max  
LSB max  
Input Range: 0 V to 5 V or 0 V to 10 V  
Input Range: ±5 V  
Input Range: 0 V to 5 V or 0 V to 10 V  
Input Range: ±5 V  
Bipolar Gain Error @ +25°C  
TMIN to TMAX  
ANALOG INPUT  
Unipolar Input Current  
Bipolar Input Current  
1.5  
±0.75  
1.5  
±0.75  
1.5  
±0.75  
mA max  
mA max  
Input Ranges: 0 V to 5 V or 0 V to 10 V  
Input Range: ±5 V  
REFERENCE INPUT  
VREF  
Input Reference Current  
R1, Resistance  
R2, Resistance  
R2/R1 Ratio  
–3.5  
–10  
9
6.3  
0.7  
–3.5  
–10  
9
6.3  
0.7  
–3.5  
–10  
9
6.3  
0.7  
Volts  
±2% For Specified Performance  
mA max  
knom  
knom  
nom  
±25%  
±25%  
±0.1%  
POWER SUPPLY REJECTION  
VDD Only, (FS Change)  
VSS Only, (FS Change)  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
LSB typ  
LSB typ  
VSS = –5 V, VDD = +4.75 V to +5.25 V  
VDD = +5 V, VSS = –4.75 V to –5.25 V  
LOGIC INPUTS  
Input High Voltage, VINH  
Input Low Voltage, VINL  
Input Current, IIN  
2.4  
0.8  
±10  
10  
2.4  
0.8  
±10  
10  
2.4  
0.8  
±10  
10  
V min  
VDD = 5 V ± 5%  
VDD = 5 V ± 5%  
VIN = 0 V to VDD  
V max  
µA max  
pF max  
4
Input Capacitance, CIN  
LOGIC OUTPUTS  
DB11–DB0, BUSY  
Output High Voltage, VOH  
Output Low Voltage, VOL  
DB11–DB0  
4
0.4  
4
0.4  
4
0.4  
V min  
V max  
ISOURCE = 200 µA  
ISINK = 1.6 mA  
Floating-State Leakage Current  
±10  
15  
±10  
15  
±10  
15  
pA max  
pF max  
Floating-State Output Capacitance4  
POWER REQUIREMENTS  
VDD  
+5  
+5  
+5  
V nom  
±5% for Specified Performance  
VSS  
–5  
–5  
–5  
V nom  
±5% for Specified Performance  
IDD  
ISS  
35  
35  
35  
mA max  
mA max  
mW typ  
mW max  
Typically 25 mA, CONVST = CS = RD = VDD  
Typically 25 mA, CONVST = CS = RD = VDD  
CONVST = CS = RD = VDD  
–35  
250  
350  
–35  
250  
350  
–35  
250  
350  
Power Dissipation  
NOTES  
ITemperature ranges are as follows: J, K Versions: 0°C to +70°C; B Version: –40°C to +85°C; T Version: –55°C to + 125°C.  
2Applies to all three input ranges, VIN = 0 to FS, pk-to-pk V.  
3SNR calculation includes distortion and noise components.  
4Sample tested @ +25°C to ensure compliance.  
Specifications subject to change without notice.  
REV. B  
–2–