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AD9059BRS 参数 Datasheet PDF下载

AD9059BRS图片预览
型号: AD9059BRS
PDF下载: 下载PDF文件 查看货源
内容描述: 双路,8位, 60 MSPS A / D转换器 [Dual 8-Bit, 60 MSPS A/D Converter]
分类和应用: 转换器
文件页数/大小: 12 页 / 193 K
品牌: AD [ ANALOG DEVICES ]
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AD9059
Power Dissipation
1kΩ
+5V
1kΩ
VIN
A
+5V
The power dissipation of the AD9059 is specified to reflect a
typical application setup under the following conditions: en-
code is 60 MSPS, analog input is –0.5 dBFS at 10.3 MHz, V
D
is +5 V, V
DD
is +3 V, and digital outputs are loaded with 7 pF
typical (10 pF maximum). The actual dissipation will vary as
these conditions are modified in user applications. Figure 8
shows typical power consumption for the AD9059 versus ADC
encode frequency and V
DD
supply voltage.
+5V
AD8041
1
10kΩ
3
10kΩ
+5V
0.1µF
V
REF
AINA
AD9059
AD8041
1kΩ
VIN
B
(–0.5V TO +0.5V)
1kΩ
28 AINB
0.1µF
VIN
A
(1V p-p)
1kΩ
EXTERNAL V
REF
(OPTIONAL)
3 V
REF
0.1µF
1kΩ
VIN
B
(1V p-p)
0.1µF
28 AINB
IF IN
90
°
1 AINA
AD9059
Figure 15. DC Coupled AD9059 (VIN Inverted)
AD9059
BPF
ADC
BPF
ADC
VCO
VCO
Figure 14. Capacitively Coupled AD9059
A power-down function allows users to reduce power dissipa-
tion when ADC data is not required. A TTL/CMOS HIGH
signal (PWRDN) shuts down portions of the dual ADC and
brings total power dissipation to less than 10 mW. The internal
bandgap voltage reference remains active during power-down
mode to minimize ADC reactivation time. If the power-down
function is not desired, Pin 3 should be tied to ground. Both
ADC channels are controlled simultaneously by the PWRDN
pin; they cannot be shut down or turned on independently.
Applications
Figure 16. I and Q Digital Receiver
The high sampling rate and analog bandwidth of the AD9059
are ideal for computer RGB video digitizer applications. With a
full-power analog bandwidth of 2× the maximum sampling rate,
the ADC provides sufficient pixel-to-pixel transient settling
time to ensure accurate 60 MSPS video digitization. Figure 17
shows a typical RGB video digitizer implementation for the
AD9059.
AD9059
RED
ADC
8
The wide analog bandwidth of the AD9059 makes it attractive
for a variety of high performance receiver and encoder applica-
tions. Figure 16 shows the dual ADC in a typical low cost I & Q
demodulator implementation for cable, satellite, or wireless
LAN modem receivers. The excellent dynamic performance of
the ADC at higher analog input frequencies and encode rates
empowers users to employ direct IF sampling techniques (refer
to Figure 3,
Spectral Plot).
IF sampling eliminates or simplifies
analog mixer and filter stages to reduce total system cost and
power.
GREEN
ADC
8
PIXEL CLOCK
H-SYNC
PLL
8
BLUE
ADC
ADC
AD9059
Figure 17. RGB Video Encoder
–8–
REV. 0