ADSP-2181–SPECIFICATIONS
RECOMMENDED OPERATING CONDITIONS
K Grade
Parameter
V
DD
T
AMB
Supply Voltage
Ambient Operating Temperature
Min
4.5
0
Max
5.5
+70
Min
4.5
–40
B Grade
Max
5.5
+85
Unit
V
°C
ELECTRICAL CHARACTERISTICS
Parameter
V
IH
V
IH
V
IL
V
OH
Hi-Level Input Voltage
1, 2
Hi-Level CLKIN Voltage
Lo-Level Input Voltage
1, 3
Hi-Level Output Voltage
1, 4, 5
Test Conditions
@ V
DD
= max
@ V
DD
= max
@ V
DD
= min
@ V
DD
= min
I
OH
= –0.5 mA
@ V
DD
= min
I
OH
= –100
µA
6
@ V
DD
= min
I
OL
= 2 mA
@ V
DD
= max
V
IN
= V
DD
max
@ V
DD
= max
V
IN
= 0 V
@ V
DD
= max
V
IN
= V
DD
max
8
@ V
DD
= max
V
IN
= 0 V
8
@ V
DD
= 5.0
T
AMB
= +25°C
t
CK
= 34.7 ns
t
CK
= 30 ns
t
CK
= 25 ns
@ V
DD
= 5.0
T
AMB
= +25°C
t
CK
= 34.7 ns
11
t
CK
= 30 ns
11
t
CK
= 25 ns
11
@ V
IN
= 2.5 V,
f
IN
= 1.0 MHz,
T
AMB
= +25°C
@ V
IN
= 2.5 V,
f
IN
= 1.0 MHz,
T
AMB
= +25°C
Min
2.0
2.2
0.8
2.4
V
DD
– 0.3
0.4
10
10
10
10
K/B Grades
Typ
Max
Unit
V
V
V
V
V
V
µA
µA
µA
µA
mA
mA
mA
V
OL
I
IH
I
IL
I
OZH
I
OZL
I
DD
Lo-Level Output Voltage
Hi-Level Input Current
3
Lo-Level Input Current
3
1, 4, 5
Three-State Leakage Current
7
Three-State Leakage Current
7
Supply Current (Idle)
9
12
13
15
I
DD
Supply Current (Dynamic)
10
65
73
85
mA
mA
mA
C
I
C
O
Input Pin Capacitance
3, 6, 12
6, 7, 12, 13
8
pF
Output Pin Capacitance
8
pF
NOTES
1
Bidirectional pins: D0–D23, RFS0, RFS1, SCLK0, SCLK1, TFS0, TFS1, A1–A13, PF0–PF7.
2
Input only pins:
RESET, BR,
DR0, DR1,
PWD.
3
Input only pins: CLKIN,
RESET, BR,
DR0, DR1,
PWD.
4
Output pins:
BG, PMS, DMS, BMS, IOMS, CMS, RD, WR,
PWDACK, A0, DT0, DT1, CLKOUT, FL2-0,
BGH.
5
Although specified for TTL outputs, all ADSP-2186 outputs are CMOS-compatible and will drive to V
DD
and GND, assuming no dc loads.
6
Guaranteed but not tested.
7
Three-statable pins: A0–A13, D0–D23,
PMS, DMS, BMS, IOMS, CMS, RD, WR,
DT0, DT1, SCLK0, SCLK1, TFS0, TFS1, RFS0, RSF1, PF0–PF7.
8
0 V on
BR,
CLKIN Inactive.
9
Idle refers to ADSP-2181 state of operation during execution of IDLE instruction. Deasserted pins are driven to either V
DD
or GND.
10
I
DD
measurement taken with all instructions executing from internal memory. 50% of the instructions are multifunction (types 1, 4, 5, 12, 13, 14), 30% are type 2
and type 6, and 20% are idle instructions.
11
V
IN
= 0 V and 3 V. For typical figures for supply currents, refer to Power Dissipation section.
12
Applies to TQFP and PQFP package types.
13
Output pin capacitance is the capacitive load for any three-stated output pin.
Specifications subject to change without notice.
–12–
REV. D
AD [ ANALOG DEVICES ]
