DATA RETENTION CHARACTERISTICS (Pre-Radiation)
3
(V
DD2
= V
DD2
(min), 1 Sec DR Pulse)
SYMBOL
V
DR
I
DDR 1
Device Type 1
I
DDR 1
Device Type 2
t
EFR1,2
t
R1,2
Data retention current
PARAMETER
V
DD1
for data retention
Data retention current
1.0
-55°C
25°C
125°C
-40°C
25°
125°C
0
t
AVAV
MINIMUM
1.0
--
MAXIMUM
--
600
600
30
600
600
30
UNIT
V
µA
µA
mA
µA
µA
mA
ns
ns
--
Chip deselect to data retention time
Operation recovery time
0
t
AVAV
Notes:
* Post-radiation performance guaranteed at 25°C per MIL-STD-883 Method 1019.
1. EN = V
DD2
all other inputs = V
DD2
or V
SS
2. V
DD2
= 0 volts to V
DD2
(max)
DATA RETENTION MODE
1.7V
V
DD1
t
EFR
V
SS
EN
V
IN
<0.3V
DD2
CMOS
1.7V
V
DR
>
1.0V
t
R
V
IN
>0.7V
DD2
CMOS
V
DD2
Figure 5. Low V
DD
Data Retention Waveform
CMOS
V
DD2
-0.05V
188 ohms
1.4V
0.0V
10%
90%
< 2ns
50pF
Input Pulses
< 2ns
Notes:
1. 50pF including scope probe and test socket.
2. Measurement of data output occurs at the low to high or high to low transition mid-point
(i.e., CMOS input = V
DD2
/2).
Figure 6. AC Test Loads and Input Waveforms
11