Data Sheet, Rev. 1
August 2004
USS-820FD
USB Device Controller
To suspend the USS-820FD, firmware must set the
SSR.SUSPEND register control bit to 1, and then reset
the bit to 0. This action causes to the USS-820FD to
immediately enter suspend mode.
In order to guarantee correct behavior when resuming,
firmware must not attempt any register reads until at
least three tRDREC periods have elapsed since reset-
ting the SSR.SUSPEND register control bit.
Since firmware must have the PEND register bit set
when modifying the SSR.SUSPEND register bit, and
since registers cannot be written while the USS-820FD
is suspended, firmware must remember to reset the
PEND register bit after the USS-820FD resumes.
Since the SSR.SUSPEND register status bit will remain
set while the USS-820FD is suspended, a pending
SUSPEND interrupt will remain until the USS-820FD
resumes. For this reason, firmware may wish to reset
the SCR.IE_SUSP bit before suspending the USS-
820FD.
In order to meet the USB specification’s current draw
limit for suspended devices, the USS-820FD must turn
off its internal clocks. This occurs when the
SSR.SUSPEND register control bit is reset by firmware
as described above and is indicated by the USS-
820FD SUSPN output pin being asserted. While in
suspend mode, the USS-820FD must remain powered,
but the USS-820FD’s power consumption will be
reduced to almost zero and will remain in this state until
a wake-up is signaled.
Self-powered devices will most likely not need to turn
off power to other application components during
suspend. This is indicated to the USS-820FD by the
SSR.SUSPPO register bit = 0, which should be written
by firmware at device initialization time. In such an
environment, during suspend, the USS-820FD outputs
and inputs continue to be driven by the USS-820FD
and the application, respectively. In addition, the USS-
820FD bidirectional pins are 3-stated in the USS-
820FD and driven to 0 or 1 by the application.
Bus-powered devices will most likely need to turn off
power to other application components during
suspend. This is indicated to the USS-820FD by the
SSR.SUSPPO register bit = 1, which should be written
by firmware at device initialization time. Such devices
can be implemented so that the USS-820FD SUSPN
output pin controls power to other application compo-
nents. Issues which must be considered by bus-
powered devices are discussed in the Special Suspend
Considerations for Bus-Powered Devices section.
Suspend and Resume Behavior
(continued)
During a suspend/resume sequence, the following
sequence of events occurs:
1. Hardware Suspend Detect: The USS-820FD
detects a suspend request from the host on USB
and notifies firmware.
2. Firmware Suspend Initiate: Firmware reacts to the
pending suspend request and suspends the device.
3. Hardware Resume Detect/Initiate: Some time later
a resume is initiated, either by the host or the appli-
cation.
4. Hardware Resume Sequence: When the resume is
complete, the USS-820FD notifies firmware.
5. Firmware Resume Sequence: Firmware reacts to
the resume and completes any required actions.
The following sections describe each of these steps in
more detail.
Hardware Suspend Detect
The USS-820FD detects a USB suspend condition if a
J state persists on the bus for at least 3 ms. When this
suspend condition is detected, hardware sets the
SSR.SUSPEND register status bit and, if
IE_SUSP = 1, causes an interrupt.
Suspend detection may be blocked by firmware by
setting the SSR.SUSPDIS register bit to 1.
SSR.SUSPDIS should only be set for test purposes,
never in a running system.
Firmware Suspend Initiate
When firmware detects that a suspend request from
the host has been detected, it must prepare itself, and
any other application components for which it is
responsible, for suspend mode. For bus-powered
devices, this will normally require turning off power to
application components or placing them in low-power
mode. When firmware is finished preparing for a device
suspend, it should check the SSR.SUSPEND register
status bit once more. If this status bit has reset, firm-
ware should abort the suspend sequence, since the
host has already awakened the device. This will only
happen if firmware is too slow in responding to the
suspend detect. If the status bit is still set, firmware
should proceed with the suspend sequence. This
second check of the status bit guarantees that the
device will see wake-up signaling of sufficient length
from the host.
Agere Systems Inc.
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